3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-04-27 02:45:52 +00:00

Small improvements in Verilog front-end docs

This commit is contained in:
Clifford Wolf 2016-05-20 16:21:35 +02:00
parent ffcdc53a18
commit 060bf4819a
2 changed files with 8 additions and 0 deletions

View file

@ -159,6 +159,9 @@ struct VerilogFrontend : public Frontend {
log("recommended to use a simulator (for example Icarus Verilog) for checking\n");
log("the syntax of the code, rather than to rely on read_verilog for that.\n");
log("\n");
log("See the Yosys README file for a list of non-standard Verilog features\n");
log("supported by the Yosys Verilog front-end.\n");
log("\n");
}
virtual void execute(std::istream *&f, std::string filename, std::vector<std::string> args, RTLIL::Design *design)
{