mirrors/yosys
3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-20 14:20:32 +00:00
Code Activity

analogdevices: DSP inference

Browse source
This commit is contained in:
Lofty 2025-10-16 23:33:59 +01:00
parent aab52403f1
commit 059925a56a
4 changed files with 122 additions and 788 deletions
Download patch file Download diff file Expand all files Collapse all files

4
tests/arch/analogdevices/mul.ys
View file

@ -5,5 +5,5 @@ equiv_opt -assert -map +/analogdevices/cells_sim.v synth_analogdevices -noiopad
design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design)
cd top # Constrain all select calls below inside the top module
select -assert-count 1 t:DSP48E1
select -assert-none t:DSP48E1 %% t:* %D
select -assert-count 1 t:RBBDSP
select -assert-none t:RBBDSP %% t:* %D