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Add missing changelog item

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Miodrag Milanovic 2021-11-05 10:08:50 +01:00
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commit 051b234df6
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CHANGELOG
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@ -21,6 +21,7 @@ Yosys 0.10 .. Yosys 0.10-dev
- Importer support for PRIM_BUFIF1 - Importer support for PRIM_BUFIF1
- Option to use Verific without VHDL support - Option to use Verific without VHDL support
- Importer support for {PRIM,WIDE_OPER}_DLATCH{,RS} - Importer support for {PRIM,WIDE_OPER}_DLATCH{,RS}
- Added -cfg option for getting/setting Verific runtime flags
Yosys 0.9 .. Yosys 0.10 Yosys 0.9 .. Yosys 0.10
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