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https://github.com/YosysHQ/yosys
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parent
1af994802e
commit
0505c604e7
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@ -726,8 +726,16 @@ frontend_verilog_preproc(std::istream &f,
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defines.merge(global_defines_cache);
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defines.merge(global_defines_cache);
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std::vector<std::string> filename_stack;
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std::vector<std::string> filename_stack;
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// We are inside pass_level levels of satisfied ifdefs, and then within
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// fail_level levels of unsatisfied ifdefs. The unsatisfied ones are
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// always within satisfied ones — even if some condition within is true,
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// the parent condition failing renders it moot.
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int ifdef_fail_level = 0;
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int ifdef_fail_level = 0;
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int ifdef_pass_level = 0;
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int ifdef_pass_level = 0;
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// For the outermost unsatisfied ifdef, true iff that ifdef already
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// had a satisfied branch, and further elsif/else branches should be
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// considered unsatisfied even if the condition is true.
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// Meaningless if ifdef_fail_level == 0.
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bool ifdef_already_satisfied = false;
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bool ifdef_already_satisfied = false;
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output_code.clear();
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output_code.clear();
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@ -745,7 +753,7 @@ frontend_verilog_preproc(std::istream &f,
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if (ifdef_fail_level > 0)
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if (ifdef_fail_level > 0)
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ifdef_fail_level--;
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ifdef_fail_level--;
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else if (ifdef_pass_level > 0)
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else if (ifdef_pass_level > 0)
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ifdef_already_satisfied = --ifdef_pass_level;
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ifdef_pass_level--;
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else
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else
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log_error("Found %s outside of macro conditional branch!\n", tok.c_str());
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log_error("Found %s outside of macro conditional branch!\n", tok.c_str());
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continue;
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continue;
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@ -755,8 +763,9 @@ frontend_verilog_preproc(std::istream &f,
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if (ifdef_fail_level == 0) {
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if (ifdef_fail_level == 0) {
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if (ifdef_pass_level == 0)
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if (ifdef_pass_level == 0)
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log_error("Found %s outside of macro conditional branch!\n", tok.c_str());
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log_error("Found %s outside of macro conditional branch!\n", tok.c_str());
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log_assert(ifdef_already_satisfied);
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ifdef_pass_level--;
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ifdef_fail_level = 1;
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ifdef_fail_level = 1;
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ifdef_already_satisfied = true;
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} else if (ifdef_fail_level == 1 && !ifdef_already_satisfied) {
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} else if (ifdef_fail_level == 1 && !ifdef_already_satisfied) {
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ifdef_fail_level = 0;
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ifdef_fail_level = 0;
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ifdef_pass_level++;
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ifdef_pass_level++;
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@ -771,8 +780,9 @@ frontend_verilog_preproc(std::istream &f,
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if (ifdef_fail_level == 0) {
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if (ifdef_fail_level == 0) {
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if (ifdef_pass_level == 0)
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if (ifdef_pass_level == 0)
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log_error("Found %s outside of macro conditional branch!\n", tok.c_str());
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log_error("Found %s outside of macro conditional branch!\n", tok.c_str());
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log_assert(ifdef_already_satisfied);
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ifdef_pass_level--;
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ifdef_fail_level = 1;
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ifdef_fail_level = 1;
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ifdef_already_satisfied = true;
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} else if (ifdef_fail_level == 1 && !ifdef_already_satisfied && defines.find(name)) {
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} else if (ifdef_fail_level == 1 && !ifdef_already_satisfied && defines.find(name)) {
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ifdef_fail_level = 0;
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ifdef_fail_level = 0;
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ifdef_pass_level++;
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ifdef_pass_level++;
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@ -931,6 +941,10 @@ frontend_verilog_preproc(std::istream &f,
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output_code.push_back(tok);
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output_code.push_back(tok);
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}
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}
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if (ifdef_fail_level > 0 || ifdef_pass_level > 0) {
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log_error("Unterminated preprocessor conditional!\n");
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}
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std::string output;
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std::string output;
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for (auto &str : output_code)
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for (auto &str : output_code)
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output += str;
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output += str;
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