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hierarchy: Without a known top module, derive all deferred modules

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This fixes hierarchy when used with cell libraries that were loaded with
-defer and also makes more of the hierarchy visible to the auto-top
heuristic.
This commit is contained in:
Jannis Harder 2024-01-12 16:30:37 +01:00
parent 2422dd6845
commit 0470cbb00d
2 changed files with 13 additions and 1 deletions
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2
tests/verilog/param_no_default.ys
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@ -1,5 +1,5 @@
read_verilog -sv param_no_default.sv
hierarchy
hierarchy -top top
proc
flatten
opt -full