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xilinx: Add simulation models for IOBUF and OBUFT.

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This commit is contained in:
Marcin Kościelnicki 2019-11-26 05:04:28 +01:00
parent 6cdea425b8
commit 0466c48533
3 changed files with 30 additions and 25 deletions
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28
techlibs/xilinx/cells_sim.v
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@ -59,6 +59,34 @@ module OBUF(
assign O = I;
endmodule
module IOBUF (
(* iopad_external_pin *)
inout IO,
output O,
input I,
input T
);
parameter integer DRIVE = 12;
parameter IBUF_LOW_PWR = "TRUE";
parameter IOSTANDARD = "DEFAULT";
parameter SLEW = "SLOW";
assign IO = T ? 1'bz : I;
assign O = IO;
endmodule
module OBUFT (
(* iopad_external_pin *)
output O,
input I,
input T
);
parameter CAPACITANCE = "DONT_CARE";
parameter integer DRIVE = 12;
parameter IOSTANDARD = "DEFAULT";
parameter SLEW = "SLOW";
assign O = T ? 1'bz : I;
endmodule
module BUFG(
(* clkbuf_driver *)
output O,