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https://github.com/YosysHQ/yosys
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Prevent crashes and diagnostics
This commit is contained in:
Alain Dargelas
parent
f5f673de0f
commit
0379a8b287
3 changed files with 114 additions and 66 deletions
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@ -6,9 +6,14 @@ USING_YOSYS_NAMESPACE
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PRIVATE_NAMESPACE_BEGIN
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struct ReconstructBusses : public ScriptPass {
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ReconstructBusses() : ScriptPass("reconstructbusses", "Reconstruct busses from wires with the same prefix following the convention: <prefix>_<index>_") {}
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ReconstructBusses()
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: ScriptPass("reconstructbusses", "Reconstruct busses from wires with the same prefix following the convention: <prefix>_<index>_")
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{
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}
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void script() override {}
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bool is_digits(const std::string &str) { return std::all_of(str.begin(), str.end(), ::isdigit); }
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void execute(std::vector<std::string>, RTLIL::Design *design) override
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{
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if (design == nullptr) {
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@ -17,6 +22,8 @@ struct ReconstructBusses : public ScriptPass {
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}
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log("Running reconstructbusses pass\n");
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log_flush();
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log("Creating bus groups\n");
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log_flush();
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for (auto module : design->modules()) {
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// Collect all wires with a common prefix
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dict<std::string, std::vector<RTLIL::Wire *>> wire_groups;
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@ -32,7 +39,19 @@ struct ReconstructBusses : public ScriptPass {
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// Result: "add_Y"
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std::string::iterator end = prefix.end() - 1;
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if ((*end) == '_') {
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// Last character is an _, it is a bit blasted index
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// Last character is an _, check that it is a bit blasted index:
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bool valid_index = false;
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std::string ch_name = prefix.substr(0, prefix.size() - 1);
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if (ch_name.find("_") != std::string::npos) {
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std::string ch_index_str = ch_name.substr(ch_name.find_last_of('_') + 1);
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if ((!ch_index_str.empty() && is_digits(ch_index_str))) {
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valid_index = true;
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}
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}
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if (!valid_index) {
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continue;
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}
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end--;
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for (; end != prefix.begin(); end--) {
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if ((*end) != '_') {
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@ -43,12 +62,17 @@ struct ReconstructBusses : public ScriptPass {
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break;
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}
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}
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if (end == prefix.begin())
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// Last _ didn't mean there was another _
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continue;
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std::string no_bitblast_prefix;
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std::copy(prefix.begin(), end, std::back_inserter(no_bitblast_prefix));
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wire_groups[no_bitblast_prefix].push_back(wire);
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}
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}
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log("Found %ld groups\n", wire_groups.size());
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log("Creating busses\n");
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log_flush();
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std::map<std::string, RTLIL::Wire *> wirenames_to_remove;
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pool<RTLIL::Wire *> wires_to_remove;
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// Reconstruct vectors
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@ -56,25 +80,6 @@ struct ReconstructBusses : public ScriptPass {
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std::string prefix = it.first;
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std::vector<RTLIL::Wire *> &wires = it.second;
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// Sort wires by their bit index (assuming the suffix is _<index>_)
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std::sort(wires.begin(), wires.end(), [](RTLIL::Wire *a, RTLIL::Wire *b) {
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std::string a_name = a->name.str();
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std::string b_name = b->name.str();
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std::string::iterator a_end = a_name.end() - 1;
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std::string::iterator b_end = b_name.end() - 1;
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if (((*a_end) == '_') && ((*b_end) == '_')) {
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a_name = a_name.substr(0, a_name.size() - 1);
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b_name = b_name.substr(0, b_name.size() - 1);
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std::string a_index_str = a_name.substr(a_name.find_last_of('_') + 1);
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std::string b_index_str = b_name.substr(b_name.find_last_of('_') + 1);
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int a_index = std::stoi(a_index_str);
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int b_index = std::stoi(b_index_str);
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return a_index > b_index; // Descending order for correct concatenation
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} else {
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return false;
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}
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});
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// Create a new vector wire
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int width = wires.size();
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RTLIL::Wire *new_wire = module->addWire(prefix, width);
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@ -93,7 +98,8 @@ struct ReconstructBusses : public ScriptPass {
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wires_to_remove.insert(wire);
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}
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}
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log("Reconnecting cells\n");
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log_flush();
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// Reconnect cells
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for (auto cell : module->cells()) {
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for (auto &conn : cell->connections_) {
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@ -104,20 +110,26 @@ struct ReconstructBusses : public ScriptPass {
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// std::cout << "Conn:" << chunk.wire->name.c_str() << std::endl;
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// Find the connections that match the wire group prefix
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std::string lhs_name = chunk.wire->name.c_str();
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std::map<std::string, RTLIL::Wire *>::iterator itr = wirenames_to_remove.find(lhs_name);
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std::map<std::string, RTLIL::Wire *>::iterator itr = wirenames_to_remove.find(lhs_name);
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if (itr != wirenames_to_remove.end()) {
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std::string ch_name = chunk.wire->name.c_str();
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std::string::iterator ch_end = ch_name.end() - 1;
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if ((*ch_end) == '_') {
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ch_name = ch_name.substr(0, ch_name.size() - 1);
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std::string ch_index_str = ch_name.substr(ch_name.find_last_of('_') + 1);
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// std::cout << "ch_name: " << ch_name << std::endl;
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if (!ch_index_str.empty()) {
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// Create a new connection sigspec that matches the previous bit index
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int ch_index = std::stoi(ch_index_str);
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RTLIL::SigSpec bit = RTLIL::SigSpec(itr->second, ch_index, 1);
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new_sig.append(bit);
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modified = true;
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if (!ch_name.empty()) {
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std::string::iterator ch_end = ch_name.end() - 1;
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if ((*ch_end) == '_') {
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ch_name = ch_name.substr(0, ch_name.size() - 1);
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if (ch_name.find("_") != std::string::npos) {
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std::string ch_index_str =
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ch_name.substr(ch_name.find_last_of('_') + 1);
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// std::cout << "ch_name: " << ch_name << std::endl;
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if ((!ch_index_str.empty() && is_digits(ch_index_str))) {
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// Create a new connection sigspec that matches the previous
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// bit index
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int ch_index = std::stoi(ch_index_str);
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RTLIL::SigSpec bit = RTLIL::SigSpec(itr->second, ch_index, 1);
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new_sig.append(bit);
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modified = true;
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}
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}
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}
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}
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} else {
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@ -130,9 +142,9 @@ struct ReconstructBusses : public ScriptPass {
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conn.second = new_sig;
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}
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}
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log("Reconnecting top connections\n");
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log_flush();
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// Reconnect top connections before removing the old wires
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// std::cout << "Wire to remove: " << wire_name << std::endl;
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for (auto &conn : module->connections()) {
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RTLIL::SigSpec lhs = conn.first;
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RTLIL::SigSpec rhs = conn.second;
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@ -146,31 +158,38 @@ struct ReconstructBusses : public ScriptPass {
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while (lit != lhs.chunks().rend()) {
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RTLIL::SigChunk sub_lhs = *lit;
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std::string conn_lhs = sub_lhs.wire->name.c_str();
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std::string conn_rhs = sub_rhs.wire->name.c_str();
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// The connection LHS matches a wire that is replaced by a bus
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// std::cout << "Conn: " << conn_lhs << " to: " << conn_rhs << std::endl;
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std::map<std::string, RTLIL::Wire *>::iterator itr = wirenames_to_remove.find(conn_lhs);
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if (itr != wirenames_to_remove.end()) {
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std::string::iterator conn_lhs_end = conn_lhs.end() - 1;
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if ((*conn_lhs_end) == '_') {
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conn_lhs = conn_lhs.substr(0, conn_lhs.size() - 1);
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std::string ch_index_str = conn_lhs.substr(conn_lhs.find_last_of('_') + 1);
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if (!ch_index_str.empty()) {
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// std::cout << "Conn LHS: " << conn_lhs << std::endl;
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// std::string conn_rhs = sub_rhs.wire->name.c_str();
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// std::cout << "Conn RHS: " << conn_rhs << std::endl;
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int ch_index = std::stoi(ch_index_str);
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// Create the LHS sigspec of the desired bit
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RTLIL::SigSpec bit = RTLIL::SigSpec(itr->second, ch_index, 1);
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if (sub_rhs.size() > 1) {
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// If RHS has width > 1, replace with the bitblasted RHS corresponding to the
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// connected bit
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RTLIL::SigSpec rhs_bit = RTLIL::SigSpec(sub_rhs.wire, ch_index, 1);
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// And connect it
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module->connect(bit, rhs_bit);
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} else {
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// Else, directly connect
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module->connect(bit, sub_rhs);
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if (!conn_lhs.empty()) {
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// std::cout << "Conn LHS: " << conn_lhs << std::endl;
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// std::string conn_rhs = sub_rhs.wire->name.c_str();
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// std::cout << "Conn RHS: " << conn_rhs << std::endl;
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std::map<std::string, RTLIL::Wire *>::iterator itr = wirenames_to_remove.find(conn_lhs);
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if (itr != wirenames_to_remove.end()) {
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std::string::iterator conn_lhs_end = conn_lhs.end() - 1;
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if ((*conn_lhs_end) == '_') {
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conn_lhs = conn_lhs.substr(0, conn_lhs.size() - 1);
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if (conn_lhs.find("_") != std::string::npos) {
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std::string ch_index_str = conn_lhs.substr(conn_lhs.find_last_of('_') + 1);
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if (!ch_index_str.empty() && is_digits(ch_index_str)) {
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int ch_index = std::stoi(ch_index_str);
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// Create the LHS sigspec of the desired bit
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RTLIL::SigSpec bit = RTLIL::SigSpec(itr->second, ch_index, 1);
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if (sub_rhs.size() > 1) {
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// If RHS has width > 1, replace with the bitblasted RHS
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// corresponding to the connected bit
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RTLIL::SigSpec rhs_bit =
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RTLIL::SigSpec(sub_rhs.wire, ch_index, 1);
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// And connect it
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module->connect(bit, rhs_bit);
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} else {
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// Else, directly connect
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module->connect(bit, sub_rhs);
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}
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} else {
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// Else, directly connect
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RTLIL::SigSpec bit = RTLIL::SigSpec(itr->second, 0, 1);
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module->connect(bit, sub_rhs);
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}
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}
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}
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}
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@ -180,12 +199,17 @@ struct ReconstructBusses : public ScriptPass {
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rit++;
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}
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}
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// Remove old wires
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log("Removing old wires\n");
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log_flush();
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module->remove(wires_to_remove);
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// Update module port list
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log("Re-creating ports\n");
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log_flush();
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module->fixup_ports();
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}
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log("End reconstructbusses pass\n");
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log_flush();
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}
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} ReconstructBusses;
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