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Add documentation for anyconst/anyseq/allconst/allseq attribute

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Signed-off-by: Clifford Wolf <clifford@clifford.at>
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Clifford Wolf 2018-04-06 14:37:43 +02:00
parent 5ea2c53604
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@ -402,6 +402,10 @@ Non-standard or SystemVerilog features for formal verification
statements it is sufficient if just one ``$allconst/$allseq`` value triggers statements it is sufficient if just one ``$allconst/$allseq`` value triggers
the property (similar to ``$anyconst/$anyseq``). the property (similar to ``$anyconst/$anyseq``).
- Wires/registers decalred using the ``anyconst/anyseq/allconst/allseq`` attribute
(for example ``(* anyconst *) reg [7:0] foobar;``) will behave as if driven
by a ``$anyconst/$anyseq/$allconst/$allseq`` function.
- The SystemVerilog tasks ``$past``, ``$stable``, ``$rose`` and ``$fell`` are - The SystemVerilog tasks ``$past``, ``$stable``, ``$rose`` and ``$fell`` are
supported in any clocked block. supported in any clocked block.