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Re-created command-reference-manual.tex, copied some doc fixes to online help

This commit is contained in:
Clifford Wolf 2015-08-14 11:27:19 +02:00
parent 84bf862f7c
commit 0350074819
10 changed files with 668 additions and 52 deletions

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@ -361,7 +361,7 @@ struct ExtractPass : public Pass {
log("\n");
log("This pass looks for subcircuits that are isomorphic to any of the modules\n");
log("in the given map file and replaces them with instances of this modules. The\n");
log("map file can be a verilog source file (*.v) or an ilang file (*.il).\n");
log("map file can be a Verilog source file (*.v) or an ilang file (*.il).\n");
log("\n");
log(" -map <map_file>\n");
log(" use the modules in this file as reference. This option can be used\n");