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Re-created command-reference-manual.tex, copied some doc fixes to online help

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This commit is contained in:
Clifford Wolf 2015-08-14 11:27:19 +02:00
parent 84bf862f7c
commit 0350074819
10 changed files with 668 additions and 52 deletions
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6
backends/verilog/verilog_backend.cc
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@ -1315,14 +1315,14 @@ void dump_module(std::ostream &f, std::string indent, RTLIL::Module *module)
}
struct VerilogBackend : public Backend {
VerilogBackend() : Backend("verilog", "write design to verilog file") { }
VerilogBackend() : Backend("verilog", "write design to Verilog file") { }
virtual void help()
{
// |---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|---v---|
log("\n");
log(" write_verilog [options] [filename]\n");
log("\n");
log("Write the current design to a verilog file.\n");
log("Write the current design to a Verilog file.\n");
log("\n");
log(" -norename\n");
log(" without this option all internal object names (the ones with a dollar\n");
@ -1336,7 +1336,7 @@ struct VerilogBackend : public Backend {
log(" with this option attributes are included as comments in the output\n");
log("\n");
log(" -noexpr\n");
log(" without this option all internal cells are converted to verilog\n");
log(" without this option all internal cells are converted to Verilog\n");
log(" expressions.\n");
log("\n");
log(" -blackboxes\n");