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intel: move Cyclone V support to intel_alm

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Dan Ravensloft 2020-07-27 14:21:05 +01:00 • committed by Marcelina Kościelnicka
parent d9dd8bc748
commit 034b9ec716
7 changed files with 11 additions and 203 deletions
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11
techlibs/intel/synth_intel.cc
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@ -36,11 +36,11 @@ struct SynthIntelPass : public ScriptPass {
log("\n");
log("This command runs synthesis for Intel FPGAs.\n");
log("\n");
log(" -family <max10 | arria10gx | cyclone10lp | cyclonev | cycloneiv | cycloneive>\n");
log(" -family <max10 | arria10gx | cyclone10lp | cycloneiv | cycloneive>\n");
log(" generate the synthesis netlist for the specified family.\n");
log(" MAX10 is the default target if no family argument specified.\n");
log(" For Cyclone IV GX devices, use cycloneiv argument; for Cyclone IV E, use cycloneive.\n");
log(" Cyclone V and Arria 10 GX devices are experimental.\n");
log(" Arria 10 GX devices are experimental.\n");
log("\n");
log(" -top <module>\n");
log(" use the specified module as top module (default='top')\n");
@ -147,9 +147,12 @@ struct SynthIntelPass : public ScriptPass {
if (!design->full_selection())
log_cmd_error("This command only operates on fully selected designs!\n");
if (family_opt == "cyclonev")
log_cmd_error("Cyclone V synthesis has been moved to synth_intel_alm.\n");
if (family_opt != "max10" &&
family_opt != "arria10gx" &&
family_opt != "cyclonev" &&
family_opt != "cycloneiv" &&
family_opt != "cycloneive" &&
family_opt != "cyclone10lp")
@ -216,7 +219,7 @@ struct SynthIntelPass : public ScriptPass {
}
if (check_label("map_luts")) {
if (family_opt == "arria10gx" || family_opt == "cyclonev")
if (family_opt == "arria10gx")
run("abc -luts 2:2,3,6:5" + string(retime ? " -dff" : ""));
else
run("abc -lut 4" + string(retime ? " -dff" : ""));