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Xilinx mojo_counter example is now working

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This commit is contained in:
Clifford Wolf 2013-10-27 08:21:56 +01:00
parent d9fa1e5a1d
commit 02f321b6fc
3 changed files with 9 additions and 4 deletions
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6
techlibs/xilinx/example_mojo_counter/example.sh
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@ -19,8 +19,12 @@ abc -lut 6; opt
# map internal cells to FPGA cells
techmap -map ../cells.v; opt
# insert clock buffers
select -set clocks */t:FDRE %x:+FDRE[C] */t:FDRE %d
iopadmap -inpad BUFGP O:I @clocks
# insert i/o buffers
iopadmap -outpad OBUF I:O -inpad BUFGP O:I
iopadmap -outpad OBUF I:O -inpad IBUF O:I @clocks %n
# write netlist
write_edif synth.edif