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Added Verilog support for "`default_nettype none"

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This commit is contained in:
Clifford Wolf 2014-02-17 14:28:52 +01:00
parent 0851c2b6ea
commit 02e6f2c5be
8 changed files with 31 additions and 8 deletions
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frontends/verilog/verilog_frontend.h
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@ -42,6 +42,9 @@ namespace VERILOG_FRONTEND
// this function converts a Verilog constant to an AST_CONSTANT node
AST::AstNode *const2ast(std::string code, char case_type = 0);
// state of `default_nettype
extern bool default_nettype_wire;
}
// the pre-processor