mirror of
				https://github.com/YosysHQ/yosys
				synced 2025-10-31 03:32:29 +00:00 
			
		
		
		
	Fixed assertion failure for non-inferrable counters in some cases
This commit is contained in:
		
							parent
							
								
									48c10d90f4
								
							
						
					
					
						commit
						01a5f71187
					
				
					 1 changed files with 6 additions and 2 deletions
				
			
		|  | @ -248,8 +248,12 @@ void greenpak4_counters_worker( | ||||||
| 	if (cell->type != "$alu") | 	if (cell->type != "$alu") | ||||||
| 		return; | 		return; | ||||||
| 	 | 	 | ||||||
| 	//A input is the count value. Check if it has COUNT_EXTRACT set
 | 	//A input is the count value. Check if it has COUNT_EXTRACT set.
 | ||||||
| 	RTLIL::Wire* a_wire = sigmap(cell->getPort("\\A")).as_wire(); | 	//If it's not a wire, don't even try
 | ||||||
|  | 	auto port = sigmap(cell->getPort("\\A")); | ||||||
|  | 	if(!port.is_wire()) | ||||||
|  | 		return; | ||||||
|  | 	RTLIL::Wire* a_wire = port.as_wire(); | ||||||
| 	bool force_extract = false; | 	bool force_extract = false; | ||||||
| 	bool never_extract = false; | 	bool never_extract = false; | ||||||
| 	string count_reg_src = a_wire->attributes["\\src"].decode_string().c_str(); | 	string count_reg_src = a_wire->attributes["\\src"].decode_string().c_str(); | ||||||
|  |  | ||||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue