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opt_share: Fix X and CO signal width for shifted $alu in opt_share.

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These need to be the same length as actual Y, not visible part of Y.

Fixes #2538.
This commit is contained in:
Marcelina Kościelnicka 2021-01-14 09:58:33 +01:00
parent 7cd044bbc4
commit 01626e6746
2 changed files with 22 additions and 2 deletions
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20
tests/opt/opt_share_bug2538.ys Normal file
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@ -0,0 +1,20 @@
read_verilog <<EOT
module top(...);
input [3:0] A;
input S;
output [1:0] Y;
wire [3:0] A1 = A + 1;
wire [3:0] A2 = A + 2;
assign Y = S ? A1[3:2] : A2[3:2];
endmodule
EOT
proc
alumacc
equiv_opt -assert opt_share