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Replace "ILANG" with "RTLIL" everywhere.
The only difference between "RTLIL" and "ILANG" is that the latter is the text representation of the former, as opposed to the in-memory graph representation. This distinction serves no purpose but confuses people: it is not obvious that the ILANG backend writes RTLIL graphs. Passes `write_ilang` and `read_ilang` are provided as aliases to `write_rtlil` and `read_rtlil` for compatibility.
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28 changed files with 206 additions and 178 deletions
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@ -605,7 +605,7 @@ struct ShowPass : public Pass {
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log(" generate a .dot file, or other <format> strings such as 'svg' or 'ps'\n");
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log(" to generate files in other formats (this calls the 'dot' command).\n");
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log("\n");
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log(" -lib <verilog_or_ilang_file>\n");
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log(" -lib <verilog_or_rtlil_file>\n");
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log(" Use the specified library file for determining whether cell ports are\n");
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log(" inputs or outputs. This option can be used multiple times to specify\n");
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log(" more than one library.\n");
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@ -811,7 +811,7 @@ struct ShowPass : public Pass {
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if (f.fail())
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log_error("Can't open lib file `%s'.\n", filename.c_str());
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RTLIL::Design *lib = new RTLIL::Design;
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Frontend::frontend_call(lib, &f, filename, (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".il") == 0 ? "ilang" : "verilog"));
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Frontend::frontend_call(lib, &f, filename, (filename.size() > 3 && filename.compare(filename.size()-3, std::string::npos, ".il") == 0 ? "rtlil" : "verilog"));
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libs.push_back(lib);
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}
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