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rtlil: Make Process handling more uniform with Cell and Wire.

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- add a backlink to module from Process
- make constructor and destructor protected, expose Module functions
  to add and remove processes
This commit is contained in:
Marcelina Kościelnicka 2021-07-11 23:57:53 +02:00
parent 726fabd65e
commit 009940f56c
8 changed files with 62 additions and 25 deletions
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9
passes/proc/proc_clean.cc
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@ -209,7 +209,7 @@ struct ProcCleanPass : public Pass {
extra_args(args, argidx, design);
for (auto mod : design->modules()) {
std::vector<RTLIL::IdString> delme;
std::vector<RTLIL::Process *> delme;
if (!design->selected(mod))
continue;
for (auto &proc_it : mod->processes) {
@ -220,12 +220,11 @@ struct ProcCleanPass : public Pass {
proc_it.second->root_case.actions.size() == 0) {
if (!quiet)
log("Removing empty process `%s.%s'.\n", log_id(mod), proc_it.second->name.c_str());
delme.push_back(proc_it.first);
delme.push_back(proc_it.second);
}
}
for (auto &id : delme) {
delete mod->processes[id];
mod->processes.erase(id);
for (auto proc : delme) {
mod->remove(proc);
}
}