3
0
Fork 0
mirror of https://github.com/YosysHQ/yosys synced 2025-10-05 23:44:01 +00:00

Make SB_LUT4 a whitebox, SB_DFF a blackbox (for now)

This commit is contained in:
Eddie Hung 2019-06-03 12:34:55 -07:00
parent d018cd9fe3
commit 0092770317
4 changed files with 8 additions and 8 deletions

View file

@ -127,7 +127,7 @@ endmodule
// SiliconBlue Logic Cells
(* abc_box_id = 22 *)
(* abc_box_id = 22, lib_whitebox *)
module SB_LUT4 (output O, input I0, I1, I2, I3);
parameter [15:0] LUT_INIT = 0;
wire [7:0] s3 = I3 ? LUT_INIT[15:8] : LUT_INIT[7:0];
@ -136,8 +136,8 @@ module SB_LUT4 (output O, input I0, I1, I2, I3);
assign O = I0 ? s1[1] : s1[0];
endmodule
(* abc_box_id = 21, lib_whitebox *)
module SB_CARRY (output CO, input I0, I1, CI);
(* abc_box_id = 21, abc_carry, lib_whitebox *)
module SB_CARRY ((* abc_carry_out *) output CO, input I0, I1, (* abc_carry_in *) input CI);
assign CO = (I0 && I1) || ((I0 || I1) && CI);
endmodule