mirrors/sby
3
0
Fork 0
mirror of https://github.com/YosysHQ/sby.git synced 2025-04-07 06:44:06 +00:00
Code Activity
455 commits 7 branches 26 tags 1.3 MiB
Python 84.7%
Rust 11.2%
Makefile 1.7%
Verilog 1.1%
SystemVerilog 0.9%
Other 0.4%
Find a file
KrystalDelusion b2d0368e26 Testing fifo things in CI 
Turns out the bigtest golden ref is failing a_count_diff, need to fix that before removing the default statement.

Base example code is fine.  New shell script to run default case and then nofullskip.
Expects returncode=2 after running nofullskip.
2022-08-01 22:06:03 +12:00
.github/workflows Use the test Makefile for all examples 2022-06-13 13:42:58 +02:00
docs Testing fifo things in CI 2022-08-01 22:06:03 +12:00
extern Fixed names and links 2021-10-31 14:42:39 +01:00
sbysrc avoid erroring out when coarse-grain logic loops can be resolved by mapping to fine grain operators 2022-07-25 16:22:32 +02:00
tests add cvc5 executable to required tool mapping 2022-07-25 17:01:17 +02:00
.gitignore Add aiger engine 2017-02-19 23:53:01 +01:00
.readthedocs.yaml update docs theme 2021-11-26 20:34:55 +01:00
COPYING Fixed names and links 2021-10-31 14:42:39 +01:00
Makefile Use the test Makefile for all examples 2022-06-13 13:42:58 +02:00
README.md mention tabby+oss cad suite in readme 2022-01-04 16:32:59 +01:00

README.md

SymbiYosys (sby) is a front-end driver program for Yosys-based formal hardware verification flows. See https://yosyshq.readthedocs.io/projects/sby/ for documentation on how to use SymbiYosys.

SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the "Selecting the right engine" section of the documentation.

SymbiYosys (sby) is part of the Tabby CAD Suite and the OSS CAD Suite! The easiest way to use sby is to install the binary software suite, which contains all required dependencies, including all supported solvers.

Make sure to get a Tabby CAD Suite Evaluation License for extensive SystemVerilog Assertion (SVA) support, as well as industry-grade SystemVerilog and VHDL parsers!

For more information about the difference between Tabby CAD Suite and the OSS CAD Suite, please visit https://www.yosyshq.com/tabby-cad-datasheet.