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Clifford Wolf 951211856d Add fib example using tasks 
Signed-off-by: Clifford Wolf <clifford@clifford.at>
2018-03-06 00:03:54 +01:00
docs Add fib example using tasks 2018-03-06 00:03:54 +01:00
sbysrc Slightly change tasks syntax 2018-03-06 00:01:55 +01:00
.gitignore Add aiger engine 2017-02-19 23:53:01 +01:00
Makefile Add DESTDIR and PREFIX to Makefile 2018-01-17 14:35:46 +01:00
README.md Add README.md 2017-01-22 16:59:51 +01:00

README.md

SymbiYosys (sby) is a front-end driver program for Yosys-based formal hardware verification flows. See http://symbiyosys.readthedocs.io/ for documentation.