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Jannis Harder 5d3f784beb Fix a race-condition SbyProc that could truncate output
Present for a long time, but was not easy to hit. Some of my work in
progress changes made this much more likely and running the complete
test suite in parallel had a good chance of reproducing this for at
least one of the tests.
2022-07-13 16:01:49 +02:00
.github/workflows Use the test Makefile for all examples 2022-06-13 13:42:58 +02:00
docs Update autotune.rst 2022-07-11 11:10:45 +02:00
extern Fixed names and links 2021-10-31 14:42:39 +01:00
sbysrc Fix a race-condition SbyProc that could truncate output 2022-07-13 16:01:49 +02:00
tests tests: Windows fixes 2022-07-05 15:34:27 +02:00
.gitignore Add aiger engine 2017-02-19 23:53:01 +01:00
.readthedocs.yaml update docs theme 2021-11-26 20:34:55 +01:00
COPYING Fixed names and links 2021-10-31 14:42:39 +01:00
Makefile Use the test Makefile for all examples 2022-06-13 13:42:58 +02:00
README.md mention tabby+oss cad suite in readme 2022-01-04 16:32:59 +01:00

SymbiYosys (sby) is a front-end driver program for Yosys-based formal hardware verification flows. See https://yosyshq.readthedocs.io/projects/sby/ for documentation on how to use SymbiYosys.

SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the "Selecting the right engine" section of the documentation.


SymbiYosys (sby) is part of the Tabby CAD Suite and the OSS CAD Suite! The easiest way to use sby is to install the binary software suite, which contains all required dependencies, including all supported solvers.

Make sure to get a Tabby CAD Suite Evaluation License for extensive SystemVerilog Assertion (SVA) support, as well as industry-grade SystemVerilog and VHDL parsers!

For more information about the difference between Tabby CAD Suite and the OSS CAD Suite, please visit https://www.yosyshq.com/tabby-cad-datasheet.