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Claire Xen 1ffef12cf1
Update conf.py
2021-03-04 16:49:31 +01:00
docs Update conf.py 2021-03-04 16:49:31 +01:00
extern Include verilog source files for demo1.sby 2020-07-21 13:01:36 +02:00
sbysrc Fix syntax errors 2021-01-26 09:09:43 +01:00
tests fix test rule 2020-07-24 16:06:44 +02:00
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COPYING Adding top level COPYING file. 2019-04-11 15:32:32 -07:00
Makefile sed -i option is not posix, and argument syntax is incompatible between mac and linux. use redirects instead 2020-10-09 12:04:19 +02:00
README.md Adding license info to the top level README file too. 2019-04-11 15:36:19 -07:00

README.md

SymbiYosys (sby) is a front-end driver program for Yosys-based formal hardware verification flows. See http://symbiyosys.readthedocs.io/ for documentation on how to use SymbiYosys.

Many example designs using SymbiYosys have been published on the ZipCPU blog. Please consider browsing the formal verification page of the ZipCPU blog for examples and commentary.

SymbiYosys (sby) itself is licensed under the ISC license, note that the solvers and other components used by SymbiYosys come with their own license terms. There is some more details in the "Selecting the right engine" section of the documentation.