Jannis Harder 0aebf0b4d0 aig model: Call memory_map late to avoid performance issues ... This requires running simplemap on the output as memory_map produces coarse-grained cells even though we already have a fine-grained design.		2022-08-17 16:41:32 +02:00
..
sby.py	Read config before creating a workdir	2022-07-05 17:20:55 +02:00
sby_autotune.py	Refactor flow to use a common prep model	2022-08-05 16:31:15 +02:00
sby_core.py	aig model: Call memory_map late to avoid performance issues	2022-08-17 16:41:32 +02:00
sby_design.py	sby_design: Extract total memory size and forall usage	2022-06-24 13:50:26 +02:00
sby_engine_abc.py	abc pdr: Enable log output by default	2022-07-08 12:36:44 +02:00
sby_engine_aiger.py	Write native yosys witness traces	2022-08-05 16:31:15 +02:00
sby_engine_btor.py	Don't use python asserts to handle unexpected solver output	2022-06-15 13:25:21 +02:00
sby_engine_smtbmc.py	Write native yosys witness traces	2022-08-05 16:31:15 +02:00
sby_mode_bmc.py	New "none" engine to be used with the "make_model" option	2022-08-05 16:31:15 +02:00
sby_mode_cover.py	New "none" engine to be used with the "make_model" option	2022-08-05 16:31:15 +02:00
sby_mode_live.py	New "none" engine to be used with the "make_model" option	2022-08-05 16:31:15 +02:00
sby_mode_prove.py	New "none" engine to be used with the "make_model" option	2022-08-05 16:31:15 +02:00