diff --git a/docs/examples/tristate/tristates.v b/docs/examples/tristate/tristates.v
index a6be03e..a41ffc2 100644
--- a/docs/examples/tristate/tristates.v
+++ b/docs/examples/tristate/tristates.v
@@ -7,7 +7,7 @@ module module2 (input wire active, output wire tri_out);
     assign tri_out = active ? 1'b0 : 1'bz;
 endmodule
 
-module top_pass (input wire clk, input wire active1, input wire active2, output wire out);
+module top_pass (input wire clk, input wire active1, output wire out);
     module1 module1 (.active(active1), .tri_out(out));
     module2 module2 (.active(!active1), .tri_out(out));
 endmodule