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remove unused module port

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Matt Venn 2022-06-13 14:00:08 +02:00
parent 7efabe828a
commit 687ee0f011
1 changed files with 1 additions and 1 deletions
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docs/examples/tristate/tristates.v
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@ -7,7 +7,7 @@ module module2 (input wire active, output wire tri_out);
assign tri_out = active ? 1'b0 : 1'bz;
endmodule
module top_pass (input wire clk, input wire active1, input wire active2, output wire out);
module top_pass (input wire clk, input wire active1, output wire out);
module1 module1 (.active(active1), .tri_out(out));
module2 module2 (.active(!active1), .tri_out(out));
endmodule