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avoid erroring out when coarse-grain logic loops can be resolved by mapping to fine grain operators
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2 changed files with 24 additions and 0 deletions
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@ -567,6 +567,7 @@ class SbyTask(SbyConfig):
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os.makedirs(f"{self.workdir}/model")
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def print_common_prep(check):
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print("scc -select; simplemap; select -clear", file=f)
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if self.opt_multiclock:
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print("clk2fflogic", file=f)
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else:
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