From 0aebf0b4d0b0693917560972b5fb022f8f081d1c Mon Sep 17 00:00:00 2001
From: Jannis Harder <me@jix.one>
Date: Mon, 8 Aug 2022 14:25:48 +0200
Subject: [PATCH] aig model: Call memory_map late to avoid performance issues
This requires running simplemap on the output as memory_map produces
coarse-grained cells even though we already have a fine-grained design.
---
sbysrc/sby_core.py | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/sbysrc/sby_core.py b/sbysrc/sby_core.py
index 7eab277..366817f 100644
--- a/sbysrc/sby_core.py
+++ b/sbysrc/sby_core.py
@@ -726,8 +726,6 @@ class SbyTask(SbyConfig):
print(f"# running in {self.workdir}/model/", file=f)
print("read_ilang design_prep.il", file=f)
print("hierarchy -simcheck", file=f)
- print("memory_map -formal", file=f)
- print("formalff -setundef -clk2ff -ff2anyinit", file=f)
print("flatten", file=f)
print("setundef -undriven -anyseq", file=f)
print("setattr -unset keep", file=f)
@@ -735,6 +733,9 @@ class SbyTask(SbyConfig):
print("opt -full", file=f)
print("techmap", file=f)
print("opt -fast", file=f)
+ print("memory_map -formal", file=f)
+ print("formalff -clk2ff -ff2anyinit", file=f)
+ print("simplemap", file=f)
print("dffunmap", file=f)
print("abc -g AND -fast", file=f)
print("opt_clean", file=f)