#Letter# #Core 0# #Next PC# #BTB# #ITLB# #μOp Cache# #L2 TLB & Page Table Walker# #L1I Cache# #L2 Cache# #PowerISA Simple Decode# #Programmable Decoder# #Register Rename & Unit Assignment# #Register Allocator & Instruction Retire# #ALU & Branch# #ALU# #Load/Store# #L1D Cache# #DTLB# #L2 Register File# #Memory# #L3 Cache# #Other Cores# #Peripherals# #Mul# #FMul/FAdd# #Div/FDiv/FSqrt# #Needed for Initial Working CPU# #Possible Follow-on Work#