submitted programmable decoder grant proposal as well as some necessary adjustments for submission #2

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* [Register Renaming](first_arch/register_renaming.md)
* [Grants](grants/index.md)
* [First NLNet Grant Proposal -- 2024-12-324](grants/nlnet-first.md)
* [NLNet Grant Proposal: Programmable Decoder](grants/cpu_with_programmable_decoder.md)
* [NLNet Grant Proposal: Programmable Decoder -- 2025-12-681](grants/cpu_with_programmable_decoder.md)
* [Conduct](Conduct.md)
* [License](LICENSE.md)
* [GPL 3.0](gpl-3.0.md)

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# NLNet Grant Proposal -- Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed
# NLNet Grant Proposal -- Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed -- 2025-12-681
Project Name: Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed