libre-chip/website
3
0
Fork 1
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

add grant proposal: Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed #1

Merged
programmerjake merged 9 commits from programmerjake/website:add-grant-proposal-cpu-with-programmable-decoder into main 2025-12-01 02:53:21 +00:00
Conversation 4 Commits 9 Files changed 2 +1 -1
1 changed files with 1 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files
Showing only changes of commit 8bf2a914fa - Show all commits

2
src/grants/cpu_with_programmable_decoder.md
View file

@ -45,7 +45,7 @@ Estimated Budget:
* € 20000 Add the programmable decoder and µOp cache to our CPU design.
* € 20000 Build a compiler that can extract the decoder portion of QEMU using pattern matching and some symbolic execution of LLVM IR, converting to a HDL IR more suitable for hardware.
* € 15000 Write code to convert the HDL IR to a bitstream we can program into the decoder.
* € 10000 Get the fallback emulator to work, as well as misc. other parts of the compiler needed to make the whole system work together.
* € 10000 Get the fallback software decoder and the software instruction emulator to work, as well as misc. other parts of the compiler needed to make the whole system work together.
## Compare with existing/historical efforts