diff --git a/src/OPF_PowerISA_v3.1C.pdf b/src/OPF_PowerISA_v3.1C.pdf
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diff --git a/src/grants/cpu_with_programmable_decoder.md b/src/grants/cpu_with_programmable_decoder.md
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--- a/src/grants/cpu_with_programmable_decoder.md
+++ b/src/grants/cpu_with_programmable_decoder.md
@@ -1,7 +1,5 @@
 # NLNet Grant Proposal -- Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed -- 2025-12-681
 
-(Edit: [approved by NLnet](https://nlnet.nl/project/Libre-Chip-programmabledecoder/))
-
 Project Name: Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed
 
 Website/Wiki: <https://libre-chip.org/>