From 2543b1ce72de2085abda7111ab25473d8924e834 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Sun, 30 Nov 2025 19:10:03 -0800 Subject: [PATCH] add NLnet project code --- src/SUMMARY.md | 2 +- src/grants/cpu_with_programmable_decoder.md | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/SUMMARY.md b/src/SUMMARY.md index 311ac28..6a4250d 100644 --- a/src/SUMMARY.md +++ b/src/SUMMARY.md @@ -3,7 +3,7 @@ * [Register Renaming](first_arch/register_renaming.md) * [Grants](grants/index.md) * [First NLNet Grant Proposal -- 2024-12-324](grants/nlnet-first.md) - * [NLNet Grant Proposal: Programmable Decoder](grants/cpu_with_programmable_decoder.md) + * [NLNet Grant Proposal: Programmable Decoder -- 2025-12-681](grants/cpu_with_programmable_decoder.md) * [Conduct](Conduct.md) * [License](LICENSE.md) * [GPL 3.0](gpl-3.0.md) diff --git a/src/grants/cpu_with_programmable_decoder.md b/src/grants/cpu_with_programmable_decoder.md index bf89baa..d622560 100644 --- a/src/grants/cpu_with_programmable_decoder.md +++ b/src/grants/cpu_with_programmable_decoder.md @@ -1,4 +1,4 @@ -# NLNet Grant Proposal -- Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed +# NLNet Grant Proposal -- Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed -- 2025-12-681 Project Name: Libre-Chip's CPU with a Programmable Decoder to Run Multiple ISAs at Full Speed