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Add module exercising formal verification of memories #7

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programmerjake merged 1 commit from cesar/fayalite:formal_memories into master 2024-12-08 21:25:32 +00:00
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cesar commented 2024-12-08 20:25:21 +00:00
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This example is useful for testing register files, buffers, fifos, caches, etc.

This example is useful for testing register files, buffers, fifos, caches, etc.
cesar added 1 commit 2024-12-08 20:25:22 +00:00
add module exercising formal verification of memories
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2e7d685dc7
programmerjake merged commit 2e7d685dc7 into master 2024-12-08 21:25:32 +00:00
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Reference: libre-chip/fayalite#7
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