misc fixes from using new fayalite version in cpu: improve UIntInRange's API, move FormalMode to testing and add to prelude, and fix inconsistent ordering of memories in vcd #42

Merged

programmerjake merged 4 commits from programmerjake/fayalite:misc_fixes_for_cpu into master

2025-10-24 08:48:50 +00:00

Author	SHA1	Message	Date
Jacob Lifshay	7dc4417874	add test_many_memories so we catch if memories are iterated in an inconsistent order like in `838bd469ce` All checks were successful / test (pull_request) Successful in 4m44s Details / test (push) Successful in 5m22s Details	2025-10-24 01:40:30 -07:00
Jacob Lifshay	838bd469ce	change SimulationImpl::trace_memories to a BTreeMap for consistent iteration order	2025-10-24 00:53:13 -07:00
Jacob Lifshay	b6e4cd0614	move FormalMode to crate::testing and add to prelude	2025-10-24 00:14:04 -07:00
Jacob Lifshay	3e5b2f126a	make UIntInRange[Inclusive][Type] castable from/to any UInt<N> and add methods to get bit_width, start, and end	2025-10-23 23:52:41 -07:00