diff --git a/crates/fayalite/tests/sim/expected/ripple_counter.txt b/crates/fayalite/tests/sim/expected/ripple_counter.txt index e290ace..e69de29 100644 --- a/crates/fayalite/tests/sim/expected/ripple_counter.txt +++ b/crates/fayalite/tests/sim/expected/ripple_counter.txt @@ -1,1492 +0,0 @@ -Simulation { - state: State { - insns: Insns { - state_layout: StateLayout { - ty: TypeLayout { - small_slots: StatePartLayout { - len: 9, - debug_data: [ - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - ], - .. - }, - big_slots: StatePartLayout { - len: 58, - debug_data: [ - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::o", - ty: UInt<6>, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[2]", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[5]", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: UInt<1>, - }, - SlotDebugData { - name: "", - ty: UInt<1>, - }, - SlotDebugData { - name: "", - ty: UInt<2>, - }, - SlotDebugData { - name: "", - ty: UInt<2>, - }, - SlotDebugData { - name: "", - ty: UInt<1>, - }, - SlotDebugData { - name: "", - ty: UInt<3>, - }, - SlotDebugData { - name: "", - ty: UInt<3>, - }, - SlotDebugData { - name: "", - ty: UInt<1>, - }, - SlotDebugData { - name: "", - ty: UInt<4>, - }, - SlotDebugData { - name: "", - ty: UInt<4>, - }, - SlotDebugData { - name: "", - ty: UInt<1>, - }, - SlotDebugData { - name: "", - ty: UInt<5>, - }, - SlotDebugData { - name: "", - ty: UInt<5>, - }, - SlotDebugData { - name: "", - ty: UInt<1>, - }, - SlotDebugData { - name: "", - ty: UInt<6>, - }, - SlotDebugData { - name: "", - ty: UInt<6>, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", - ty: Bool, - }, - SlotDebugData { - name: ".clk", - ty: Clock, - }, - SlotDebugData { - name: ".rst", - ty: SyncReset, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: SyncReset, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.o", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::o", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", - ty: Bool, - }, - SlotDebugData { - name: ".clk", - ty: Clock, - }, - SlotDebugData { - name: ".rst", - ty: SyncReset, - }, - SlotDebugData { - name: "", - ty: Clock, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.o", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::o", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", - ty: Bool, - }, - SlotDebugData { - name: ".clk", - ty: Clock, - }, - SlotDebugData { - name: ".rst", - ty: SyncReset, - }, - SlotDebugData { - name: "", - ty: Clock, - }, - SlotDebugData { - name: "", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.o", - ty: Bool, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_5: sw_reg).sw_reg::clk", - ty: Clock, - }, - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_5: sw_reg).sw_reg::o", - ty: Bool, - }, - SlotDebugData { - name: "", - ty: Clock, - }, - ], - .. - }, - }, - memories: StatePartLayout { - len: 0, - debug_data: [], - layout_data: [], - .. - }, - }, - insns: [ - // at: module-XXXXXXXXXX.rs:9:1 - 0: Copy { - dest: StatePartIndex(54), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.o", ty: Bool }, - src: StatePartIndex(56), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_5: sw_reg).sw_reg::o", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:11:1 - 1: Copy { - dest: StatePartIndex(7), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[5]", ty: Bool }, - src: StatePartIndex(54), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.o", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 2: NotU { - dest: StatePartIndex(52), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool }, - width: 1, - }, - // at: module-XXXXXXXXXX.rs:8:1 - 3: Copy { - dest: StatePartIndex(48), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", ty: Bool }, - src: StatePartIndex(52), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:7:1 - 4: Copy { - dest: StatePartIndex(6), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", ty: Bool }, - src: StatePartIndex(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 5: Copy { - dest: StatePartIndex(57), // (0x0) SlotDebugData { name: "", ty: Clock }, - src: StatePartIndex(6), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:10:1 - 6: Copy { - dest: StatePartIndex(53), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.clk", ty: Clock }, - src: StatePartIndex(57), // (0x0) SlotDebugData { name: "", ty: Clock }, - }, - // at: module-XXXXXXXXXX.rs:9:1 - 7: Copy { - dest: StatePartIndex(55), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_5: sw_reg).sw_reg::clk", ty: Clock }, - src: StatePartIndex(53), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_5.clk", ty: Clock }, - }, - 8: Copy { - dest: StatePartIndex(43), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.o", ty: Bool }, - src: StatePartIndex(45), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::o", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:11:1 - 9: Copy { - dest: StatePartIndex(5), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", ty: Bool }, - src: StatePartIndex(43), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.o", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 10: Copy { - dest: StatePartIndex(51), // (0x0) SlotDebugData { name: "", ty: Clock }, - src: StatePartIndex(5), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", ty: Bool }, - }, - 11: NotU { - dest: StatePartIndex(41), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(36), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", ty: Bool }, - width: 1, - }, - // at: module-XXXXXXXXXX.rs:8:1 - 12: Copy { - dest: StatePartIndex(37), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", ty: Bool }, - src: StatePartIndex(41), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:7:1 - 13: Copy { - dest: StatePartIndex(4), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[2]", ty: Bool }, - src: StatePartIndex(36), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 14: Copy { - dest: StatePartIndex(46), // (0x0) SlotDebugData { name: "", ty: Clock }, - src: StatePartIndex(4), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[2]", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:10:1 - 15: Copy { - dest: StatePartIndex(42), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.clk", ty: Clock }, - src: StatePartIndex(46), // (0x0) SlotDebugData { name: "", ty: Clock }, - }, - // at: module-XXXXXXXXXX.rs:9:1 - 16: Copy { - dest: StatePartIndex(44), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::clk", ty: Clock }, - src: StatePartIndex(42), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_3.clk", ty: Clock }, - }, - 17: Copy { - dest: StatePartIndex(32), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.o", ty: Bool }, - src: StatePartIndex(34), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::o", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:11:1 - 18: Copy { - dest: StatePartIndex(3), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", ty: Bool }, - src: StatePartIndex(32), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.o", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 19: Copy { - dest: StatePartIndex(40), // (0x0) SlotDebugData { name: "", ty: Clock }, - src: StatePartIndex(3), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", ty: Bool }, - }, - 20: NotU { - dest: StatePartIndex(30), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool }, - width: 1, - }, - // at: module-XXXXXXXXXX.rs:8:1 - 21: Copy { - dest: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", ty: Bool }, - src: StatePartIndex(30), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:7:1 - 22: Copy { - dest: StatePartIndex(2), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", ty: Bool }, - src: StatePartIndex(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 23: Copy { - dest: StatePartIndex(35), // (0x0) SlotDebugData { name: "", ty: Clock }, - src: StatePartIndex(2), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:10:1 - 24: Copy { - dest: StatePartIndex(31), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.clk", ty: Clock }, - src: StatePartIndex(35), // (0x0) SlotDebugData { name: "", ty: Clock }, - }, - // at: module-XXXXXXXXXX.rs:9:1 - 25: Copy { - dest: StatePartIndex(33), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::clk", ty: Clock }, - src: StatePartIndex(31), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_1.clk", ty: Clock }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 26: Const { - dest: StatePartIndex(28), // (0x0) SlotDebugData { name: "", ty: Bool }, - value: 0x0, - }, - 27: Copy { - dest: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: SyncReset }, - src: StatePartIndex(28), // (0x0) SlotDebugData { name: "", ty: Bool }, - }, - 28: Copy { - dest: StatePartIndex(26), // (0x1) SlotDebugData { name: ".clk", ty: Clock }, - src: StatePartIndex(0), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::clk", ty: Clock }, - }, - 29: Copy { - dest: StatePartIndex(27), // (0x0) SlotDebugData { name: ".rst", ty: SyncReset }, - src: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: SyncReset }, - }, - // at: module-XXXXXXXXXX.rs:6:1 - 30: IsNonZeroDestIsSmall { - dest: StatePartIndex(2), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(26), // (0x1) SlotDebugData { name: ".clk", ty: Clock }, - }, - 31: AndSmall { - dest: StatePartIndex(1), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(2), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(0), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 32: Copy { - dest: StatePartIndex(38), // (0x0) SlotDebugData { name: ".clk", ty: Clock }, - src: StatePartIndex(40), // (0x0) SlotDebugData { name: "", ty: Clock }, - }, - 33: Copy { - dest: StatePartIndex(39), // (0x0) SlotDebugData { name: ".rst", ty: SyncReset }, - src: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: SyncReset }, - }, - // at: module-XXXXXXXXXX.rs:6:1 - 34: IsNonZeroDestIsSmall { - dest: StatePartIndex(5), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(38), // (0x0) SlotDebugData { name: ".clk", ty: Clock }, - }, - 35: AndSmall { - dest: StatePartIndex(4), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(5), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(3), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 36: Copy { - dest: StatePartIndex(49), // (0x0) SlotDebugData { name: ".clk", ty: Clock }, - src: StatePartIndex(51), // (0x0) SlotDebugData { name: "", ty: Clock }, - }, - 37: Copy { - dest: StatePartIndex(50), // (0x0) SlotDebugData { name: ".rst", ty: SyncReset }, - src: StatePartIndex(29), // (0x0) SlotDebugData { name: "", ty: SyncReset }, - }, - // at: module-XXXXXXXXXX.rs:6:1 - 38: IsNonZeroDestIsSmall { - dest: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(49), // (0x0) SlotDebugData { name: ".clk", ty: Clock }, - }, - 39: AndSmall { - dest: StatePartIndex(7), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(6), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 40: Copy { - dest: StatePartIndex(21), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(7), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[5]", ty: Bool }, - }, - 41: Shl { - dest: StatePartIndex(22), // (0x0) SlotDebugData { name: "", ty: UInt<6> }, - lhs: StatePartIndex(21), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - rhs: 5, - }, - 42: Copy { - dest: StatePartIndex(18), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(6), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[4]", ty: Bool }, - }, - 43: Shl { - dest: StatePartIndex(19), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - lhs: StatePartIndex(18), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - rhs: 4, - }, - 44: Copy { - dest: StatePartIndex(15), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(5), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[3]", ty: Bool }, - }, - 45: Shl { - dest: StatePartIndex(16), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - lhs: StatePartIndex(15), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - rhs: 3, - }, - 46: Copy { - dest: StatePartIndex(12), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(4), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[2]", ty: Bool }, - }, - 47: Shl { - dest: StatePartIndex(13), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - lhs: StatePartIndex(12), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - rhs: 2, - }, - 48: Copy { - dest: StatePartIndex(9), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(3), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[1]", ty: Bool }, - }, - 49: Shl { - dest: StatePartIndex(10), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(9), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - rhs: 1, - }, - 50: Copy { - dest: StatePartIndex(8), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(2), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bits[0]", ty: Bool }, - }, - 51: Or { - dest: StatePartIndex(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(8), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(10), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - }, - 52: Or { - dest: StatePartIndex(14), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - lhs: StatePartIndex(11), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - rhs: StatePartIndex(13), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - }, - 53: Or { - dest: StatePartIndex(17), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - lhs: StatePartIndex(14), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - rhs: StatePartIndex(16), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - }, - 54: Or { - dest: StatePartIndex(20), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - lhs: StatePartIndex(17), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - rhs: StatePartIndex(19), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - }, - 55: Or { - dest: StatePartIndex(23), // (0x0) SlotDebugData { name: "", ty: UInt<6> }, - lhs: StatePartIndex(20), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - rhs: StatePartIndex(22), // (0x0) SlotDebugData { name: "", ty: UInt<6> }, - }, - // at: module-XXXXXXXXXX.rs:5:1 - 56: Copy { - dest: StatePartIndex(1), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::o", ty: UInt<6> }, - src: StatePartIndex(23), // (0x0) SlotDebugData { name: "", ty: UInt<6> }, - }, - // at: module-XXXXXXXXXX.rs:6:1 - 57: BranchIfSmallZero { - target: 59, - value: StatePartIndex(1), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - }, - 58: Copy { - dest: StatePartIndex(24), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0", ty: Bool }, - src: StatePartIndex(25), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_0$next", ty: Bool }, - }, - 59: BranchIfSmallZero { - target: 61, - value: StatePartIndex(4), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - }, - 60: Copy { - dest: StatePartIndex(36), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2", ty: Bool }, - src: StatePartIndex(37), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_2$next", ty: Bool }, - }, - 61: BranchIfSmallZero { - target: 63, - value: StatePartIndex(7), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - }, - 62: Copy { - dest: StatePartIndex(47), // (0x0) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4", ty: Bool }, - src: StatePartIndex(48), // (0x1) SlotDebugData { name: "InstantiatedModule(ripple_counter: ripple_counter).ripple_counter::bit_reg_4$next", ty: Bool }, - }, - 63: XorSmallImmediate { - dest: StatePartIndex(0), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(2), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - rhs: 0x1, - }, - 64: XorSmallImmediate { - dest: StatePartIndex(3), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(5), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - rhs: 0x1, - }, - 65: XorSmallImmediate { - dest: StatePartIndex(6), // (0x1 1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Bool }, - rhs: 0x1, - }, - // at: module-XXXXXXXXXX.rs:1:1 - 66: Return, - ], - .. - }, - pc: 66, - memory_write_log: [], - memories: StatePart { - value: [], - }, - small_slots: StatePart { - value: [ - 0, - 0, - 1, - 1, - 0, - 0, - 1, - 0, - 0, - ], - }, - big_slots: StatePart { - value: [ - 1, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 1, - 1, - 0, - 0, - 0, - 1, - 0, - 0, - 0, - 0, - 0, - 0, - 1, - 0, - 0, - 0, - 1, - 0, - 0, - 0, - 0, - 0, - 0, - 1, - 0, - 0, - 0, - 1, - 0, - 0, - 0, - 0, - 0, - ], - }, - }, - io: Instance { - name: ::ripple_counter, - instantiated: Module { - name: ripple_counter, - .. - }, - }, - main_module: SimulationModuleState { - base_targets: [ - Instance { - name: ::ripple_counter, - instantiated: Module { - name: ripple_counter, - .. - }, - }.clk, - Instance { - name: ::ripple_counter, - instantiated: Module { - name: ripple_counter, - .. - }, - }.o, - ], - uninitialized_ios: {}, - io_targets: { - Instance { - name: ::ripple_counter, - instantiated: Module { - name: ripple_counter, - .. - }, - }.clk, - Instance { - name: ::ripple_counter, - instantiated: Module { - name: ripple_counter, - .. - }, - }.o, - }, - did_initial_settle: true, - }, - extern_modules: [ - SimulationExternModuleState { - module_state: SimulationModuleState { - base_targets: [ - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - ], - uninitialized_ios: {}, - io_targets: { - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - }, - did_initial_settle: true, - }, - sim: ExternModuleSimulation { - generator: SimGeneratorFn { - args: ( - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - ), - f: ..., - }, - source_location: SourceLocation( - module-XXXXXXXXXX-2.rs:4:1, - ), - }, - running_generator: Some( - ..., - ), - wait_targets: { - Change { - key: CompiledValue { - layout: CompiledTypeLayout { - ty: Clock, - layout: TypeLayout { - small_slots: StatePartLayout { - len: 0, - debug_data: [], - .. - }, - big_slots: StatePartLayout { - len: 1, - debug_data: [ - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_1: sw_reg).sw_reg::clk", - ty: Clock, - }, - ], - .. - }, - }, - body: Scalar, - }, - range: TypeIndexRange { - small_slots: StatePartIndexRange { start: 3, len: 0 }, - big_slots: StatePartIndexRange { start: 33, len: 1 }, - }, - write: None, - }, - value: SimValue { - ty: Clock, - bits: 0x0, - }, - }, - }, - }, - SimulationExternModuleState { - module_state: SimulationModuleState { - base_targets: [ - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - ], - uninitialized_ios: {}, - io_targets: { - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - }, - did_initial_settle: true, - }, - sim: ExternModuleSimulation { - generator: SimGeneratorFn { - args: ( - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - ), - f: ..., - }, - source_location: SourceLocation( - module-XXXXXXXXXX-2.rs:4:1, - ), - }, - running_generator: Some( - ..., - ), - wait_targets: { - Change { - key: CompiledValue { - layout: CompiledTypeLayout { - ty: Clock, - layout: TypeLayout { - small_slots: StatePartLayout { - len: 0, - debug_data: [], - .. - }, - big_slots: StatePartLayout { - len: 1, - debug_data: [ - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_3: sw_reg).sw_reg::clk", - ty: Clock, - }, - ], - .. - }, - }, - body: Scalar, - }, - range: TypeIndexRange { - small_slots: StatePartIndexRange { start: 6, len: 0 }, - big_slots: StatePartIndexRange { start: 44, len: 1 }, - }, - write: None, - }, - value: SimValue { - ty: Clock, - bits: 0x0, - }, - }, - }, - }, - SimulationExternModuleState { - module_state: SimulationModuleState { - base_targets: [ - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - ], - uninitialized_ios: {}, - io_targets: { - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - }, - did_initial_settle: true, - }, - sim: ExternModuleSimulation { - generator: SimGeneratorFn { - args: ( - ModuleIO { - name: sw_reg::clk, - is_input: true, - ty: Clock, - .. - }, - ModuleIO { - name: sw_reg::o, - is_input: false, - ty: Bool, - .. - }, - ), - f: ..., - }, - source_location: SourceLocation( - module-XXXXXXXXXX-2.rs:4:1, - ), - }, - running_generator: Some( - ..., - ), - wait_targets: { - Change { - key: CompiledValue { - layout: CompiledTypeLayout { - ty: Clock, - layout: TypeLayout { - small_slots: StatePartLayout { - len: 0, - debug_data: [], - .. - }, - big_slots: StatePartLayout { - len: 1, - debug_data: [ - SlotDebugData { - name: "InstantiatedModule(ripple_counter.bit_reg_5: sw_reg).sw_reg::clk", - ty: Clock, - }, - ], - .. - }, - }, - body: Scalar, - }, - range: TypeIndexRange { - small_slots: StatePartIndexRange { start: 9, len: 0 }, - big_slots: StatePartIndexRange { start: 55, len: 1 }, - }, - write: None, - }, - value: SimValue { - ty: Clock, - bits: 0x0, - }, - }, - }, - }, - ], - state_ready_to_run: false, - trace_decls: TraceModule { - name: "ripple_counter", - children: [ - TraceModuleIO { - name: "clk", - child: TraceClock { - location: TraceScalarId(0), - name: "clk", - flow: Source, - }, - ty: Clock, - flow: Source, - }, - TraceModuleIO { - name: "o", - child: TraceUInt { - location: TraceScalarId(1), - name: "o", - ty: UInt<6>, - flow: Sink, - }, - ty: UInt<6>, - flow: Sink, - }, - TraceWire { - name: "bits", - child: TraceArray { - name: "bits", - elements: [ - TraceBool { - location: TraceScalarId(2), - name: "[0]", - flow: Duplex, - }, - TraceBool { - location: TraceScalarId(3), - name: "[1]", - flow: Duplex, - }, - TraceBool { - location: TraceScalarId(4), - name: "[2]", - flow: Duplex, - }, - TraceBool { - location: TraceScalarId(5), - name: "[3]", - flow: Duplex, - }, - TraceBool { - location: TraceScalarId(6), - name: "[4]", - flow: Duplex, - }, - TraceBool { - location: TraceScalarId(7), - name: "[5]", - flow: Duplex, - }, - ], - ty: Array, - flow: Duplex, - }, - ty: Array, - }, - TraceReg { - name: "bit_reg_0", - child: TraceBool { - location: TraceScalarId(8), - name: "bit_reg_0", - flow: Duplex, - }, - ty: Bool, - }, - TraceInstance { - name: "bit_reg_1", - instance_io: TraceBundle { - name: "bit_reg_1", - fields: [ - TraceClock { - location: TraceScalarId(11), - name: "clk", - flow: Sink, - }, - TraceBool { - location: TraceScalarId(12), - name: "o", - flow: Source, - }, - ], - ty: Bundle { - #[hdl(flip)] /* offset = 0 */ - clk: Clock, - /* offset = 1 */ - o: Bool, - }, - flow: Source, - }, - module: TraceModule { - name: "sw_reg", - children: [ - TraceModuleIO { - name: "clk", - child: TraceClock { - location: TraceScalarId(9), - name: "clk", - flow: Source, - }, - ty: Clock, - flow: Source, - }, - TraceModuleIO { - name: "o", - child: TraceBool { - location: TraceScalarId(10), - name: "o", - flow: Sink, - }, - ty: Bool, - flow: Sink, - }, - ], - }, - ty: Bundle { - #[hdl(flip)] /* offset = 0 */ - clk: Clock, - /* offset = 1 */ - o: Bool, - }, - }, - TraceReg { - name: "bit_reg_2", - child: TraceBool { - location: TraceScalarId(13), - name: "bit_reg_2", - flow: Duplex, - }, - ty: Bool, - }, - TraceInstance { - name: "bit_reg_3", - instance_io: TraceBundle { - name: "bit_reg_3", - fields: [ - TraceClock { - location: TraceScalarId(16), - name: "clk", - flow: Sink, - }, - TraceBool { - location: TraceScalarId(17), - name: "o", - flow: Source, - }, - ], - ty: Bundle { - #[hdl(flip)] /* offset = 0 */ - clk: Clock, - /* offset = 1 */ - o: Bool, - }, - flow: Source, - }, - module: TraceModule { - name: "sw_reg", - children: [ - TraceModuleIO { - name: "clk", - child: TraceClock { - location: TraceScalarId(14), - name: "clk", - flow: Source, - }, - ty: Clock, - flow: Source, - }, - TraceModuleIO { - name: "o", - child: TraceBool { - location: TraceScalarId(15), - name: "o", - flow: Sink, - }, - ty: Bool, - flow: Sink, - }, - ], - }, - ty: Bundle { - #[hdl(flip)] /* offset = 0 */ - clk: Clock, - /* offset = 1 */ - o: Bool, - }, - }, - TraceReg { - name: "bit_reg_4", - child: TraceBool { - location: TraceScalarId(18), - name: "bit_reg_4", - flow: Duplex, - }, - ty: Bool, - }, - TraceInstance { - name: "bit_reg_5", - instance_io: TraceBundle { - name: "bit_reg_5", - fields: [ - TraceClock { - location: TraceScalarId(21), - name: "clk", - flow: Sink, - }, - TraceBool { - location: TraceScalarId(22), - name: "o", - flow: Source, - }, - ], - ty: Bundle { - #[hdl(flip)] /* offset = 0 */ - clk: Clock, - /* offset = 1 */ - o: Bool, - }, - flow: Source, - }, - module: TraceModule { - name: "sw_reg", - children: [ - TraceModuleIO { - name: "clk", - child: TraceClock { - location: TraceScalarId(19), - name: "clk", - flow: Source, - }, - ty: Clock, - flow: Source, - }, - TraceModuleIO { - name: "o", - child: TraceBool { - location: TraceScalarId(20), - name: "o", - flow: Sink, - }, - ty: Bool, - flow: Sink, - }, - ], - }, - ty: Bundle { - #[hdl(flip)] /* offset = 0 */ - clk: Clock, - /* offset = 1 */ - o: Bool, - }, - }, - ], - }, - traces: [ - SimTrace { - id: TraceScalarId(0), - kind: BigClock { - index: StatePartIndex(0), - }, - state: 0x1, - last_state: 0x1, - }, - SimTrace { - id: TraceScalarId(1), - kind: BigUInt { - index: StatePartIndex(1), - ty: UInt<6>, - }, - state: 0x00, - last_state: 0x00, - }, - SimTrace { - id: TraceScalarId(2), - kind: BigBool { - index: StatePartIndex(2), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(3), - kind: BigBool { - index: StatePartIndex(3), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(4), - kind: BigBool { - index: StatePartIndex(4), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(5), - kind: BigBool { - index: StatePartIndex(5), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(6), - kind: BigBool { - index: StatePartIndex(6), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(7), - kind: BigBool { - index: StatePartIndex(7), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(8), - kind: BigBool { - index: StatePartIndex(24), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(9), - kind: BigClock { - index: StatePartIndex(33), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(10), - kind: BigBool { - index: StatePartIndex(34), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(11), - kind: BigClock { - index: StatePartIndex(31), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(12), - kind: BigBool { - index: StatePartIndex(32), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(13), - kind: BigBool { - index: StatePartIndex(36), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(14), - kind: BigClock { - index: StatePartIndex(44), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(15), - kind: BigBool { - index: StatePartIndex(45), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(16), - kind: BigClock { - index: StatePartIndex(42), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(17), - kind: BigBool { - index: StatePartIndex(43), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(18), - kind: BigBool { - index: StatePartIndex(47), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(19), - kind: BigClock { - index: StatePartIndex(55), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(20), - kind: BigBool { - index: StatePartIndex(56), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(21), - kind: BigClock { - index: StatePartIndex(53), - }, - state: 0x0, - last_state: 0x0, - }, - SimTrace { - id: TraceScalarId(22), - kind: BigBool { - index: StatePartIndex(54), - }, - state: 0x0, - last_state: 0x0, - }, - ], - trace_memories: {}, - trace_writers: [ - Running( - VcdWriter { - finished_init: true, - timescale: 1 ps, - .. - }, - ), - ], - instant: 256 μs, - clocks_triggered: [ - StatePartIndex(1), - StatePartIndex(4), - StatePartIndex(7), - ], - .. -} \ No newline at end of file