diff --git a/crates/fayalite-proc-macros-impl/src/hdl_type_common.rs b/crates/fayalite-proc-macros-impl/src/hdl_type_common.rs index 6193dc3..3f3f817 100644 --- a/crates/fayalite-proc-macros-impl/src/hdl_type_common.rs +++ b/crates/fayalite-proc-macros-impl/src/hdl_type_common.rs @@ -2044,7 +2044,6 @@ pub(crate) mod known_items { impl_known_item!(::fayalite::int::Size); impl_known_item!(::fayalite::int::UInt); impl_known_item!(::fayalite::int::UIntType); - impl_known_item!(::fayalite::reset::ResetType); impl_known_item!(::fayalite::ty::CanonicalType); impl_known_item!(::fayalite::ty::StaticType); impl_known_item!(::fayalite::ty::Type); @@ -2240,7 +2239,6 @@ impl_bounds! { EnumType, IntType, KnownSize, - ResetType, Size, StaticType, Type, @@ -2254,7 +2252,6 @@ impl_bounds! { BundleType, EnumType, IntType, - ResetType, StaticType, Type, } @@ -2267,7 +2264,6 @@ impl From for ParsedBound { ParsedTypeBound::BundleType(v) => ParsedBound::BundleType(v), ParsedTypeBound::EnumType(v) => ParsedBound::EnumType(v), ParsedTypeBound::IntType(v) => ParsedBound::IntType(v), - ParsedTypeBound::ResetType(v) => ParsedBound::ResetType(v), ParsedTypeBound::StaticType(v) => ParsedBound::StaticType(v), ParsedTypeBound::Type(v) => ParsedBound::Type(v), } @@ -2281,7 +2277,6 @@ impl From for ParsedBounds { BundleType, EnumType, IntType, - ResetType, StaticType, Type, } = value; @@ -2291,7 +2286,6 @@ impl From for ParsedBounds { EnumType, IntType, KnownSize: None, - ResetType, Size: None, StaticType, Type, @@ -2320,11 +2314,6 @@ impl ParsedTypeBound { ParsedTypeBound::BoolOrIntType(known_items::BoolOrIntType(span)), ParsedTypeBound::Type(known_items::Type(span)), ]), - Self::ResetType(v) => ParsedTypeBounds::from_iter([ - ParsedTypeBound::from(v), - ParsedTypeBound::StaticType(known_items::StaticType(span)), - ParsedTypeBound::Type(known_items::Type(span)), - ]), Self::StaticType(v) => ParsedTypeBounds::from_iter([ ParsedTypeBound::from(v), ParsedTypeBound::Type(known_items::Type(span)), @@ -2360,7 +2349,6 @@ impl From for ParsedBounds { EnumType: None, IntType: None, KnownSize, - ResetType: None, Size, StaticType: None, Type: None, @@ -2437,7 +2425,6 @@ impl ParsedBound { Self::EnumType(v) => ParsedBoundCategory::Type(ParsedTypeBound::EnumType(v)), Self::IntType(v) => ParsedBoundCategory::Type(ParsedTypeBound::IntType(v)), Self::KnownSize(v) => ParsedBoundCategory::SizeType(ParsedSizeTypeBound::KnownSize(v)), - Self::ResetType(v) => ParsedBoundCategory::Type(ParsedTypeBound::ResetType(v)), Self::Size(v) => ParsedBoundCategory::SizeType(ParsedSizeTypeBound::Size(v)), Self::StaticType(v) => ParsedBoundCategory::Type(ParsedTypeBound::StaticType(v)), Self::Type(v) => ParsedBoundCategory::Type(ParsedTypeBound::Type(v)), @@ -3323,8 +3310,7 @@ impl ParsedGenerics { ParsedTypeBound::BoolOrIntType(_) | ParsedTypeBound::BundleType(_) | ParsedTypeBound::EnumType(_) - | ParsedTypeBound::IntType(_) - | ParsedTypeBound::ResetType(_) => { + | ParsedTypeBound::IntType(_) => { errors.error(bound, "bound on mask type not implemented"); } ParsedTypeBound::StaticType(bound) => { diff --git a/crates/fayalite/src/clock.rs b/crates/fayalite/src/clock.rs index 711432b..fe99653 100644 --- a/crates/fayalite/src/clock.rs +++ b/crates/fayalite/src/clock.rs @@ -4,7 +4,7 @@ use crate::{ expr::{Expr, ToExpr}, hdl, int::Bool, - reset::{Reset, ResetType}, + reset::Reset, source_location::SourceLocation, ty::{impl_match_variant_as_self, CanonicalType, StaticType, Type, TypeProperties}, }; @@ -88,9 +88,9 @@ impl ToClock for Expr { } #[hdl] -pub struct ClockDomain { +pub struct ClockDomain { pub clk: Clock, - pub rst: R, + pub rst: Reset, } impl ToClock for bool { diff --git a/crates/fayalite/src/expr.rs b/crates/fayalite/src/expr.rs index f0008f4..fa50852 100644 --- a/crates/fayalite/src/expr.rs +++ b/crates/fayalite/src/expr.rs @@ -17,7 +17,6 @@ use crate::{ Instance, ModuleIO, }, reg::Reg, - reset::{AsyncReset, Reset, ResetType, ResetTypeDispatch, SyncReset}, ty::{CanonicalType, StaticType, Type, TypeWithDeref}, wire::Wire, }; @@ -210,9 +209,7 @@ expr_enum! { ModuleIO(ModuleIO), Instance(Instance), Wire(Wire), - Reg(Reg), - RegSync(Reg), - RegAsync(Reg), + Reg(Reg), MemPort(MemPort), } } @@ -596,42 +593,25 @@ impl GetTarget for Wire { } } -impl ToExpr for Reg { +impl ToExpr for Reg { type Type = T; fn to_expr(&self) -> Expr { - struct Dispatch; - impl ResetTypeDispatch for Dispatch { - type Input = Reg; - type Output = ExprEnum; - - fn reset(self, input: Self::Input) -> Self::Output { - ExprEnum::Reg(input) - } - - fn sync_reset(self, input: Self::Input) -> Self::Output { - ExprEnum::RegSync(input) - } - - fn async_reset(self, input: Self::Input) -> Self::Output { - ExprEnum::RegAsync(input) - } - } Expr { - __enum: R::dispatch(self.canonical(), Dispatch).intern_sized(), + __enum: ExprEnum::Reg(self.canonical()).intern_sized(), __ty: self.ty(), __flow: self.flow(), } } } -impl ToLiteralBits for Reg { +impl ToLiteralBits for Reg { fn to_literal_bits(&self) -> Result, NotALiteralExpr> { Err(NotALiteralExpr) } } -impl GetTarget for Reg { +impl GetTarget for Reg { fn target(&self) -> Option> { Some(Intern::intern_sized(self.canonical().into())) } diff --git a/crates/fayalite/src/expr/target.rs b/crates/fayalite/src/expr/target.rs index 8f39e13..849be00 100644 --- a/crates/fayalite/src/expr/target.rs +++ b/crates/fayalite/src/expr/target.rs @@ -8,7 +8,6 @@ use crate::{ memory::{DynPortType, MemPort}, module::{Instance, ModuleIO, TargetName}, reg::Reg, - reset::{AsyncReset, Reset, ResetType, ResetTypeDispatch, SyncReset}, source_location::SourceLocation, ty::{CanonicalType, Type}, wire::Wire, @@ -128,7 +127,6 @@ macro_rules! impl_target_base { $(#[$enum_meta:meta])* $enum_vis:vis enum $TargetBase:ident { $( - $(#[from = $from:ident])? #[is = $is_fn:ident] #[to = $to_fn:ident] $(#[$variant_meta:meta])* @@ -152,19 +150,19 @@ macro_rules! impl_target_base { } } - $($( + $( impl From<$VariantTy> for $TargetBase { - fn $from(value: $VariantTy) -> Self { + fn from(value: $VariantTy) -> Self { Self::$Variant(value) } } impl From<$VariantTy> for Target { - fn $from(value: $VariantTy) -> Self { + fn from(value: $VariantTy) -> Self { $TargetBase::$Variant(value).into() } } - )*)? + )* impl $TargetBase { $( @@ -201,63 +199,24 @@ macro_rules! impl_target_base { impl_target_base! { #[derive(Copy, Clone, PartialEq, Eq, Hash)] pub enum TargetBase { - #[from = from] #[is = is_module_io] #[to = module_io] ModuleIO(ModuleIO), - #[from = from] #[is = is_mem_port] #[to = mem_port] MemPort(MemPort), #[is = is_reg] #[to = reg] - Reg(Reg), - #[is = is_reg_sync] - #[to = reg_sync] - RegSync(Reg), - #[is = is_reg_async] - #[to = reg_async] - RegAsync(Reg), - #[from = from] + Reg(Reg), #[is = is_wire] #[to = wire] Wire(Wire), - #[from = from] #[is = is_instance] #[to = instance] Instance(Instance), } } -impl From> for TargetBase { - fn from(value: Reg) -> Self { - struct Dispatch; - impl ResetTypeDispatch for Dispatch { - type Input = Reg; - type Output = TargetBase; - - fn reset(self, input: Self::Input) -> Self::Output { - TargetBase::Reg(input) - } - - fn sync_reset(self, input: Self::Input) -> Self::Output { - TargetBase::RegSync(input) - } - - fn async_reset(self, input: Self::Input) -> Self::Output { - TargetBase::RegAsync(input) - } - } - R::dispatch(value, Dispatch) - } -} - -impl From> for Target { - fn from(value: Reg) -> Self { - TargetBase::from(value).into() - } -} - impl fmt::Display for TargetBase { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { write!(f, "{:?}", self.target_name()) @@ -270,8 +229,6 @@ impl TargetBase { TargetBase::ModuleIO(v) => TargetName(v.scoped_name(), None), TargetBase::MemPort(v) => TargetName(v.mem_name(), Some(v.port_name())), TargetBase::Reg(v) => TargetName(v.scoped_name(), None), - TargetBase::RegSync(v) => TargetName(v.scoped_name(), None), - TargetBase::RegAsync(v) => TargetName(v.scoped_name(), None), TargetBase::Wire(v) => TargetName(v.scoped_name(), None), TargetBase::Instance(v) => TargetName(v.scoped_name(), None), } @@ -281,8 +238,6 @@ impl TargetBase { TargetBase::ModuleIO(v) => v.ty(), TargetBase::MemPort(v) => v.ty().canonical(), TargetBase::Reg(v) => v.ty(), - TargetBase::RegSync(v) => v.ty(), - TargetBase::RegAsync(v) => v.ty(), TargetBase::Wire(v) => v.ty(), TargetBase::Instance(v) => v.ty().canonical(), } diff --git a/crates/fayalite/src/firrtl.rs b/crates/fayalite/src/firrtl.rs index ea76cf8..bc75ccc 100644 --- a/crates/fayalite/src/firrtl.rs +++ b/crates/fayalite/src/firrtl.rs @@ -31,7 +31,7 @@ use crate::{ StmtConnect, StmtDeclaration, StmtFormal, StmtIf, StmtInstance, StmtMatch, StmtReg, StmtWire, }, - reset::{AsyncReset, Reset, ResetType, SyncReset}, + reset::{AsyncReset, Reset, SyncReset}, source_location::SourceLocation, ty::{CanonicalType, Type}, util::{ @@ -1739,14 +1739,6 @@ impl<'a> Exporter<'a> { assert!(!const_ty, "not a constant"); self.module.ns.get(expr.scoped_name().1).to_string() } - ExprEnum::RegSync(expr) => { - assert!(!const_ty, "not a constant"); - self.module.ns.get(expr.scoped_name().1).to_string() - } - ExprEnum::RegAsync(expr) => { - assert!(!const_ty, "not a constant"); - self.module.ns.get(expr.scoped_name().1).to_string() - } ExprEnum::MemPort(expr) => { assert!(!const_ty, "not a constant"); let mem_name = self.module.ns.get(expr.mem_name().1); @@ -1856,8 +1848,6 @@ impl<'a> Exporter<'a> { self.module.ns.get(v.mem_name().1) } TargetBase::Reg(v) => self.module.ns.get(v.name_id()), - TargetBase::RegSync(v) => self.module.ns.get(v.name_id()), - TargetBase::RegAsync(v) => self.module.ns.get(v.name_id()), TargetBase::Wire(v) => self.module.ns.get(v.name_id()), TargetBase::Instance(v) => self.module.ns.get(v.name_id()), }; @@ -1966,37 +1956,6 @@ impl<'a> Exporter<'a> { drop(memory_indent); Ok(body) } - fn stmt_reg( - &mut self, - stmt_reg: StmtReg, - module_name: Ident, - definitions: &RcDefinitions, - body: &mut String, - ) { - let StmtReg { annotations, reg } = stmt_reg; - let indent = self.indent; - self.targeted_annotations(module_name, vec![], &annotations); - let name = self.module.ns.get(reg.name_id()); - let ty = self.type_state.ty(reg.ty()); - let clk = self.expr(Expr::canonical(reg.clock_domain().clk), definitions, false); - if let Some(init) = reg.init() { - let rst = self.expr(Expr::canonical(reg.clock_domain().rst), definitions, false); - let init = self.expr(init, definitions, false); - writeln!( - body, - "{indent}regreset {name}: {ty}, {clk}, {rst}, {init}{}", - FileInfo::new(reg.source_location()), - ) - .unwrap(); - } else { - writeln!( - body, - "{indent}reg {name}: {ty}, {clk}{}", - FileInfo::new(reg.source_location()), - ) - .unwrap(); - } - } fn block( &mut self, module: Interned>, @@ -2167,14 +2126,30 @@ impl<'a> Exporter<'a> { ) .unwrap(); } - Stmt::Declaration(StmtDeclaration::Reg(stmt_reg)) => { - self.stmt_reg(stmt_reg, module_name, &definitions, &mut body); - } - Stmt::Declaration(StmtDeclaration::RegSync(stmt_reg)) => { - self.stmt_reg(stmt_reg, module_name, &definitions, &mut body); - } - Stmt::Declaration(StmtDeclaration::RegAsync(stmt_reg)) => { - self.stmt_reg(stmt_reg, module_name, &definitions, &mut body); + Stmt::Declaration(StmtDeclaration::Reg(StmtReg { annotations, reg })) => { + self.targeted_annotations(module_name, vec![], &annotations); + let name = self.module.ns.get(reg.name_id()); + let ty = self.type_state.ty(reg.ty()); + let clk = + self.expr(Expr::canonical(reg.clock_domain().clk), &definitions, false); + if let Some(init) = reg.init() { + let rst = + self.expr(Expr::canonical(reg.clock_domain().rst), &definitions, false); + let init = self.expr(init, &definitions, false); + writeln!( + body, + "{indent}regreset {name}: {ty}, {clk}, {rst}, {init}{}", + FileInfo::new(reg.source_location()), + ) + .unwrap(); + } else { + writeln!( + body, + "{indent}reg {name}: {ty}, {clk}{}", + FileInfo::new(reg.source_location()), + ) + .unwrap(); + } } Stmt::Declaration(StmtDeclaration::Instance(StmtInstance { annotations, diff --git a/crates/fayalite/src/module.rs b/crates/fayalite/src/module.rs index 5a18ac9..915bf43 100644 --- a/crates/fayalite/src/module.rs +++ b/crates/fayalite/src/module.rs @@ -20,7 +20,6 @@ use crate::{ intern::{Intern, Interned}, memory::{Mem, MemBuilder, MemBuilderTarget, PortName}, reg::Reg, - reset::{AsyncReset, Reset, ResetType, ResetTypeDispatch, SyncReset}, source_location::SourceLocation, ty::{CanonicalType, Type}, util::ScopedRef, @@ -351,7 +350,7 @@ macro_rules! wrapper_enum { $(#[$enum_meta:meta])* $vis:vis enum $enum_name:ident<$T_enum:ident: $T_bound:ident = $T_enum_default:ident> { $( - #[is = $is_fn:ident, as_ref = $as_ref_fn:ident $(, from = $from:ident)?] + #[is = $is_fn:ident, as_ref = $as_ref_fn:ident] $(#[$variant_meta:meta])* $Variant:ident($VariantTy:ty), )* @@ -363,7 +362,7 @@ macro_rules! wrapper_enum { $(#[$enum_meta])* $vis enum $enum_name<$T_enum: $T_bound = $T_enum_default> { $( - #[is = $is_fn, as_ref = $as_ref_fn $(, from = $from)?] + #[is = $is_fn, as_ref = $as_ref_fn] $(#[$variant_meta])* $Variant($VariantTy), )* @@ -390,7 +389,7 @@ macro_rules! wrapper_enum { $(#[$enum_meta:meta])* $vis:vis enum $enum_name:ident<$T_enum:ident: $T_bound:ident = $T_enum_default:ident> { $( - #[is = $is_fn:ident, as_ref = $as_ref_fn:ident $(, from = $from:ident)?] + #[is = $is_fn:ident, as_ref = $as_ref_fn:ident] $(#[$variant_meta:meta])* $Variant:ident($VariantTy:ty), )* @@ -402,22 +401,22 @@ macro_rules! wrapper_enum { $(#[$enum_meta])* $vis enum $enum_name<$T_enum: $T_bound = $T_enum_default> { $( - #[is = $is_fn, as_ref = $as_ref_fn $(, from = $from)?] + #[is = $is_fn, as_ref = $as_ref_fn] $(#[$variant_meta])* $Variant($VariantTy), )* } } - $($( + $( wrapper_enum! { impl $T_to From<$VariantTy> for $to_type { - fn $from(value: $VariantTy) -> Self { + fn from(value: $VariantTy) -> Self { $enum_name::$Variant(value).into() } } } - )?)* + )* }; ( #[impl()] @@ -425,7 +424,7 @@ macro_rules! wrapper_enum { $(#[$enum_meta:meta])* $vis:vis enum $enum_name:ident<$T_enum:ident: $T_bound:ident = $T_enum_default:ident> { $( - #[is = $is_fn:ident, as_ref = $as_ref_fn:ident $(, from = $from:ident)?] + #[is = $is_fn:ident, as_ref = $as_ref_fn:ident] $(#[$variant_meta:meta])* $Variant:ident($VariantTy:ty), )* @@ -467,12 +466,12 @@ pub struct StmtWire { impl Copy for StmtWire {} #[derive(Hash, Clone, PartialEq, Eq, Debug)] -pub struct StmtReg { +pub struct StmtReg { pub annotations: S::StmtAnnotations, - pub reg: Reg, + pub reg: Reg, } -impl Copy for StmtReg {} +impl Copy for StmtReg {} #[derive(Clone, PartialEq, Eq, Hash, Debug)] pub struct StmtInstance { @@ -490,57 +489,22 @@ wrapper_enum! { #[to(() StmtDeclaration, () Stmt)] #[derive(Clone, PartialEq, Eq, Hash)] pub enum StmtDeclaration { - #[is = is_wire, as_ref = wire, from = from] + #[is = is_wire, as_ref = wire] Wire(StmtWire), #[is = is_reg, as_ref = reg] - Reg(StmtReg), - #[is = is_reg_sync, as_ref = reg_sync] - RegSync(StmtReg), - #[is = is_reg_async, as_ref = reg_async] - RegAsync(StmtReg), - #[is = is_instance, as_ref = instance, from = from] + Reg(StmtReg), + #[is = is_instance, as_ref = instance] Instance(StmtInstance), } } impl Copy for StmtDeclaration {} -impl From> for Stmt { - fn from(value: StmtReg) -> Self { - StmtDeclaration::from(value).into() - } -} - -impl From> for StmtDeclaration { - fn from(value: StmtReg) -> Self { - struct Dispatch(PhantomData); - impl ResetTypeDispatch for Dispatch { - type Input = StmtReg; - type Output = StmtDeclaration; - - fn reset(self, input: Self::Input) -> Self::Output { - StmtDeclaration::Reg(input) - } - - fn sync_reset(self, input: Self::Input) -> Self::Output { - StmtDeclaration::RegSync(input) - } - - fn async_reset(self, input: Self::Input) -> Self::Output { - StmtDeclaration::RegAsync(input) - } - } - R::dispatch(value, Dispatch(PhantomData)) - } -} - impl StmtDeclaration { pub fn annotations(&self) -> S::StmtAnnotations { match self { StmtDeclaration::Wire(v) => v.annotations, StmtDeclaration::Reg(v) => v.annotations, - StmtDeclaration::RegSync(v) => v.annotations, - StmtDeclaration::RegAsync(v) => v.annotations, StmtDeclaration::Instance(v) => v.annotations, } } @@ -548,8 +512,6 @@ impl StmtDeclaration { match self { StmtDeclaration::Wire(v) => v.wire.source_location(), StmtDeclaration::Reg(v) => v.reg.source_location(), - StmtDeclaration::RegSync(v) => v.reg.source_location(), - StmtDeclaration::RegAsync(v) => v.reg.source_location(), StmtDeclaration::Instance(v) => v.instance.source_location(), } } @@ -557,26 +519,20 @@ impl StmtDeclaration { match self { StmtDeclaration::Wire(v) => v.wire.scoped_name(), StmtDeclaration::Reg(v) => v.reg.scoped_name(), - StmtDeclaration::RegSync(v) => v.reg.scoped_name(), - StmtDeclaration::RegAsync(v) => v.reg.scoped_name(), StmtDeclaration::Instance(v) => v.instance.scoped_name(), } } pub fn sub_stmt_blocks(&self) -> &[S::Block] { match self { - StmtDeclaration::Wire(_) - | StmtDeclaration::Reg(_) - | StmtDeclaration::RegSync(_) - | StmtDeclaration::RegAsync(_) - | StmtDeclaration::Instance(_) => &[], + StmtDeclaration::Wire(_) | StmtDeclaration::Reg(_) | StmtDeclaration::Instance(_) => { + &[] + } } } pub fn canonical_ty(&self) -> CanonicalType { match self { StmtDeclaration::Wire(v) => v.wire.ty(), StmtDeclaration::Reg(v) => v.reg.ty(), - StmtDeclaration::RegSync(v) => v.reg.ty(), - StmtDeclaration::RegAsync(v) => v.reg.ty(), StmtDeclaration::Instance(v) => CanonicalType::Bundle(v.instance.ty()), } } @@ -587,15 +543,15 @@ wrapper_enum! { #[to(() Stmt)] #[derive(Clone, PartialEq, Eq, Hash)] pub enum Stmt { - #[is = is_connect, as_ref = connect, from = from] + #[is = is_connect, as_ref = connect] Connect(StmtConnect), - #[is = is_formal, as_ref = formal, from = from] + #[is = is_formal, as_ref = formal] Formal(StmtFormal), - #[is = is_if, as_ref = if_, from = from] + #[is = is_if, as_ref = if_] If(StmtIf), - #[is = is_match, as_ref = match_, from = from] + #[is = is_match, as_ref = match_] Match(StmtMatch), - #[is = is_declaration, as_ref = declaration, from = from] + #[is = is_declaration, as_ref = declaration] Declaration(StmtDeclaration), } } @@ -1026,14 +982,6 @@ impl From> for NormalModuleBody { annotations: (), reg, }) => StmtReg { annotations, reg }.into(), - StmtDeclaration::RegSync(StmtReg { - annotations: (), - reg, - }) => StmtReg { annotations, reg }.into(), - StmtDeclaration::RegAsync(StmtReg { - annotations: (), - reg, - }) => StmtReg { annotations, reg }.into(), StmtDeclaration::Instance(StmtInstance { annotations: (), instance, @@ -1737,14 +1685,6 @@ impl AssertValidityState { annotations: _, reg, })) => self.insert_new_base(TargetBase::intern_sized(reg.into()), block), - Stmt::Declaration(StmtDeclaration::RegSync(StmtReg { - annotations: _, - reg, - })) => self.insert_new_base(TargetBase::intern_sized(reg.into()), block), - Stmt::Declaration(StmtDeclaration::RegAsync(StmtReg { - annotations: _, - reg, - })) => self.insert_new_base(TargetBase::intern_sized(reg.into()), block), Stmt::Declaration(StmtDeclaration::Instance(StmtInstance { annotations: _, instance, @@ -1926,10 +1866,10 @@ impl RegBuilder { } impl RegBuilder<(), I, T> { - pub fn clock_domain( + pub fn clock_domain( self, - clock_domain: impl ToExpr>, - ) -> RegBuilder>, I, T> { + clock_domain: impl ToExpr, + ) -> RegBuilder, I, T> { let Self { name, source_location, @@ -1947,7 +1887,7 @@ impl RegBuilder<(), I, T> { } } -impl RegBuilder>, Option>, T> { +impl RegBuilder, Option>, T> { #[track_caller] pub fn build(self) -> Expr { let Self { @@ -2272,16 +2212,6 @@ pub fn annotate(target: Expr, annotations: impl IntoAnnotations) { reg, } .into(), - TargetBase::RegSync(reg) => StmtReg { - annotations: (), - reg, - } - .into(), - TargetBase::RegAsync(reg) => StmtReg { - annotations: (), - reg, - } - .into(), TargetBase::Wire(wire) => StmtWire { annotations: (), wire, @@ -2768,5 +2698,5 @@ pub struct TargetInInstantiatedModule { #[derive(Debug, PartialEq, Eq, Hash, Clone, Copy)] pub struct ExprInInstantiatedModule { pub instantiated_module: InstantiatedModule, - pub expr: Expr, + pub target: Expr, } diff --git a/crates/fayalite/src/module/transform/simplify_enums.rs b/crates/fayalite/src/module/transform/simplify_enums.rs index 4eb0d0c..bb57cf0 100644 --- a/crates/fayalite/src/module/transform/simplify_enums.rs +++ b/crates/fayalite/src/module/transform/simplify_enums.rs @@ -764,9 +764,7 @@ impl Folder for State { | ExprEnum::ModuleIO(_) | ExprEnum::Instance(_) | ExprEnum::Wire(_) - | ExprEnum::Reg(_) - | ExprEnum::RegSync(_) - | ExprEnum::RegAsync(_) => op.default_fold(self), + | ExprEnum::Reg(_) => op.default_fold(self), } } diff --git a/crates/fayalite/src/module/transform/visit.rs b/crates/fayalite/src/module/transform/visit.rs index 97de4fc..2e1e48f 100644 --- a/crates/fayalite/src/module/transform/visit.rs +++ b/crates/fayalite/src/module/transform/visit.rs @@ -29,7 +29,7 @@ use crate::{ StmtInstance, StmtMatch, StmtReg, StmtWire, }, reg::Reg, - reset::{AsyncReset, Reset, ResetType, SyncReset}, + reset::{AsyncReset, Reset, SyncReset}, source_location::SourceLocation, ty::{CanonicalType, Type}, wire::Wire, diff --git a/crates/fayalite/src/reg.rs b/crates/fayalite/src/reg.rs index 20e0b94..8f757f2 100644 --- a/crates/fayalite/src/reg.rs +++ b/crates/fayalite/src/reg.rs @@ -5,22 +5,21 @@ use crate::{ expr::{Expr, Flow}, intern::Interned, module::{NameId, ScopedNameId}, - reset::{Reset, ResetType}, source_location::SourceLocation, ty::{CanonicalType, Type}, }; use std::fmt; #[derive(Copy, Clone, Eq, PartialEq, Hash)] -pub struct Reg { +pub struct Reg { name: ScopedNameId, source_location: SourceLocation, ty: T, - clock_domain: Expr>, + clock_domain: Expr, init: Option>, } -impl fmt::Debug for Reg { +impl fmt::Debug for Reg { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { let Self { name, @@ -38,8 +37,8 @@ impl fmt::Debug for Reg { } } -impl Reg { - pub fn canonical(&self) -> Reg { +impl Reg { + pub fn canonical(&self) -> Reg { let Self { name, source_location, @@ -60,7 +59,7 @@ impl Reg { scoped_name: ScopedNameId, source_location: SourceLocation, ty: T, - clock_domain: Expr>, + clock_domain: Expr, init: Option>, ) -> Self { assert!( @@ -99,7 +98,7 @@ impl Reg { pub fn scoped_name(&self) -> ScopedNameId { self.name } - pub fn clock_domain(&self) -> Expr> { + pub fn clock_domain(&self) -> Expr { self.clock_domain } pub fn init(&self) -> Option> { diff --git a/crates/fayalite/src/reset.rs b/crates/fayalite/src/reset.rs index 0dd6df8..70d5f02 100644 --- a/crates/fayalite/src/reset.rs +++ b/crates/fayalite/src/reset.rs @@ -11,21 +11,10 @@ mod sealed { pub trait ResetTypeSealed {} } -pub trait ResetType: StaticType + sealed::ResetTypeSealed { - fn dispatch(input: D::Input, dispatch: D) -> D::Output; -} - -pub trait ResetTypeDispatch: Sized { - type Input; - type Output; - - fn reset(self, input: Self::Input) -> Self::Output; - fn sync_reset(self, input: Self::Input) -> Self::Output; - fn async_reset(self, input: Self::Input) -> Self::Output; -} +pub trait ResetType: StaticType + sealed::ResetTypeSealed {} macro_rules! reset_type { - ($name:ident, $Trait:ident::$trait_fn:ident, $is_castable_from_bits:literal, $dispatch_fn:ident) => { + ($name:ident, $Trait:ident::$trait_fn:ident, $is_castable_from_bits:literal) => { #[derive(Copy, Clone, Eq, PartialEq, Hash, Debug, Default)] pub struct $name; @@ -78,14 +67,7 @@ macro_rules! reset_type { impl sealed::ResetTypeSealed for $name {} - impl ResetType for $name { - fn dispatch( - input: D::Input, - dispatch: D, - ) -> D::Output { - dispatch.$dispatch_fn(input) - } - } + impl ResetType for $name {} pub trait $Trait { fn $trait_fn(&self) -> Expr<$name>; @@ -117,13 +99,12 @@ macro_rules! reset_type { }; } -reset_type!(AsyncReset, ToAsyncReset::to_async_reset, true, async_reset); -reset_type!(SyncReset, ToSyncReset::to_sync_reset, true, sync_reset); +reset_type!(AsyncReset, ToAsyncReset::to_async_reset, true); +reset_type!(SyncReset, ToSyncReset::to_sync_reset, true); reset_type!( Reset, ToReset::to_reset, - false, // Reset is not castable from bits because we don't know if it's async or sync - reset + false // Reset is not castable from bits because we don't know if it's async or sync ); impl ToSyncReset for bool { diff --git a/crates/fayalite/src/sim.rs b/crates/fayalite/src/sim.rs index 4780ea2..1bed47d 100644 --- a/crates/fayalite/src/sim.rs +++ b/crates/fayalite/src/sim.rs @@ -1405,18 +1405,6 @@ impl Compiler { ty: reg.ty(), } .into(), - TargetBase::RegSync(reg) => TraceReg { - name: reg.name(), - child: self.make_trace_decl_child(target, reg.name()).intern(), - ty: reg.ty(), - } - .into(), - TargetBase::RegAsync(reg) => TraceReg { - name: reg.name(), - child: self.make_trace_decl_child(target, reg.name()).intern(), - ty: reg.ty(), - } - .into(), TargetBase::Wire(wire) => TraceWire { name: wire.name(), child: self.make_trace_decl_child(target, wire.name()).intern(), @@ -1464,7 +1452,7 @@ impl Compiler { | TargetBase::MemPort(_) | TargetBase::Wire(_) | TargetBase::Instance(_) => None, - TargetBase::Reg(_) | TargetBase::RegSync(_) | TargetBase::RegAsync(_) => { + TargetBase::Reg(_) => { let write_layout = unprefixed_layout.with_prefixed_debug_names(&format!( "{:?}.{:?}$next", target.instantiated_module, @@ -2424,18 +2412,6 @@ impl Compiler { target: expr.into(), }) .into(), - ExprEnum::RegSync(expr) => self - .compile_value(TargetInInstantiatedModule { - instantiated_module, - target: expr.into(), - }) - .into(), - ExprEnum::RegAsync(expr) => self - .compile_value(TargetInInstantiatedModule { - instantiated_module, - target: expr.into(), - }) - .into(), ExprEnum::MemPort(expr) => self .compile_value(TargetInInstantiatedModule { instantiated_module, @@ -2630,8 +2606,6 @@ impl Compiler { let target_base: TargetBase = match &declaration { StmtDeclaration::Wire(v) => v.wire.into(), StmtDeclaration::Reg(v) => v.reg.into(), - StmtDeclaration::RegSync(v) => v.reg.into(), - StmtDeclaration::RegAsync(v) => v.reg.into(), StmtDeclaration::Instance(v) => v.instance.into(), }; let target = TargetInInstantiatedModule { @@ -2645,12 +2619,6 @@ impl Compiler { StmtDeclaration::Reg(StmtReg { annotations, reg }) => { todo!(); } - StmtDeclaration::RegSync(StmtReg { annotations, reg }) => { - todo!(); - } - StmtDeclaration::RegAsync(StmtReg { annotations, reg }) => { - todo!(); - } StmtDeclaration::Instance(StmtInstance { annotations, instance, diff --git a/crates/fayalite/visit_types.json b/crates/fayalite/visit_types.json index 3eff1f5..182efd9 100644 --- a/crates/fayalite/visit_types.json +++ b/crates/fayalite/visit_types.json @@ -1047,9 +1047,9 @@ "clock_domain()": "Visible", "init()": "Visible" }, - "generics": "", - "fold_where": "T: Fold, R: Fold", - "visit_where": "T: Visit, R: Visit" + "generics": "", + "fold_where": "T: Fold", + "visit_where": "T: Visit" }, "Wire": { "data": { @@ -1078,8 +1078,6 @@ "$kind": "Enum", "Wire": "Visible", "Reg": "Visible", - "RegSync": "Visible", - "RegAsync": "Visible", "Instance": "Visible" } }, @@ -1138,10 +1136,7 @@ "$kind": "Struct", "annotations": "Visible", "reg": "Visible" - }, - "generics": "", - "fold_where": "R: Fold", - "visit_where": "R: Visit" + } }, "StmtWire": { "data": { @@ -1224,8 +1219,6 @@ "ModuleIO": "Visible", "MemPort": "Visible", "Reg": "Visible", - "RegSync": "Visible", - "RegAsync": "Visible", "Wire": "Visible", "Instance": "Visible" }