From 79031ccf886c0ce14a5348d1935a77f4b3d94195 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Mon, 22 Jul 2024 00:52:29 -0700 Subject: [PATCH] fix blinky example to use cmp_eq instead of == --- crates/fayalite/examples/blinky.rs | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/crates/fayalite/examples/blinky.rs b/crates/fayalite/examples/blinky.rs index 694c736..80973a3 100644 --- a/crates/fayalite/examples/blinky.rs +++ b/crates/fayalite/examples/blinky.rs @@ -2,7 +2,7 @@ use clap::Parser; use fayalite::{ clock::{Clock, ClockDomain}, hdl_module, - int::{DynUInt, DynUIntType, IntTypeTrait, UInt}, + int::{DynUInt, DynUIntType, IntCmp, IntTypeTrait, UInt}, reset::{SyncReset, ToReset}, }; @@ -24,8 +24,8 @@ fn blinky(clock_frequency: u64) { #[hdl] let output_reg: UInt<1> = m.reg_builder().clock_domain(cd).reset_default(); #[hdl] - if counter == int_ty.literal(max_value) { - m.connect(counter, int_ty.literal(0)); + if counter.cmp_eq(max_value) { + m.connect_any(counter, 0u8); m.connect(output_reg, !output_reg); } else { m.connect_any(counter, counter + 1_hdl_u1);