From 67e66ac3bdf013512e57009552a233f9d5805e48 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Sun, 24 Aug 2025 15:13:16 -0700 Subject: [PATCH] upgrade to rust 1.89.0 --- .forgejo/workflows/test.yml | 2 +- Cargo.toml | 2 +- crates/fayalite/src/sim.rs | 3 +- .../ui/simvalue_is_not_internable.stderr | 40 +++++++++++-------- 4 files changed, 28 insertions(+), 19 deletions(-) diff --git a/.forgejo/workflows/test.yml b/.forgejo/workflows/test.yml index b2d03ba..b0c4a59 100644 --- a/.forgejo/workflows/test.yml +++ b/.forgejo/workflows/test.yml @@ -38,7 +38,7 @@ jobs: z3 \ zlib1g-dev - run: | - curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y --default-toolchain 1.82.0 + curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh -s -- -y --default-toolchain 1.89.0 source "$HOME/.cargo/env" echo "$PATH" >> "$GITHUB_PATH" - uses: https://git.libre-chip.org/mirrors/cache/restore@v3 diff --git a/Cargo.toml b/Cargo.toml index d681425..03c77ad 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -11,7 +11,7 @@ edition = "2021" repository = "https://git.libre-chip.org/libre-chip/fayalite" keywords = ["hdl", "hardware", "semiconductors", "firrtl", "fpga"] categories = ["simulation", "development-tools", "compilers"] -rust-version = "1.82.0" +rust-version = "1.89.0" [workspace.dependencies] fayalite-proc-macros = { version = "=0.3.0", path = "crates/fayalite-proc-macros" } diff --git a/crates/fayalite/src/sim.rs b/crates/fayalite/src/sim.rs index 6659391..10ae16c 100644 --- a/crates/fayalite/src/sim.rs +++ b/crates/fayalite/src/sim.rs @@ -65,6 +65,7 @@ use std::{ mem, ops::IndexMut, pin::Pin, + ptr, rc::Rc, sync::Arc, task::Poll, @@ -7736,7 +7737,7 @@ impl Eq for SimGeneratorFn {} impl PartialEq for SimGeneratorFn { fn eq(&self, other: &Self) -> bool { let Self { args, f } = self; - *args == other.args && *f == other.f + *args == other.args && ptr::fn_addr_eq(*f, other.f) } } diff --git a/crates/fayalite/tests/ui/simvalue_is_not_internable.stderr b/crates/fayalite/tests/ui/simvalue_is_not_internable.stderr index eb8877b..6550b5f 100644 --- a/crates/fayalite/tests/ui/simvalue_is_not_internable.stderr +++ b/crates/fayalite/tests/ui/simvalue_is_not_internable.stderr @@ -4,7 +4,7 @@ error[E0277]: `Cell` cannot be shared between thr 11 | fn f(v: SimValue<()>) -> Interned> { | ^^^^^^^^^^^^^^^^^^^^^^ `Cell` cannot be shared between threads safely | - = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell`, which is required by `SimValue<()>: Sync` + = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell` = note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock` note: required because it appears within the type `util::alternating_cell::AlternatingCell>` --> src/util/alternating_cell.rs @@ -28,7 +28,7 @@ error[E0277]: `UnsafeCell>` cannot be shared between th 11 | fn f(v: SimValue<()>) -> Interned> { | ^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell>` cannot be shared between threads safely | - = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell>`, which is required by `SimValue<()>: Sync` + = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell>` note: required because it appears within the type `util::alternating_cell::AlternatingCell>` --> src/util/alternating_cell.rs | @@ -49,29 +49,29 @@ error[E0277]: the trait bound `SimValue<()>: Intern` is not satisfied --> tests/ui/simvalue_is_not_internable.rs:12:26 | 12 | Intern::intern_sized(v) - | -------------------- ^ the trait `Hash` is not implemented for `SimValue<()>`, which is required by `SimValue<()>: Intern` + | -------------------- ^ the trait `Hash` is not implemented for `SimValue<()>` | | | required by a bound introduced by this call | - = help: the following other types implement trait `Intern`: - BitSlice - [T] - str = note: required for `SimValue<()>` to implement `Intern` +help: consider dereferencing here + | +12 | Intern::intern_sized(*v) + | + error[E0277]: the trait bound `SimValue<()>: Intern` is not satisfied --> tests/ui/simvalue_is_not_internable.rs:12:26 | 12 | Intern::intern_sized(v) - | -------------------- ^ the trait `std::cmp::Eq` is not implemented for `SimValue<()>`, which is required by `SimValue<()>: Intern` + | -------------------- ^ the trait `std::cmp::Eq` is not implemented for `SimValue<()>` | | | required by a bound introduced by this call | - = help: the following other types implement trait `Intern`: - BitSlice - [T] - str = note: required for `SimValue<()>` to implement `Intern` +help: consider dereferencing here + | +12 | Intern::intern_sized(*v) + | + error[E0277]: `Cell` cannot be shared between threads safely --> tests/ui/simvalue_is_not_internable.rs:12:26 @@ -81,7 +81,7 @@ error[E0277]: `Cell` cannot be shared between thr | | | required by a bound introduced by this call | - = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell`, which is required by `SimValue<()>: Sync` + = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell` = note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock` note: required because it appears within the type `util::alternating_cell::AlternatingCell>` --> src/util/alternating_cell.rs @@ -101,6 +101,10 @@ note: required by a bound in `intern_sized` | fn intern(&self) -> Interned; | fn intern_sized(self) -> Interned | ------------ required by a bound in this associated function +help: consider dereferencing here + | +12 | Intern::intern_sized(*v) + | + error[E0277]: `UnsafeCell>` cannot be shared between threads safely --> tests/ui/simvalue_is_not_internable.rs:12:26 @@ -110,7 +114,7 @@ error[E0277]: `UnsafeCell>` cannot be shared between th | | | required by a bound introduced by this call | - = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell>`, which is required by `SimValue<()>: Sync` + = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell>` note: required because it appears within the type `util::alternating_cell::AlternatingCell>` --> src/util/alternating_cell.rs | @@ -129,6 +133,10 @@ note: required by a bound in `intern_sized` | fn intern(&self) -> Interned; | fn intern_sized(self) -> Interned | ------------ required by a bound in this associated function +help: consider dereferencing here + | +12 | Intern::intern_sized(*v) + | + error[E0277]: `Cell` cannot be shared between threads safely --> tests/ui/simvalue_is_not_internable.rs:12:5 @@ -136,7 +144,7 @@ error[E0277]: `Cell` cannot be shared between thr 12 | Intern::intern_sized(v) | ^^^^^^^^^^^^^^^^^^^^^^^ `Cell` cannot be shared between threads safely | - = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell`, which is required by `SimValue<()>: Sync` + = help: within `SimValue<()>`, the trait `Sync` is not implemented for `Cell` = note: if you want to do aliasing and mutation between multiple threads, use `std::sync::RwLock` note: required because it appears within the type `util::alternating_cell::AlternatingCell>` --> src/util/alternating_cell.rs @@ -160,7 +168,7 @@ error[E0277]: `UnsafeCell>` cannot be shared between th 12 | Intern::intern_sized(v) | ^^^^^^^^^^^^^^^^^^^^^^^ `UnsafeCell>` cannot be shared between threads safely | - = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell>`, which is required by `SimValue<()>: Sync` + = help: within `SimValue<()>`, the trait `Sync` is not implemented for `UnsafeCell>` note: required because it appears within the type `util::alternating_cell::AlternatingCell>` --> src/util/alternating_cell.rs |