From 1b16118ce503fa327ae969606df7ffecd9c29029 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Thu, 11 Jun 2026 20:46:28 -0700 Subject: [PATCH] deduce_structural_eq_flags: use expressions' literal_bits to improve deduction around cast_bits_to --- .../transform/deduce_structural_eq_flags.rs | 413 +- .../tests/deduce_structural_eq_flags.rs | 3484 +++++++++++++---- 2 files changed, 3097 insertions(+), 800 deletions(-) diff --git a/crates/fayalite/src/module/transform/deduce_structural_eq_flags.rs b/crates/fayalite/src/module/transform/deduce_structural_eq_flags.rs index 8d03e19..009293c 100644 --- a/crates/fayalite/src/module/transform/deduce_structural_eq_flags.rs +++ b/crates/fayalite/src/module/transform/deduce_structural_eq_flags.rs @@ -2,28 +2,29 @@ // See Notices.txt for copyright information use crate::{ - bundle::BundleType, - enum_::EnumType, + bundle::{BundleField, BundleType}, + enum_::{EnumType, EnumVariant}, expr::{ - ExprEnum, + ExprEnum, ToLiteralBits, ops::{ ArrayIndex, FieldAccess, StructuralEq, StructuralEqFlags, TraceAsStringAsInner, VariantAccess, }, target::TargetBase, }, - intern::{Intern, InternSlice, Interned, Memoize}, + intern::{Intern, InternSlice, Interned, MemoizeGeneric}, module::{ ModuleBody, Stmt, StmtConnect, StmtDeclaration, StmtInstance, StmtReg, StmtWire, transform::visit::{Fold, Folder, Visit, Visitor}, }, prelude::*, util::{ - HashMap, + BitSliceWriteWithBase, HashMap, indented_print::{PushIndent, indented_println}, union_find_map::{Entry, UnionFindMap}, }, }; +use bitvec::{order::Lsb0, view::BitView}; use std::{convert::Infallible, fmt}; #[derive(Copy, Clone, PartialEq, Eq, Hash)] @@ -77,6 +78,181 @@ impl fmt::Debug for FlagsTree { } } +#[derive(Copy, Clone, PartialEq, Eq, Hash)] +enum FlagsTreeSourceValue<'a> { + LiteralBits { bits: &'a BitSlice }, + Flags { assume_padding_is_zeroed: bool }, +} + +impl<'a> fmt::Debug for FlagsTreeSourceValue<'a> { + fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { + match self { + Self::LiteralBits { bits } => f + .debug_struct("LiteralBits") + .field( + "bits", + &fmt::from_fn(|f| write!(f, "{:#b}", BitSliceWriteWithBase(bits))), + ) + .finish(), + Self::Flags { + assume_padding_is_zeroed, + } => f + .debug_struct("Flags") + .field("assume_padding_is_zeroed", assume_padding_is_zeroed) + .finish(), + } + } +} + +#[derive(Copy, Clone, PartialEq, Eq, Hash)] +enum FlagsTreeSourceValueOwned { + LiteralBits { bits: Interned }, + Flags { assume_padding_is_zeroed: bool }, +} + +impl FlagsTreeSourceValueOwned { + fn as_ref(&self) -> FlagsTreeSourceValue<'_> { + match *self { + Self::LiteralBits { ref bits } => FlagsTreeSourceValue::LiteralBits { bits }, + Self::Flags { + assume_padding_is_zeroed, + } => FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed, + }, + } + } +} + +impl<'a> FlagsTreeSourceValue<'a> { + fn to_owned(self) -> FlagsTreeSourceValueOwned { + match self { + Self::LiteralBits { bits } => FlagsTreeSourceValueOwned::LiteralBits { + bits: bits.intern(), + }, + Self::Flags { + assume_padding_is_zeroed, + } => FlagsTreeSourceValueOwned::Flags { + assume_padding_is_zeroed, + }, + } + } + fn visit_array_body>( + self, + element_ty: CanonicalType, + f: impl FnMut(Self) -> T, + ) -> R { + match self { + Self::LiteralBits { bits } => { + let bit_width = element_ty.bit_width(); + if bit_width == 0 { + R::from_iter([]) + } else { + bits.chunks(bit_width) + .map(|bits| Self::LiteralBits { bits }) + .map(f) + .collect() + } + } + Self::Flags { .. } => [self].into_iter().map(f).collect(), + } + } + fn visit_bundle_body>( + self, + bundle: Bundle, + mut f: impl FnMut(usize, &BundleField, Self) -> T, + ) -> R { + match self { + Self::LiteralBits { bits } => bundle + .fields() + .iter() + .enumerate() + .scan(bits, |bundle_bits, (field_index, field)| { + let field_bit_width = field.ty.bit_width(); + let bits; + (bits, *bundle_bits) = bundle_bits.split_at(field_bit_width); + Some(f(field_index, field, Self::LiteralBits { bits })) + }) + .collect(), + Self::Flags { .. } => bundle + .fields() + .iter() + .enumerate() + .map(move |(field_index, field)| f(field_index, field, self)) + .collect(), + } + } + fn visit_enum_body>( + self, + enum_: Enum, + debug_trace: bool, + mut f: impl FnMut(&EnumVariant, Self) -> T, + ) -> (R, bool) { + let collected; + let padding_is_zeroed; + match self { + Self::LiteralBits { bits } => { + let mut discriminant = 0usize; + let discriminant_bit_width = enum_.discriminant_bit_width(); + let (discriminant_bits, bits) = bits.split_at(discriminant_bit_width); + if debug_trace { + indented_println!( + "discriminant_bits={:#b}", + BitSliceWriteWithBase(discriminant_bits) + ); + } + discriminant.view_bits_mut::()[..discriminant_bit_width] + .copy_from_bitslice(discriminant_bits); + let (bits, padding) = bits.split_at( + enum_ + .variants() + .get(discriminant) + .and_then(|variant| variant.ty) + .map_or(0, |variant_ty| variant_ty.bit_width()), + ); + if debug_trace { + indented_println!( + "bits={:#b}\npadding={:#b}", + BitSliceWriteWithBase(bits), + BitSliceWriteWithBase(padding), + ); + } + collected = enum_ + .variants() + .iter() + .enumerate() + .map(|(variant_index, variant)| { + f( + variant, + if variant_index == discriminant { + Self::LiteralBits { bits } + } else { + Self::Flags { + assume_padding_is_zeroed: true, + } + }, + ) + }) + .collect(); + padding_is_zeroed = !padding.any(); + if debug_trace { + indented_println!("padding_is_zeroed={padding_is_zeroed:?}"); + } + } + Self::Flags { + assume_padding_is_zeroed, + } => { + collected = enum_ + .variants() + .iter() + .map(|variant| f(variant, self)) + .collect(); + padding_is_zeroed = assume_padding_is_zeroed; + } + } + (collected, padding_is_zeroed) + } +} + impl FlagsTree { fn contains_padding(&self) -> bool { match self { @@ -97,8 +273,19 @@ impl FlagsTree { Self::NoPadding => true, } } - fn new_inner(ty: CanonicalType, assume_padding_is_zeroed: bool) -> Interned { - match ty { + fn new_inner<'a>( + ty: &CanonicalType, + source_value: FlagsTreeSourceValue<'a>, + debug_trace: bool, + ) -> Interned { + let _push_indent; + if debug_trace { + indented_println!("FlagsTree::new_inner()"); + _push_indent = PushIndent::new(); + indented_println!("ty: {ty:?}"); + indented_println!("source_value: {source_value:?}"); + } + let retval = match ty { CanonicalType::UInt(_) | CanonicalType::SInt(_) | CanonicalType::Bool(_) @@ -109,33 +296,43 @@ impl FlagsTree { | CanonicalType::PhantomConst(_) | CanonicalType::DynSimOnly(_) => Self::NoPadding.intern_sized(), CanonicalType::Array(ty) => { - if ty.is_empty() { - Self::NoPadding.intern_sized() - } else { - Self::new(ty.element(), assume_padding_is_zeroed) - } + let mut retval = None; + let element_ty = ty.element(); + let () = + source_value.visit_array_body(element_ty, |source_value| match &mut retval { + Some(retval) => { + *retval = FlagsTree::new(element_ty, source_value, debug_trace) + .merged(*retval) + } + None => retval = Some(Self::new(element_ty, source_value, debug_trace)), + }); + retval.unwrap_or_else(|| Self::NoPadding.intern_sized()) } CanonicalType::Enum(ty) => { let mut expected_bit_width = None; - let mut variants = Vec::with_capacity(ty.variants().len()); let mut contains_padding = false; - for variant in ty.variants() { - let variant_flags_tree = - variant.ty.map(|ty| Self::new(ty, assume_padding_is_zeroed)); - variants.push(variant_flags_tree); - contains_padding |= variant_flags_tree.is_some_and(|v| v.contains_padding()); - let bit_width = if let Some(ty) = variant.ty { - ty.bit_width() - } else { - 0 - }; - if expected_bit_width - .replace(bit_width) - .is_some_and(|v| v != bit_width) - { - contains_padding = true; - } - } + let mut assume_padding_is_zeroed = true; + let (variants, padding_is_zeroed): (Vec<_>, _) = + source_value.visit_enum_body(*ty, debug_trace, |variant, source_value| { + let (variant_flags_tree, bit_width) = if let Some(variant_ty) = variant.ty { + let variant_flags_tree = + Self::new(variant_ty, source_value, debug_trace); + contains_padding |= variant_flags_tree.contains_padding(); + assume_padding_is_zeroed &= + variant_flags_tree.assume_padding_is_zeroed(); + (Some(variant_flags_tree), variant_ty.bit_width()) + } else { + (None, 0) + }; + if expected_bit_width + .replace(bit_width) + .is_some_and(|v| v != bit_width) + { + contains_padding = true; + } + variant_flags_tree + }); + assume_padding_is_zeroed &= padding_is_zeroed; if contains_padding { Self::Enum { variants: variants.intern_slice(), @@ -148,11 +345,14 @@ impl FlagsTree { } CanonicalType::Bundle(ty) => { let mut contains_padding = false; - let fields = Vec::from_iter(ty.fields().iter().map(|field| { - let flags_tree = Self::new(field.ty, assume_padding_is_zeroed); - contains_padding |= flags_tree.contains_padding(); - flags_tree - })); + let mut assume_padding_is_zeroed = true; + let fields: Vec<_> = + source_value.visit_bundle_body(*ty, |_field_index, field, source_value| { + let flags_tree = Self::new(field.ty, source_value, debug_trace); + contains_padding |= flags_tree.contains_padding(); + assume_padding_is_zeroed &= flags_tree.assume_padding_is_zeroed(); + flags_tree + }); if contains_padding { Self::Bundle { fields: fields.intern_slice(), @@ -163,31 +363,77 @@ impl FlagsTree { Self::NoPadding.intern_sized() } } - CanonicalType::TraceAsString(ty) => Self::new(ty.inner_ty(), assume_padding_is_zeroed), + CanonicalType::TraceAsString(ty) => Self::new(ty.inner_ty(), source_value, debug_trace), + }; + if debug_trace { + indented_println!("return: {retval:#?}"); } + retval } - fn new(ty: CanonicalType, assume_padding_is_zeroed: bool) -> Interned { + fn new( + ty: CanonicalType, + source_value: FlagsTreeSourceValue<'_>, + debug_trace: bool, + ) -> Interned { #[derive(Copy, Clone, PartialEq, Eq, Hash)] struct MyMemoize { - assume_padding_is_zeroed: bool, + debug_trace: bool, } - impl Memoize for MyMemoize { - type Input = CanonicalType; - type InputOwned = CanonicalType; + enum InputCow<'a> { + Borrowed { + ty: &'a CanonicalType, + source_value: FlagsTreeSourceValue<'a>, + }, + Owned { + ty: CanonicalType, + source_value: FlagsTreeSourceValueOwned, + }, + } + impl MemoizeGeneric for MyMemoize { + type InputRef<'a> = (&'a CanonicalType, FlagsTreeSourceValue<'a>); + type InputOwned = (CanonicalType, FlagsTreeSourceValueOwned); + type InputCow<'a> = InputCow<'a>; type Output = Interned; - fn inner(self, input: &Self::Input) -> Self::Output { - let Self { - assume_padding_is_zeroed, - } = self; - let retval = FlagsTree::new_inner(*input, assume_padding_is_zeroed); - retval + fn input_eq(a: Self::InputRef<'_>, b: Self::InputRef<'_>) -> bool { + a == b + } + + fn input_borrow(input: &Self::InputOwned) -> Self::InputRef<'_> { + let (ty, source_value) = input; + (ty, source_value.as_ref()) + } + + fn input_cow_into_owned(input: Self::InputCow<'_>) -> Self::InputOwned { + match input { + InputCow::Borrowed { ty, source_value } => (*ty, source_value.to_owned()), + InputCow::Owned { ty, source_value } => (ty, source_value), + } + } + + fn input_cow_borrow<'a>(input: &'a Self::InputCow<'_>) -> Self::InputRef<'a> { + match input { + &InputCow::Borrowed { ty, source_value } => (ty, source_value), + InputCow::Owned { ty, source_value } => (ty, source_value.as_ref()), + } + } + + fn input_cow_from_owned<'a>(input: Self::InputOwned) -> Self::InputCow<'a> { + let (ty, source_value) = input; + InputCow::Owned { ty, source_value } + } + + fn input_cow_from_ref(input: Self::InputRef<'_>) -> Self::InputCow<'_> { + let (ty, source_value) = input; + InputCow::Borrowed { ty, source_value } + } + + fn inner(self, input: Self::InputRef<'_>) -> Self::Output { + let (ty, source_value) = input; + FlagsTree::new_inner(ty, source_value, self.debug_trace) } } - MyMemoize { - assume_padding_is_zeroed, - } - .get_owned(ty) + MyMemoize { debug_trace }.get((&ty, source_value)) } #[must_use] fn merged(self, other: Interned) -> Interned { @@ -596,12 +842,6 @@ impl ExprOrUnknown { Self::Unknown(ty) => ExprOrUnknown::Unknown(map_ty(ty)), } } - fn map_unwrap(self, map_ty: impl FnOnce(T) -> U, map_expr: impl FnOnce(Expr) -> U) -> U { - match self { - Self::Expr(expr) => map_expr(expr), - Self::Unknown(ty) => map_ty(ty), - } - } fn from_canonical(v: ExprOrUnknown) -> Self { match v { ExprOrUnknown::Expr(expr) => Self::Expr(Expr::from_canonical(expr)), @@ -735,7 +975,13 @@ impl State { fn visit_expr_or_unknown(&mut self, expr: ExprOrUnknown) -> Interned { match expr { ExprOrUnknown::Expr(expr) => self.visit_canonical_expr(expr), - ExprOrUnknown::Unknown(ty) => FlagsTree::new(ty, false), + ExprOrUnknown::Unknown(ty) => FlagsTree::new( + ty, + FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed: false, + }, + self.debug_trace, + ), } } fn connect( @@ -880,7 +1126,13 @@ impl State { let visited = self.exprs_visited.entry(expr_enum).or_insert(false); let flags = *self.expr_flags.entry(expr_enum).or_insert_with(|| { self.any_changes = true; - FlagsTree::new(ty, true) + FlagsTree::new( + ty, + FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed: true, + }, + self.debug_trace, + ) }); if std::mem::replace(visited, true) { return flags; @@ -898,7 +1150,18 @@ impl State { let (flags, _) = this.connect(ExprOrUnknown::Expr(expr), init); *flags }; + let literal_bits = expr_enum.to_literal_bits(); let flags = match *expr_enum { + _ if literal_bits.is_ok() => { + let Ok(bits) = &literal_bits else { + unreachable!(); + }; + *FlagsTree::new( + ty, + FlagsTreeSourceValue::LiteralBits { bits }, + self.debug_trace, + ) + } ExprEnum::UIntLiteral(_) | ExprEnum::SIntLiteral(_) | ExprEnum::BoolLiteral(_) @@ -948,7 +1211,13 @@ impl State { } *flags } - ExprEnum::Uninit(_) => *FlagsTree::new(ty, false), + ExprEnum::Uninit(_) => *FlagsTree::new( + ty, + FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed: false, + }, + self.debug_trace, + ), ExprEnum::NotU(_) | ExprEnum::NotS(_) | ExprEnum::NotB(_) @@ -1113,7 +1382,13 @@ impl State { | ExprEnum::SliceUInt(_) | ExprEnum::SliceSInt(_) | ExprEnum::CastToBits(_) => *flags, - ExprEnum::CastBitsTo(_) => *FlagsTree::new(ty, false), + ExprEnum::CastBitsTo(_) => *FlagsTree::new( + ty, + FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed: false, + }, + self.debug_trace, + ), ExprEnum::ToTraceAsString(expr) => { self.visit_canonical_expr(Expr::canonical(expr.inner())); // FlagsTree treats TraceAsString transparently, so just union them together. @@ -1143,8 +1418,20 @@ impl State { ExprEnum::Reg(reg) => handle_reg(self, reg.init()), ExprEnum::RegSync(reg) => handle_reg(self, reg.init()), ExprEnum::RegAsync(reg) => handle_reg(self, reg.init()), - ExprEnum::MemPort(_) => *FlagsTree::new(ty, false), - ExprEnum::FormalInput(_) => *FlagsTree::new(ty, false), + ExprEnum::MemPort(_) => *FlagsTree::new( + ty, + FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed: false, + }, + self.debug_trace, + ), + ExprEnum::FormalInput(_) => *FlagsTree::new( + ty, + FlagsTreeSourceValue::Flags { + assume_padding_is_zeroed: false, + }, + self.debug_trace, + ), ExprEnum::SimIoForGlobal(_) => { unreachable!("Module is known to not contain SimIoForGlobal from validation") } diff --git a/crates/fayalite/tests/deduce_structural_eq_flags.rs b/crates/fayalite/tests/deduce_structural_eq_flags.rs index e2390c8..4633132 100644 --- a/crates/fayalite/tests/deduce_structural_eq_flags.rs +++ b/crates/fayalite/tests/deduce_structural_eq_flags.rs @@ -84,10 +84,18 @@ fn check_deduce_structural_eq_flags_child() { fn check_deduce_structural_eq_flags_parent() { #[hdl] let io: CheckStructuralEqModuleIO = m.input(); + #[hdl] + let io_zeros: CheckStructuralEqModuleIO = m.input(); + #[hdl] + let io_alternating: CheckStructuralEqModuleIO = m.input(); #[hdl] let parent_out: CheckStructuralEqOut = m.output(); #[hdl] + let parent_zeros_out: CheckStructuralEqOut = m.output(); + #[hdl] + let parent_alternating_out: CheckStructuralEqOut = m.output(); + #[hdl] let extern_child_out: CheckStructuralEqOut = m.output(); #[hdl] let child_out: CheckStructuralEqOut = m.output(); @@ -97,7 +105,22 @@ fn check_deduce_structural_eq_flags_parent() { #[hdl] let child = instance(check_deduce_structural_eq_flags_child()); - let connect_io = |io_in: Expr, out: Expr| { + trait MapLiteral { + fn map_literal(&self, expr: impl ToExpr) -> Expr; + } + + impl) -> Expr> MapLiteral for F { + fn map_literal(&self, expr: impl ToExpr) -> Expr { + Expr::from_canonical(self(Expr::canonical(expr.to_expr()))) + } + } + + #[hdl] + fn connect_io( + io_in: Expr, + out: Expr, + map_literal: impl MapLiteral, + ) { #[hdl] let CheckStructuralEqModuleIO { opt_unit_flip, @@ -113,7 +136,7 @@ fn check_deduce_structural_eq_flags_parent() { } = io_in; macro_rules! connect_pair { ($field_flip:ident, $field:ident, $literal:expr $(,)?) => { - let literal = $literal.to_expr(); + let literal = map_literal.map_literal($literal); connect($field_flip, literal); connect( out.$field, @@ -136,9 +159,25 @@ fn check_deduce_structural_eq_flags_parent() { connect_pair!(struct_opt_bool_flip, struct_opt_bool, (HdlSome(true), true)); }; - connect_io(io, parent_out); - connect_io(extern_child.io, extern_child_out); - connect_io(child.io, child_out); + connect_io(io, parent_out, |expr| expr); + connect_io(io_zeros, parent_zeros_out, |expr: Expr| { + let ty = expr.ty(); + let bits = UInt[ty.bit_width()].zero().to_expr(); + bits.cast_bits_to(ty) + }); + connect_io( + io_alternating, + parent_alternating_out, + |expr: Expr| { + let ty = expr.ty(); + let bits = u128::from_le_bytes([0xAA; _]) + .cast_to(UInt[ty.bit_width()]) + .to_expr(); + bits.cast_bits_to(ty) + }, + ); + connect_io(extern_child.io, extern_child_out, |expr| expr); + connect_io(child.io, child_out, |expr| expr); } #[test] @@ -162,17 +201,22 @@ circuit check_deduce_structural_eq_flags_parent: type Ty4 = {`0`: Ty2, `1`: UInt<1>} type Ty5 = {flip opt_unit_flip: Ty1, opt_unit: Ty1, flip opt_bool_flip: Ty2, opt_bool: Ty2, flip opt_opt_unit_flip: Ty3, opt_opt_unit: Ty3, flip array_opt_bool_flip: Ty2[2], array_opt_bool: Ty2[2], flip struct_opt_bool_flip: Ty4, struct_opt_bool: Ty4} type Ty6 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>} - type Ty7 = {io: Ty5} + type Ty7 = {`0`: UInt<2>, `1`: UInt<1>} + type Ty8 = {io: Ty5} module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1] input io: Ty5 @[module-XXXXXXXXXX.rs 2:1] - output parent_out: Ty6 @[module-XXXXXXXXXX.rs 3:1] - output extern_child_out: Ty6 @[module-XXXXXXXXXX.rs 4:1] - output child_out: Ty6 @[module-XXXXXXXXXX.rs 5:1] - inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 6:1] - inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 7:1] + input io_zeros: Ty5 @[module-XXXXXXXXXX.rs 3:1] + input io_alternating: Ty5 @[module-XXXXXXXXXX.rs 4:1] + output parent_out: Ty6 @[module-XXXXXXXXXX.rs 5:1] + output parent_zeros_out: Ty6 @[module-XXXXXXXXXX.rs 6:1] + output parent_alternating_out: Ty6 @[module-XXXXXXXXXX.rs 7:1] + output extern_child_out: Ty6 @[module-XXXXXXXXXX.rs 8:1] + output child_out: Ty6 @[module-XXXXXXXXXX.rs 9:1] + inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1] + inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1] wire _bundle_literal_expr: Ty0 invalidate _bundle_literal_expr - connect io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 9:1] + connect io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr: UInt<1> match io.opt_unit: HdlNone: @@ -185,15 +229,15 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_1, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_1): connect _cast_enum_to_bits_expr_1, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect parent_out.opt_unit, eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.opt_unit, eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_2: UInt<1> match io.opt_unit_flip: HdlNone: connect _cast_enum_to_bits_expr_2, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_2): connect _cast_enum_to_bits_expr_2, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect parent_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - connect io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 10:1] + connect parent_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + connect io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_3: UInt<2> match io.opt_bool: HdlNone: @@ -206,15 +250,15 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_4, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_4): connect _cast_enum_to_bits_expr_4, pad(cat(_cast_enum_to_bits_expr_HdlSome_4, UInt<1>(1)), 2) - connect parent_out.opt_bool, eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] + connect parent_out.opt_bool, eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_5: UInt<2> match io.opt_bool_flip: HdlNone: connect _cast_enum_to_bits_expr_5, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_5): connect _cast_enum_to_bits_expr_5, pad(cat(_cast_enum_to_bits_expr_HdlSome_5, UInt<1>(1)), 2) - connect parent_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] - connect io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + connect io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_6: UInt<2> match io.opt_opt_unit: HdlNone: @@ -239,7 +283,7 @@ circuit check_deduce_structural_eq_flags_parent: HdlSome(_cast_enum_to_bits_expr_HdlSome_9): connect _cast_enum_to_bits_expr_9, pad(cat(UInt<0>(0), UInt<1>(1)), 1) connect _cast_enum_to_bits_expr_8, pad(cat(_cast_enum_to_bits_expr_9, UInt<1>(1)), 2) - connect parent_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_10: UInt<2> match io.opt_opt_unit_flip: HdlNone: @@ -252,11 +296,11 @@ circuit check_deduce_structural_eq_flags_parent: HdlSome(_cast_enum_to_bits_expr_HdlSome_11): connect _cast_enum_to_bits_expr_11, pad(cat(UInt<0>(0), UInt<1>(1)), 1) connect _cast_enum_to_bits_expr_10, pad(cat(_cast_enum_to_bits_expr_11, UInt<1>(1)), 2) - connect parent_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] wire _array_literal_expr: Ty2[2] connect _array_literal_expr[0], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h0)) connect _array_literal_expr[1], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) - connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] + connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_12: UInt<2> match io.array_opt_bool[0]: HdlNone: @@ -283,7 +327,7 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_15, pad(cat(_cast_enum_to_bits_expr_HdlSome_15, UInt<1>(1)), 2) wire _array_structural_eq: UInt<1> connect _array_structural_eq, and(eq(_cast_enum_to_bits_expr_12, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_14, _cast_enum_to_bits_expr_15)) - connect parent_out.array_opt_bool, _array_structural_eq @[module-XXXXXXXXXX.rs 12:1] + connect parent_out.array_opt_bool, _array_structural_eq @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_16: UInt<2> match io.array_opt_bool_flip[0]: HdlNone: @@ -298,11 +342,11 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_17, pad(cat(_cast_enum_to_bits_expr_HdlSome_17, UInt<1>(1)), 2) wire _array_structural_eq_1: UInt<1> connect _array_structural_eq_1, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_17, _cast_enum_to_bits_expr_15)) - connect parent_out.array_opt_bool_flip, _array_structural_eq_1 @[module-XXXXXXXXXX.rs 12:1] + connect parent_out.array_opt_bool_flip, _array_structural_eq_1 @[module-XXXXXXXXXX.rs 16:1] wire _bundle_literal_expr_1: Ty4 connect _bundle_literal_expr_1.`0`, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) connect _bundle_literal_expr_1.`1`, UInt<1>(0h1) - connect io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 13:1] + connect io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_18: UInt<2> match io.struct_opt_bool.`0`: HdlNone: @@ -317,7 +361,7 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_19, pad(cat(_cast_enum_to_bits_expr_HdlSome_19, UInt<1>(1)), 2) wire _bundle_structural_eq: UInt<1> connect _bundle_structural_eq, and(eq(_cast_enum_to_bits_expr_18, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) - connect parent_out.struct_opt_bool, _bundle_structural_eq @[module-XXXXXXXXXX.rs 13:1] + connect parent_out.struct_opt_bool, _bundle_structural_eq @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_20: UInt<2> match io.struct_opt_bool_flip.`0`: HdlNone: @@ -326,53 +370,78 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_20, pad(cat(_cast_enum_to_bits_expr_HdlSome_20, UInt<1>(1)), 2) wire _bundle_structural_eq_1: UInt<1> connect _bundle_structural_eq_1, and(eq(_cast_enum_to_bits_expr_20, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) - connect parent_out.struct_opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 13:1] - connect extern_child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.struct_opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_bits_to_enum_expr: Ty1 + when eq(UInt<1>(0), tail(UInt<1>(0h0), 0)): + connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlNone) + else: + wire _cast_bits_to_bundle_expr: Ty0 + invalidate _cast_bits_to_bundle_expr + connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr) + connect io_zeros.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_21: UInt<1> - match extern_child.io.opt_unit: + match io_zeros.opt_unit: HdlNone: connect _cast_enum_to_bits_expr_21, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_21): connect _cast_enum_to_bits_expr_21, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect extern_child_out.opt_unit, eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] wire _cast_enum_to_bits_expr_22: UInt<1> - match extern_child.io.opt_unit_flip: + match _cast_bits_to_enum_expr: HdlNone: connect _cast_enum_to_bits_expr_22, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_22): connect _cast_enum_to_bits_expr_22, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect extern_child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_22, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - connect extern_child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 10:1] - wire _cast_enum_to_bits_expr_23: UInt<2> - match extern_child.io.opt_bool: + connect parent_zeros_out.opt_unit, eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_23: UInt<1> + match io_zeros.opt_unit_flip: HdlNone: - connect _cast_enum_to_bits_expr_23, UInt<2>(0) + connect _cast_enum_to_bits_expr_23, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_23): - connect _cast_enum_to_bits_expr_23, pad(cat(_cast_enum_to_bits_expr_HdlSome_23, UInt<1>(1)), 2) - connect extern_child_out.opt_bool, eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] + connect _cast_enum_to_bits_expr_23, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect parent_zeros_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_enum_expr_1: Ty2 + wire _cast_bits_to_enum_expr_body_1: UInt<1> + connect _cast_bits_to_enum_expr_body_1, head(UInt<2>(0h0), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)): + connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_1) + connect io_zeros.opt_bool_flip, _cast_bits_to_enum_expr_1 @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_24: UInt<2> - match extern_child.io.opt_bool_flip: + match io_zeros.opt_bool: HdlNone: connect _cast_enum_to_bits_expr_24, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_24): connect _cast_enum_to_bits_expr_24, pad(cat(_cast_enum_to_bits_expr_HdlSome_24, UInt<1>(1)), 2) - connect extern_child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] - connect extern_child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 11:1] wire _cast_enum_to_bits_expr_25: UInt<2> - match extern_child.io.opt_opt_unit: + match _cast_bits_to_enum_expr_1: HdlNone: connect _cast_enum_to_bits_expr_25, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_25): - wire _cast_enum_to_bits_expr_26: UInt<1> - match _cast_enum_to_bits_expr_HdlSome_25: - HdlNone: - connect _cast_enum_to_bits_expr_26, UInt<1>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_26): - connect _cast_enum_to_bits_expr_26, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect _cast_enum_to_bits_expr_25, pad(cat(_cast_enum_to_bits_expr_26, UInt<1>(1)), 2) - connect extern_child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_25, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect _cast_enum_to_bits_expr_25, pad(cat(_cast_enum_to_bits_expr_HdlSome_25, UInt<1>(1)), 2) + connect parent_zeros_out.opt_bool, eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_26: UInt<2> + match io_zeros.opt_bool_flip: + HdlNone: + connect _cast_enum_to_bits_expr_26, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_26): + connect _cast_enum_to_bits_expr_26, pad(cat(_cast_enum_to_bits_expr_HdlSome_26, UInt<1>(1)), 2) + connect parent_zeros_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_bits_to_enum_expr_2: Ty3 + wire _cast_bits_to_enum_expr_body_2: UInt<1> + connect _cast_bits_to_enum_expr_body_2, head(UInt<2>(0h0), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)): + connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlNone) + else: + wire _cast_bits_to_enum_expr_3: Ty1 + when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_2, 0)): + connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr) + connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_3) + connect io_zeros.opt_opt_unit_flip, _cast_bits_to_enum_expr_2 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_27: UInt<2> - match extern_child.io.opt_opt_unit_flip: + match io_zeros.opt_opt_unit: HdlNone: connect _cast_enum_to_bits_expr_27, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_27): @@ -383,164 +452,542 @@ circuit check_deduce_structural_eq_flags_parent: HdlSome(_cast_enum_to_bits_expr_HdlSome_28): connect _cast_enum_to_bits_expr_28, pad(cat(UInt<0>(0), UInt<1>(1)), 1) connect _cast_enum_to_bits_expr_27, pad(cat(_cast_enum_to_bits_expr_28, UInt<1>(1)), 2) - connect extern_child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] - connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] wire _cast_enum_to_bits_expr_29: UInt<2> - match extern_child.io.array_opt_bool[0]: + match _cast_bits_to_enum_expr_2: HdlNone: connect _cast_enum_to_bits_expr_29, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_29): - connect _cast_enum_to_bits_expr_29, pad(cat(_cast_enum_to_bits_expr_HdlSome_29, UInt<1>(1)), 2) - wire _cast_enum_to_bits_expr_30: UInt<2> - match extern_child.io.array_opt_bool[1]: - HdlNone: - connect _cast_enum_to_bits_expr_30, UInt<2>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_30): - connect _cast_enum_to_bits_expr_30, pad(cat(_cast_enum_to_bits_expr_HdlSome_30, UInt<1>(1)), 2) - wire _array_structural_eq_2: UInt<1> - connect _array_structural_eq_2, and(eq(_cast_enum_to_bits_expr_29, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_30, _cast_enum_to_bits_expr_15)) - connect extern_child_out.array_opt_bool, _array_structural_eq_2 @[module-XXXXXXXXXX.rs 12:1] + wire _cast_enum_to_bits_expr_30: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_29: + HdlNone: + connect _cast_enum_to_bits_expr_30, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_30): + connect _cast_enum_to_bits_expr_30, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_29, pad(cat(_cast_enum_to_bits_expr_30, UInt<1>(1)), 2) + connect parent_zeros_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_31: UInt<2> - match extern_child.io.array_opt_bool_flip[0]: + match io_zeros.opt_opt_unit_flip: HdlNone: connect _cast_enum_to_bits_expr_31, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_31): - connect _cast_enum_to_bits_expr_31, pad(cat(_cast_enum_to_bits_expr_HdlSome_31, UInt<1>(1)), 2) - wire _cast_enum_to_bits_expr_32: UInt<2> - match extern_child.io.array_opt_bool_flip[1]: - HdlNone: - connect _cast_enum_to_bits_expr_32, UInt<2>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_32): - connect _cast_enum_to_bits_expr_32, pad(cat(_cast_enum_to_bits_expr_HdlSome_32, UInt<1>(1)), 2) - wire _array_structural_eq_3: UInt<1> - connect _array_structural_eq_3, and(eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_32, _cast_enum_to_bits_expr_15)) - connect extern_child_out.array_opt_bool_flip, _array_structural_eq_3 @[module-XXXXXXXXXX.rs 12:1] - connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_32: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_31: + HdlNone: + connect _cast_enum_to_bits_expr_32, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_32): + connect _cast_enum_to_bits_expr_32, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_31, pad(cat(_cast_enum_to_bits_expr_32, UInt<1>(1)), 2) + connect parent_zeros_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr: Ty2[2] + wire _cast_bits_to_array_expr_flattened: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0) + wire _cast_bits_to_enum_expr_4: Ty2 + wire _cast_bits_to_enum_expr_body_4: UInt<1> + connect _cast_bits_to_enum_expr_body_4, head(_cast_bits_to_array_expr_flattened[0], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[0], 1)): + connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_4) + connect _cast_bits_to_array_expr[0], _cast_bits_to_enum_expr_4 + connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2) + wire _cast_bits_to_enum_expr_5: Ty2 + wire _cast_bits_to_enum_expr_body_5: UInt<1> + connect _cast_bits_to_enum_expr_body_5, head(_cast_bits_to_array_expr_flattened[1], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[1], 1)): + connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_5) + connect _cast_bits_to_array_expr[1], _cast_bits_to_enum_expr_5 + connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_33: UInt<2> - match extern_child.io.struct_opt_bool.`0`: + match io_zeros.array_opt_bool[0]: HdlNone: connect _cast_enum_to_bits_expr_33, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_33): connect _cast_enum_to_bits_expr_33, pad(cat(_cast_enum_to_bits_expr_HdlSome_33, UInt<1>(1)), 2) - wire _bundle_structural_eq_2: UInt<1> - connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) - connect extern_child_out.struct_opt_bool, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_34: UInt<2> - match extern_child.io.struct_opt_bool_flip.`0`: + match _cast_bits_to_array_expr[0]: HdlNone: connect _cast_enum_to_bits_expr_34, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_34): connect _cast_enum_to_bits_expr_34, pad(cat(_cast_enum_to_bits_expr_HdlSome_34, UInt<1>(1)), 2) - wire _bundle_structural_eq_3: UInt<1> - connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_34, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) - connect extern_child_out.struct_opt_bool_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 13:1] - connect child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 9:1] - wire _cast_enum_to_bits_expr_35: UInt<1> - match child.io.opt_unit: + wire _cast_enum_to_bits_expr_35: UInt<2> + match io_zeros.array_opt_bool[1]: HdlNone: - connect _cast_enum_to_bits_expr_35, UInt<1>(0) + connect _cast_enum_to_bits_expr_35, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_35): - connect _cast_enum_to_bits_expr_35, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect child_out.opt_unit, eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - wire _cast_enum_to_bits_expr_36: UInt<1> - match child.io.opt_unit_flip: + connect _cast_enum_to_bits_expr_35, pad(cat(_cast_enum_to_bits_expr_HdlSome_35, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_36: UInt<2> + match _cast_bits_to_array_expr[1]: HdlNone: - connect _cast_enum_to_bits_expr_36, UInt<1>(0) + connect _cast_enum_to_bits_expr_36, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_36): - connect _cast_enum_to_bits_expr_36, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_36, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - connect child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 10:1] + connect _cast_enum_to_bits_expr_36, pad(cat(_cast_enum_to_bits_expr_HdlSome_36, UInt<1>(1)), 2) + wire _array_structural_eq_2: UInt<1> + connect _array_structural_eq_2, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_36)) + connect parent_zeros_out.array_opt_bool, _array_structural_eq_2 @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_37: UInt<2> - match child.io.opt_bool: + match io_zeros.array_opt_bool_flip[0]: HdlNone: connect _cast_enum_to_bits_expr_37, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_37): connect _cast_enum_to_bits_expr_37, pad(cat(_cast_enum_to_bits_expr_HdlSome_37, UInt<1>(1)), 2) - connect child_out.opt_bool, eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] wire _cast_enum_to_bits_expr_38: UInt<2> - match child.io.opt_bool_flip: + match io_zeros.array_opt_bool_flip[1]: HdlNone: connect _cast_enum_to_bits_expr_38, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_38): connect _cast_enum_to_bits_expr_38, pad(cat(_cast_enum_to_bits_expr_HdlSome_38, UInt<1>(1)), 2) - connect child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] - connect child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 11:1] + wire _array_structural_eq_3: UInt<1> + connect _array_structural_eq_3, and(eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_36)) + connect parent_zeros_out.array_opt_bool_flip, _array_structural_eq_3 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_1: Ty4 + wire _cast_bits_to_bundle_expr_flattened: Ty7 + connect _cast_bits_to_bundle_expr_flattened.`0`, bits(UInt<3>(0h0), 1, 0) + wire _cast_bits_to_enum_expr_6: Ty2 + wire _cast_bits_to_enum_expr_body_6: UInt<1> + connect _cast_bits_to_enum_expr_body_6, head(_cast_bits_to_bundle_expr_flattened.`0`, 1) + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.`0`, 1)): + connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_6) + connect _cast_bits_to_bundle_expr_1.`0`, _cast_bits_to_enum_expr_6 + connect _cast_bits_to_bundle_expr_flattened.`1`, bits(UInt<3>(0h0), 2, 2) + connect _cast_bits_to_bundle_expr_1.`1`, _cast_bits_to_bundle_expr_flattened.`1` + connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_39: UInt<2> - match child.io.opt_opt_unit: + match io_zeros.struct_opt_bool.`0`: HdlNone: connect _cast_enum_to_bits_expr_39, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_39): - wire _cast_enum_to_bits_expr_40: UInt<1> - match _cast_enum_to_bits_expr_HdlSome_39: - HdlNone: - connect _cast_enum_to_bits_expr_40, UInt<1>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_40): - connect _cast_enum_to_bits_expr_40, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect _cast_enum_to_bits_expr_39, pad(cat(_cast_enum_to_bits_expr_40, UInt<1>(1)), 2) - connect child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect _cast_enum_to_bits_expr_39, pad(cat(_cast_enum_to_bits_expr_HdlSome_39, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_40: UInt<2> + match _cast_bits_to_bundle_expr_1.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_40, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_40): + connect _cast_enum_to_bits_expr_40, pad(cat(_cast_enum_to_bits_expr_HdlSome_40, UInt<1>(1)), 2) + wire _bundle_structural_eq_2: UInt<1> + connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_1.`1`)) + connect parent_zeros_out.struct_opt_bool, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_41: UInt<2> - match child.io.opt_opt_unit_flip: + match io_zeros.struct_opt_bool_flip.`0`: HdlNone: connect _cast_enum_to_bits_expr_41, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_41): - wire _cast_enum_to_bits_expr_42: UInt<1> - match _cast_enum_to_bits_expr_HdlSome_41: - HdlNone: - connect _cast_enum_to_bits_expr_42, UInt<1>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_42): - connect _cast_enum_to_bits_expr_42, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect _cast_enum_to_bits_expr_41, pad(cat(_cast_enum_to_bits_expr_42, UInt<1>(1)), 2) - connect child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] - connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - wire _cast_enum_to_bits_expr_43: UInt<2> - match child.io.array_opt_bool[0]: + connect _cast_enum_to_bits_expr_41, pad(cat(_cast_enum_to_bits_expr_HdlSome_41, UInt<1>(1)), 2) + wire _bundle_structural_eq_3: UInt<1> + connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_1.`1`)) + connect parent_zeros_out.struct_opt_bool_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 17:1] + connect io_alternating.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_42: UInt<1> + match io_alternating.opt_unit: HdlNone: - connect _cast_enum_to_bits_expr_43, UInt<2>(0) + connect _cast_enum_to_bits_expr_42, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_42): + connect _cast_enum_to_bits_expr_42, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect parent_alternating_out.opt_unit, eq(_cast_enum_to_bits_expr_42, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_43: UInt<1> + match io_alternating.opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_43, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_43): - connect _cast_enum_to_bits_expr_43, pad(cat(_cast_enum_to_bits_expr_HdlSome_43, UInt<1>(1)), 2) + connect _cast_enum_to_bits_expr_43, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect parent_alternating_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_enum_expr_7: Ty2 + wire _cast_bits_to_enum_expr_body_7: UInt<1> + connect _cast_bits_to_enum_expr_body_7, head(UInt<2>(0h2), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)): + connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_7) + connect io_alternating.opt_bool_flip, _cast_bits_to_enum_expr_7 @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_44: UInt<2> - match child.io.array_opt_bool[1]: + match io_alternating.opt_bool: HdlNone: connect _cast_enum_to_bits_expr_44, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_44): connect _cast_enum_to_bits_expr_44, pad(cat(_cast_enum_to_bits_expr_HdlSome_44, UInt<1>(1)), 2) - wire _array_structural_eq_4: UInt<1> - connect _array_structural_eq_4, and(eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_15)) - connect child_out.array_opt_bool, _array_structural_eq_4 @[module-XXXXXXXXXX.rs 12:1] wire _cast_enum_to_bits_expr_45: UInt<2> - match child.io.array_opt_bool_flip[0]: + match _cast_bits_to_enum_expr_7: HdlNone: connect _cast_enum_to_bits_expr_45, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_45): connect _cast_enum_to_bits_expr_45, pad(cat(_cast_enum_to_bits_expr_HdlSome_45, UInt<1>(1)), 2) + connect parent_alternating_out.opt_bool, eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_46: UInt<2> - match child.io.array_opt_bool_flip[1]: + match io_alternating.opt_bool_flip: HdlNone: connect _cast_enum_to_bits_expr_46, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_46): connect _cast_enum_to_bits_expr_46, pad(cat(_cast_enum_to_bits_expr_HdlSome_46, UInt<1>(1)), 2) - wire _array_structural_eq_5: UInt<1> - connect _array_structural_eq_5, and(eq(_cast_enum_to_bits_expr_45, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_15)) - connect child_out.array_opt_bool_flip, _array_structural_eq_5 @[module-XXXXXXXXXX.rs 12:1] - connect child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 13:1] + connect parent_alternating_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_bits_to_enum_expr_8: Ty3 + wire _cast_bits_to_enum_expr_body_8: UInt<1> + connect _cast_bits_to_enum_expr_body_8, head(UInt<2>(0h2), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)): + connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlNone) + else: + wire _cast_bits_to_enum_expr_9: Ty1 + when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_8, 0)): + connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr) + connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_9) + connect io_alternating.opt_opt_unit_flip, _cast_bits_to_enum_expr_8 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_47: UInt<2> - match child.io.struct_opt_bool.`0`: + match io_alternating.opt_opt_unit: HdlNone: connect _cast_enum_to_bits_expr_47, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_47): - connect _cast_enum_to_bits_expr_47, pad(cat(_cast_enum_to_bits_expr_HdlSome_47, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_48: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_47: + HdlNone: + connect _cast_enum_to_bits_expr_48, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_48): + connect _cast_enum_to_bits_expr_48, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_47, pad(cat(_cast_enum_to_bits_expr_48, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_49: UInt<2> + match _cast_bits_to_enum_expr_8: + HdlNone: + connect _cast_enum_to_bits_expr_49, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_49): + wire _cast_enum_to_bits_expr_50: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_49: + HdlNone: + connect _cast_enum_to_bits_expr_50, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_50): + connect _cast_enum_to_bits_expr_50, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_49, pad(cat(_cast_enum_to_bits_expr_50, UInt<1>(1)), 2) + connect parent_alternating_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_51: UInt<2> + match io_alternating.opt_opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_51, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_51): + wire _cast_enum_to_bits_expr_52: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_51: + HdlNone: + connect _cast_enum_to_bits_expr_52, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_52): + connect _cast_enum_to_bits_expr_52, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_51, pad(cat(_cast_enum_to_bits_expr_52, UInt<1>(1)), 2) + connect parent_alternating_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_51, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr_1: Ty2[2] + wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0) + wire _cast_bits_to_enum_expr_10: Ty2 + wire _cast_bits_to_enum_expr_body_10: UInt<1> + connect _cast_bits_to_enum_expr_body_10, head(_cast_bits_to_array_expr_flattened_1[0], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[0], 1)): + connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_10) + connect _cast_bits_to_array_expr_1[0], _cast_bits_to_enum_expr_10 + connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2) + wire _cast_bits_to_enum_expr_11: Ty2 + wire _cast_bits_to_enum_expr_body_11: UInt<1> + connect _cast_bits_to_enum_expr_body_11, head(_cast_bits_to_array_expr_flattened_1[1], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[1], 1)): + connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_11) + connect _cast_bits_to_array_expr_1[1], _cast_bits_to_enum_expr_11 + connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_53: UInt<2> + match io_alternating.array_opt_bool[0]: + HdlNone: + connect _cast_enum_to_bits_expr_53, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_53): + connect _cast_enum_to_bits_expr_53, pad(cat(_cast_enum_to_bits_expr_HdlSome_53, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_54: UInt<2> + match _cast_bits_to_array_expr_1[0]: + HdlNone: + connect _cast_enum_to_bits_expr_54, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_54): + connect _cast_enum_to_bits_expr_54, pad(cat(_cast_enum_to_bits_expr_HdlSome_54, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_55: UInt<2> + match io_alternating.array_opt_bool[1]: + HdlNone: + connect _cast_enum_to_bits_expr_55, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_55): + connect _cast_enum_to_bits_expr_55, pad(cat(_cast_enum_to_bits_expr_HdlSome_55, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_56: UInt<2> + match _cast_bits_to_array_expr_1[1]: + HdlNone: + connect _cast_enum_to_bits_expr_56, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_56): + connect _cast_enum_to_bits_expr_56, pad(cat(_cast_enum_to_bits_expr_HdlSome_56, UInt<1>(1)), 2) + wire _array_structural_eq_4: UInt<1> + connect _array_structural_eq_4, and(eq(_cast_enum_to_bits_expr_53, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_55, _cast_enum_to_bits_expr_56)) + connect parent_alternating_out.array_opt_bool, _array_structural_eq_4 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_57: UInt<2> + match io_alternating.array_opt_bool_flip[0]: + HdlNone: + connect _cast_enum_to_bits_expr_57, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_57): + connect _cast_enum_to_bits_expr_57, pad(cat(_cast_enum_to_bits_expr_HdlSome_57, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_58: UInt<2> + match io_alternating.array_opt_bool_flip[1]: + HdlNone: + connect _cast_enum_to_bits_expr_58, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_58): + connect _cast_enum_to_bits_expr_58, pad(cat(_cast_enum_to_bits_expr_HdlSome_58, UInt<1>(1)), 2) + wire _array_structural_eq_5: UInt<1> + connect _array_structural_eq_5, and(eq(_cast_enum_to_bits_expr_57, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_58, _cast_enum_to_bits_expr_56)) + connect parent_alternating_out.array_opt_bool_flip, _array_structural_eq_5 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_2: Ty4 + wire _cast_bits_to_bundle_expr_flattened_1: Ty7 + connect _cast_bits_to_bundle_expr_flattened_1.`0`, bits(UInt<3>(0h2), 1, 0) + wire _cast_bits_to_enum_expr_12: Ty2 + wire _cast_bits_to_enum_expr_body_12: UInt<1> + connect _cast_bits_to_enum_expr_body_12, head(_cast_bits_to_bundle_expr_flattened_1.`0`, 1) + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.`0`, 1)): + connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_12) + connect _cast_bits_to_bundle_expr_2.`0`, _cast_bits_to_enum_expr_12 + connect _cast_bits_to_bundle_expr_flattened_1.`1`, bits(UInt<3>(0h2), 2, 2) + connect _cast_bits_to_bundle_expr_2.`1`, _cast_bits_to_bundle_expr_flattened_1.`1` + connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_2 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_59: UInt<2> + match io_alternating.struct_opt_bool.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_59, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_59): + connect _cast_enum_to_bits_expr_59, pad(cat(_cast_enum_to_bits_expr_HdlSome_59, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_60: UInt<2> + match _cast_bits_to_bundle_expr_2.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_60, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_60): + connect _cast_enum_to_bits_expr_60, pad(cat(_cast_enum_to_bits_expr_HdlSome_60, UInt<1>(1)), 2) wire _bundle_structural_eq_4: UInt<1> - connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) - connect child_out.struct_opt_bool, _bundle_structural_eq_4 @[module-XXXXXXXXXX.rs 13:1] - wire _cast_enum_to_bits_expr_48: UInt<2> + connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_59, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_2.`1`)) + connect parent_alternating_out.struct_opt_bool, _bundle_structural_eq_4 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_61: UInt<2> + match io_alternating.struct_opt_bool_flip.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_61, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_61): + connect _cast_enum_to_bits_expr_61, pad(cat(_cast_enum_to_bits_expr_HdlSome_61, UInt<1>(1)), 2) + wire _bundle_structural_eq_5: UInt<1> + connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_61, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_2.`1`)) + connect parent_alternating_out.struct_opt_bool_flip, _bundle_structural_eq_5 @[module-XXXXXXXXXX.rs 17:1] + connect extern_child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_62: UInt<1> + match extern_child.io.opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_62, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_62): + connect _cast_enum_to_bits_expr_62, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect extern_child_out.opt_unit, eq(_cast_enum_to_bits_expr_62, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_63: UInt<1> + match extern_child.io.opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_63, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_63): + connect _cast_enum_to_bits_expr_63, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect extern_child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_63, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + connect extern_child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_64: UInt<2> + match extern_child.io.opt_bool: + HdlNone: + connect _cast_enum_to_bits_expr_64, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_64): + connect _cast_enum_to_bits_expr_64, pad(cat(_cast_enum_to_bits_expr_HdlSome_64, UInt<1>(1)), 2) + connect extern_child_out.opt_bool, eq(_cast_enum_to_bits_expr_64, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_65: UInt<2> + match extern_child.io.opt_bool_flip: + HdlNone: + connect _cast_enum_to_bits_expr_65, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_65): + connect _cast_enum_to_bits_expr_65, pad(cat(_cast_enum_to_bits_expr_HdlSome_65, UInt<1>(1)), 2) + connect extern_child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_65, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + connect extern_child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_66: UInt<2> + match extern_child.io.opt_opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_66, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_66): + wire _cast_enum_to_bits_expr_67: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_66: + HdlNone: + connect _cast_enum_to_bits_expr_67, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_67): + connect _cast_enum_to_bits_expr_67, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_66, pad(cat(_cast_enum_to_bits_expr_67, UInt<1>(1)), 2) + connect extern_child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_66, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_68: UInt<2> + match extern_child.io.opt_opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_68, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_68): + wire _cast_enum_to_bits_expr_69: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_68: + HdlNone: + connect _cast_enum_to_bits_expr_69, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_69): + connect _cast_enum_to_bits_expr_69, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_68, pad(cat(_cast_enum_to_bits_expr_69, UInt<1>(1)), 2) + connect extern_child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_68, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_70: UInt<2> + match extern_child.io.array_opt_bool[0]: + HdlNone: + connect _cast_enum_to_bits_expr_70, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_70): + connect _cast_enum_to_bits_expr_70, pad(cat(_cast_enum_to_bits_expr_HdlSome_70, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_71: UInt<2> + match extern_child.io.array_opt_bool[1]: + HdlNone: + connect _cast_enum_to_bits_expr_71, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_71): + connect _cast_enum_to_bits_expr_71, pad(cat(_cast_enum_to_bits_expr_HdlSome_71, UInt<1>(1)), 2) + wire _array_structural_eq_6: UInt<1> + connect _array_structural_eq_6, and(eq(_cast_enum_to_bits_expr_70, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_71, _cast_enum_to_bits_expr_15)) + connect extern_child_out.array_opt_bool, _array_structural_eq_6 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_72: UInt<2> + match extern_child.io.array_opt_bool_flip[0]: + HdlNone: + connect _cast_enum_to_bits_expr_72, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_72): + connect _cast_enum_to_bits_expr_72, pad(cat(_cast_enum_to_bits_expr_HdlSome_72, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_73: UInt<2> + match extern_child.io.array_opt_bool_flip[1]: + HdlNone: + connect _cast_enum_to_bits_expr_73, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_73): + connect _cast_enum_to_bits_expr_73, pad(cat(_cast_enum_to_bits_expr_HdlSome_73, UInt<1>(1)), 2) + wire _array_structural_eq_7: UInt<1> + connect _array_structural_eq_7, and(eq(_cast_enum_to_bits_expr_72, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_73, _cast_enum_to_bits_expr_15)) + connect extern_child_out.array_opt_bool_flip, _array_structural_eq_7 @[module-XXXXXXXXXX.rs 16:1] + connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_74: UInt<2> + match extern_child.io.struct_opt_bool.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_74, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_74): + connect _cast_enum_to_bits_expr_74, pad(cat(_cast_enum_to_bits_expr_HdlSome_74, UInt<1>(1)), 2) + wire _bundle_structural_eq_6: UInt<1> + connect _bundle_structural_eq_6, and(eq(_cast_enum_to_bits_expr_74, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) + connect extern_child_out.struct_opt_bool, _bundle_structural_eq_6 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_75: UInt<2> + match extern_child.io.struct_opt_bool_flip.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_75, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_75): + connect _cast_enum_to_bits_expr_75, pad(cat(_cast_enum_to_bits_expr_HdlSome_75, UInt<1>(1)), 2) + wire _bundle_structural_eq_7: UInt<1> + connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_75, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) + connect extern_child_out.struct_opt_bool_flip, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 17:1] + connect child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_76: UInt<1> + match child.io.opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_76, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_76): + connect _cast_enum_to_bits_expr_76, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect child_out.opt_unit, eq(_cast_enum_to_bits_expr_76, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_77: UInt<1> + match child.io.opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_77, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_77): + connect _cast_enum_to_bits_expr_77, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_77, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + connect child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_78: UInt<2> + match child.io.opt_bool: + HdlNone: + connect _cast_enum_to_bits_expr_78, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_78): + connect _cast_enum_to_bits_expr_78, pad(cat(_cast_enum_to_bits_expr_HdlSome_78, UInt<1>(1)), 2) + connect child_out.opt_bool, eq(_cast_enum_to_bits_expr_78, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_79: UInt<2> + match child.io.opt_bool_flip: + HdlNone: + connect _cast_enum_to_bits_expr_79, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_79): + connect _cast_enum_to_bits_expr_79, pad(cat(_cast_enum_to_bits_expr_HdlSome_79, UInt<1>(1)), 2) + connect child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_79, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + connect child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_80: UInt<2> + match child.io.opt_opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_80, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_80): + wire _cast_enum_to_bits_expr_81: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_80: + HdlNone: + connect _cast_enum_to_bits_expr_81, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_81): + connect _cast_enum_to_bits_expr_81, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_80, pad(cat(_cast_enum_to_bits_expr_81, UInt<1>(1)), 2) + connect child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_80, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_82: UInt<2> + match child.io.opt_opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_82, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_82): + wire _cast_enum_to_bits_expr_83: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_82: + HdlNone: + connect _cast_enum_to_bits_expr_83, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_83): + connect _cast_enum_to_bits_expr_83, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_82, pad(cat(_cast_enum_to_bits_expr_83, UInt<1>(1)), 2) + connect child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_82, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_84: UInt<2> + match child.io.array_opt_bool[0]: + HdlNone: + connect _cast_enum_to_bits_expr_84, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_84): + connect _cast_enum_to_bits_expr_84, pad(cat(_cast_enum_to_bits_expr_HdlSome_84, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_85: UInt<2> + match child.io.array_opt_bool[1]: + HdlNone: + connect _cast_enum_to_bits_expr_85, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_85): + connect _cast_enum_to_bits_expr_85, pad(cat(_cast_enum_to_bits_expr_HdlSome_85, UInt<1>(1)), 2) + wire _array_structural_eq_8: UInt<1> + connect _array_structural_eq_8, and(eq(_cast_enum_to_bits_expr_84, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_85, _cast_enum_to_bits_expr_15)) + connect child_out.array_opt_bool, _array_structural_eq_8 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_86: UInt<2> + match child.io.array_opt_bool_flip[0]: + HdlNone: + connect _cast_enum_to_bits_expr_86, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_86): + connect _cast_enum_to_bits_expr_86, pad(cat(_cast_enum_to_bits_expr_HdlSome_86, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_87: UInt<2> + match child.io.array_opt_bool_flip[1]: + HdlNone: + connect _cast_enum_to_bits_expr_87, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_87): + connect _cast_enum_to_bits_expr_87, pad(cat(_cast_enum_to_bits_expr_HdlSome_87, UInt<1>(1)), 2) + wire _array_structural_eq_9: UInt<1> + connect _array_structural_eq_9, and(eq(_cast_enum_to_bits_expr_86, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_87, _cast_enum_to_bits_expr_15)) + connect child_out.array_opt_bool_flip, _array_structural_eq_9 @[module-XXXXXXXXXX.rs 16:1] + connect child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_88: UInt<2> + match child.io.struct_opt_bool.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_88, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_88): + connect _cast_enum_to_bits_expr_88, pad(cat(_cast_enum_to_bits_expr_HdlSome_88, UInt<1>(1)), 2) + wire _bundle_structural_eq_8: UInt<1> + connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_88, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) + connect child_out.struct_opt_bool, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_89: UInt<2> match child.io.struct_opt_bool_flip.`0`: HdlNone: - connect _cast_enum_to_bits_expr_48, UInt<2>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_48): - connect _cast_enum_to_bits_expr_48, pad(cat(_cast_enum_to_bits_expr_HdlSome_48, UInt<1>(1)), 2) - wire _bundle_structural_eq_5: UInt<1> - connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_48, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) - connect child_out.struct_opt_bool_flip, _bundle_structural_eq_5 @[module-XXXXXXXXXX.rs 13:1] + connect _cast_enum_to_bits_expr_89, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_89): + connect _cast_enum_to_bits_expr_89, pad(cat(_cast_enum_to_bits_expr_HdlSome_89, UInt<1>(1)), 2) + wire _bundle_structural_eq_9: UInt<1> + connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_89, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) + connect child_out.struct_opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 17:1] extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1] output io: Ty5 @[module-XXXXXXXXXX-2.rs 2:1] defname = check_deduce_structural_eq_flags_extern_child @@ -573,6 +1020,26 @@ circuit check_deduce_structural_eq_flags_parent: "check_deduce_structural_eq_flags_parent::parent_out.array_opt_bool_flip": true, "check_deduce_structural_eq_flags_parent::parent_out.struct_opt_bool": false, "check_deduce_structural_eq_flags_parent::parent_out.struct_opt_bool_flip": true, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_unit": true, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_unit_flip": true, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_bool": false, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_bool_flip": true, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_opt_unit": false, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.opt_opt_unit_flip": true, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.array_opt_bool": false, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.array_opt_bool_flip": true, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.struct_opt_bool": false, + "check_deduce_structural_eq_flags_parent::parent_zeros_out.struct_opt_bool_flip": true, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_unit": true, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_unit_flip": true, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_bool": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_bool_flip": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_opt_unit": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.opt_opt_unit_flip": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.array_opt_bool": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.array_opt_bool_flip": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.struct_opt_bool": false, + "check_deduce_structural_eq_flags_parent::parent_alternating_out.struct_opt_bool_flip": false, "check_deduce_structural_eq_flags_parent::extern_child_out.opt_unit": true, "check_deduce_structural_eq_flags_parent::extern_child_out.opt_unit_flip": true, "check_deduce_structural_eq_flags_parent::extern_child_out.opt_bool": false, @@ -649,17 +1116,22 @@ circuit check_deduce_structural_eq_flags_parent: type Ty4 = {`0`: Ty2, `1`: UInt<1>} type Ty5 = {flip opt_unit_flip: Ty1, opt_unit: Ty1, flip opt_bool_flip: Ty2, opt_bool: Ty2, flip opt_opt_unit_flip: Ty3, opt_opt_unit: Ty3, flip array_opt_bool_flip: Ty2[2], array_opt_bool: Ty2[2], flip struct_opt_bool_flip: Ty4, struct_opt_bool: Ty4} type Ty6 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>} - type Ty7 = {io: Ty5} + type Ty7 = {`0`: UInt<2>, `1`: UInt<1>} + type Ty8 = {io: Ty5} module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1] input io: Ty5 @[module-XXXXXXXXXX.rs 2:1] - output parent_out: Ty6 @[module-XXXXXXXXXX.rs 3:1] - output extern_child_out: Ty6 @[module-XXXXXXXXXX.rs 4:1] - output child_out: Ty6 @[module-XXXXXXXXXX.rs 5:1] - inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 6:1] - inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 7:1] + input io_zeros: Ty5 @[module-XXXXXXXXXX.rs 3:1] + input io_alternating: Ty5 @[module-XXXXXXXXXX.rs 4:1] + output parent_out: Ty6 @[module-XXXXXXXXXX.rs 5:1] + output parent_zeros_out: Ty6 @[module-XXXXXXXXXX.rs 6:1] + output parent_alternating_out: Ty6 @[module-XXXXXXXXXX.rs 7:1] + output extern_child_out: Ty6 @[module-XXXXXXXXXX.rs 8:1] + output child_out: Ty6 @[module-XXXXXXXXXX.rs 9:1] + inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1] + inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1] wire _bundle_literal_expr: Ty0 invalidate _bundle_literal_expr - connect io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 9:1] + connect io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr: UInt<1> match io.opt_unit: HdlNone: @@ -672,15 +1144,15 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_1, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_1): connect _cast_enum_to_bits_expr_1, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect parent_out.opt_unit, eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.opt_unit, eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_2: UInt<1> match io.opt_unit_flip: HdlNone: connect _cast_enum_to_bits_expr_2, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_2): connect _cast_enum_to_bits_expr_2, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect parent_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - connect io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 10:1] + connect parent_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + connect io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_3: UInt<2> match io.opt_bool: HdlNone: @@ -693,15 +1165,15 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_4, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_4): connect _cast_enum_to_bits_expr_4, pad(cat(_cast_enum_to_bits_expr_HdlSome_4, UInt<1>(1)), 2) - connect parent_out.opt_bool, eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] + connect parent_out.opt_bool, eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_5: UInt<2> match io.opt_bool_flip: HdlNone: connect _cast_enum_to_bits_expr_5, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_5): connect _cast_enum_to_bits_expr_5, pad(cat(_cast_enum_to_bits_expr_HdlSome_5, UInt<1>(1)), 2) - connect parent_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] - connect io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + connect io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_6: UInt<2> match io.opt_opt_unit: HdlNone: @@ -726,7 +1198,7 @@ circuit check_deduce_structural_eq_flags_parent: HdlSome(_cast_enum_to_bits_expr_HdlSome_9): connect _cast_enum_to_bits_expr_9, pad(cat(UInt<0>(0), UInt<1>(1)), 1) connect _cast_enum_to_bits_expr_8, pad(cat(_cast_enum_to_bits_expr_9, UInt<1>(1)), 2) - connect parent_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_6, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_10: UInt<2> match io.opt_opt_unit_flip: HdlNone: @@ -739,11 +1211,11 @@ circuit check_deduce_structural_eq_flags_parent: HdlSome(_cast_enum_to_bits_expr_HdlSome_11): connect _cast_enum_to_bits_expr_11, pad(cat(UInt<0>(0), UInt<1>(1)), 1) connect _cast_enum_to_bits_expr_10, pad(cat(_cast_enum_to_bits_expr_11, UInt<1>(1)), 2) - connect parent_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_10, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] wire _array_literal_expr: Ty2[2] connect _array_literal_expr[0], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h0)) connect _array_literal_expr[1], {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) - connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] + connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_12: UInt<2> match io.array_opt_bool[0]: HdlNone: @@ -770,7 +1242,7 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_15, pad(cat(_cast_enum_to_bits_expr_HdlSome_15, UInt<1>(1)), 2) wire _array_structural_eq: UInt<1> connect _array_structural_eq, and(eq(_cast_enum_to_bits_expr_12, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_14, _cast_enum_to_bits_expr_15)) - connect parent_out.array_opt_bool, _array_structural_eq @[module-XXXXXXXXXX.rs 12:1] + connect parent_out.array_opt_bool, _array_structural_eq @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_16: UInt<2> match io.array_opt_bool_flip[0]: HdlNone: @@ -785,11 +1257,11 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_17, pad(cat(_cast_enum_to_bits_expr_HdlSome_17, UInt<1>(1)), 2) wire _array_structural_eq_1: UInt<1> connect _array_structural_eq_1, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_17, _cast_enum_to_bits_expr_15)) - connect parent_out.array_opt_bool_flip, _array_structural_eq_1 @[module-XXXXXXXXXX.rs 12:1] + connect parent_out.array_opt_bool_flip, _array_structural_eq_1 @[module-XXXXXXXXXX.rs 16:1] wire _bundle_literal_expr_1: Ty4 connect _bundle_literal_expr_1.`0`, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) connect _bundle_literal_expr_1.`1`, UInt<1>(0h1) - connect io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 13:1] + connect io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_18: UInt<2> match io.struct_opt_bool.`0`: HdlNone: @@ -804,7 +1276,7 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_19, pad(cat(_cast_enum_to_bits_expr_HdlSome_19, UInt<1>(1)), 2) wire _bundle_structural_eq: UInt<1> connect _bundle_structural_eq, and(eq(_cast_enum_to_bits_expr_18, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) - connect parent_out.struct_opt_bool, _bundle_structural_eq @[module-XXXXXXXXXX.rs 13:1] + connect parent_out.struct_opt_bool, _bundle_structural_eq @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_20: UInt<2> match io.struct_opt_bool_flip.`0`: HdlNone: @@ -813,53 +1285,78 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_20, pad(cat(_cast_enum_to_bits_expr_HdlSome_20, UInt<1>(1)), 2) wire _bundle_structural_eq_1: UInt<1> connect _bundle_structural_eq_1, and(eq(_cast_enum_to_bits_expr_20, _cast_enum_to_bits_expr_19), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) - connect parent_out.struct_opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 13:1] - connect extern_child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.struct_opt_bool_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_bits_to_enum_expr: Ty1 + when eq(UInt<1>(0), tail(UInt<1>(0h0), 0)): + connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlNone) + else: + wire _cast_bits_to_bundle_expr: Ty0 + invalidate _cast_bits_to_bundle_expr + connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr) + connect io_zeros.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_21: UInt<1> - match extern_child.io.opt_unit: + match io_zeros.opt_unit: HdlNone: connect _cast_enum_to_bits_expr_21, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_21): connect _cast_enum_to_bits_expr_21, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect extern_child_out.opt_unit, eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] wire _cast_enum_to_bits_expr_22: UInt<1> - match extern_child.io.opt_unit_flip: + match _cast_bits_to_enum_expr: HdlNone: connect _cast_enum_to_bits_expr_22, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_22): connect _cast_enum_to_bits_expr_22, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect extern_child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_22, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - connect extern_child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 10:1] - wire _cast_enum_to_bits_expr_23: UInt<2> - match extern_child.io.opt_bool: + connect parent_zeros_out.opt_unit, eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_23: UInt<1> + match io_zeros.opt_unit_flip: HdlNone: - connect _cast_enum_to_bits_expr_23, UInt<2>(0) + connect _cast_enum_to_bits_expr_23, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_23): - connect _cast_enum_to_bits_expr_23, pad(cat(_cast_enum_to_bits_expr_HdlSome_23, UInt<1>(1)), 2) - connect extern_child_out.opt_bool, eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] + connect _cast_enum_to_bits_expr_23, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect parent_zeros_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_enum_expr_1: Ty2 + wire _cast_bits_to_enum_expr_body_1: UInt<1> + connect _cast_bits_to_enum_expr_body_1, head(UInt<2>(0h0), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)): + connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_1) + connect io_zeros.opt_bool_flip, _cast_bits_to_enum_expr_1 @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_24: UInt<2> - match extern_child.io.opt_bool_flip: + match io_zeros.opt_bool: HdlNone: connect _cast_enum_to_bits_expr_24, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_24): connect _cast_enum_to_bits_expr_24, pad(cat(_cast_enum_to_bits_expr_HdlSome_24, UInt<1>(1)), 2) - connect extern_child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] - connect extern_child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 11:1] wire _cast_enum_to_bits_expr_25: UInt<2> - match extern_child.io.opt_opt_unit: + match _cast_bits_to_enum_expr_1: HdlNone: connect _cast_enum_to_bits_expr_25, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_25): - wire _cast_enum_to_bits_expr_26: UInt<1> - match _cast_enum_to_bits_expr_HdlSome_25: - HdlNone: - connect _cast_enum_to_bits_expr_26, UInt<1>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_26): - connect _cast_enum_to_bits_expr_26, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect _cast_enum_to_bits_expr_25, pad(cat(_cast_enum_to_bits_expr_26, UInt<1>(1)), 2) - connect extern_child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_25, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect _cast_enum_to_bits_expr_25, pad(cat(_cast_enum_to_bits_expr_HdlSome_25, UInt<1>(1)), 2) + connect parent_zeros_out.opt_bool, eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_26: UInt<2> + match io_zeros.opt_bool_flip: + HdlNone: + connect _cast_enum_to_bits_expr_26, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_26): + connect _cast_enum_to_bits_expr_26, pad(cat(_cast_enum_to_bits_expr_HdlSome_26, UInt<1>(1)), 2) + connect parent_zeros_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_25) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_bits_to_enum_expr_2: Ty3 + wire _cast_bits_to_enum_expr_body_2: UInt<1> + connect _cast_bits_to_enum_expr_body_2, head(UInt<2>(0h0), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h0), 1)): + connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlNone) + else: + wire _cast_bits_to_enum_expr_3: Ty1 + when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_2, 0)): + connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr) + connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_3) + connect io_zeros.opt_opt_unit_flip, _cast_bits_to_enum_expr_2 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_27: UInt<2> - match extern_child.io.opt_opt_unit_flip: + match io_zeros.opt_opt_unit: HdlNone: connect _cast_enum_to_bits_expr_27, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_27): @@ -870,164 +1367,542 @@ circuit check_deduce_structural_eq_flags_parent: HdlSome(_cast_enum_to_bits_expr_HdlSome_28): connect _cast_enum_to_bits_expr_28, pad(cat(UInt<0>(0), UInt<1>(1)), 1) connect _cast_enum_to_bits_expr_27, pad(cat(_cast_enum_to_bits_expr_28, UInt<1>(1)), 2) - connect extern_child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] - connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] wire _cast_enum_to_bits_expr_29: UInt<2> - match extern_child.io.array_opt_bool[0]: + match _cast_bits_to_enum_expr_2: HdlNone: connect _cast_enum_to_bits_expr_29, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_29): - connect _cast_enum_to_bits_expr_29, pad(cat(_cast_enum_to_bits_expr_HdlSome_29, UInt<1>(1)), 2) - wire _cast_enum_to_bits_expr_30: UInt<2> - match extern_child.io.array_opt_bool[1]: - HdlNone: - connect _cast_enum_to_bits_expr_30, UInt<2>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_30): - connect _cast_enum_to_bits_expr_30, pad(cat(_cast_enum_to_bits_expr_HdlSome_30, UInt<1>(1)), 2) - wire _array_structural_eq_2: UInt<1> - connect _array_structural_eq_2, and(eq(_cast_enum_to_bits_expr_29, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_30, _cast_enum_to_bits_expr_15)) - connect extern_child_out.array_opt_bool, _array_structural_eq_2 @[module-XXXXXXXXXX.rs 12:1] + wire _cast_enum_to_bits_expr_30: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_29: + HdlNone: + connect _cast_enum_to_bits_expr_30, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_30): + connect _cast_enum_to_bits_expr_30, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_29, pad(cat(_cast_enum_to_bits_expr_30, UInt<1>(1)), 2) + connect parent_zeros_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_31: UInt<2> - match extern_child.io.array_opt_bool_flip[0]: + match io_zeros.opt_opt_unit_flip: HdlNone: connect _cast_enum_to_bits_expr_31, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_31): - connect _cast_enum_to_bits_expr_31, pad(cat(_cast_enum_to_bits_expr_HdlSome_31, UInt<1>(1)), 2) - wire _cast_enum_to_bits_expr_32: UInt<2> - match extern_child.io.array_opt_bool_flip[1]: - HdlNone: - connect _cast_enum_to_bits_expr_32, UInt<2>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_32): - connect _cast_enum_to_bits_expr_32, pad(cat(_cast_enum_to_bits_expr_HdlSome_32, UInt<1>(1)), 2) - wire _array_structural_eq_3: UInt<1> - connect _array_structural_eq_3, and(eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_32, _cast_enum_to_bits_expr_15)) - connect extern_child_out.array_opt_bool_flip, _array_structural_eq_3 @[module-XXXXXXXXXX.rs 12:1] - connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_32: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_31: + HdlNone: + connect _cast_enum_to_bits_expr_32, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_32): + connect _cast_enum_to_bits_expr_32, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_31, pad(cat(_cast_enum_to_bits_expr_32, UInt<1>(1)), 2) + connect parent_zeros_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_29) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr: Ty2[2] + wire _cast_bits_to_array_expr_flattened: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0) + wire _cast_bits_to_enum_expr_4: Ty2 + wire _cast_bits_to_enum_expr_body_4: UInt<1> + connect _cast_bits_to_enum_expr_body_4, head(_cast_bits_to_array_expr_flattened[0], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[0], 1)): + connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_4) + connect _cast_bits_to_array_expr[0], _cast_bits_to_enum_expr_4 + connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2) + wire _cast_bits_to_enum_expr_5: Ty2 + wire _cast_bits_to_enum_expr_body_5: UInt<1> + connect _cast_bits_to_enum_expr_body_5, head(_cast_bits_to_array_expr_flattened[1], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened[1], 1)): + connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_5) + connect _cast_bits_to_array_expr[1], _cast_bits_to_enum_expr_5 + connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_33: UInt<2> - match extern_child.io.struct_opt_bool.`0`: + match io_zeros.array_opt_bool[0]: HdlNone: connect _cast_enum_to_bits_expr_33, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_33): connect _cast_enum_to_bits_expr_33, pad(cat(_cast_enum_to_bits_expr_HdlSome_33, UInt<1>(1)), 2) - wire _bundle_structural_eq_2: UInt<1> - connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) - connect extern_child_out.struct_opt_bool, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_34: UInt<2> - match extern_child.io.struct_opt_bool_flip.`0`: + match _cast_bits_to_array_expr[0]: HdlNone: connect _cast_enum_to_bits_expr_34, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_34): connect _cast_enum_to_bits_expr_34, pad(cat(_cast_enum_to_bits_expr_HdlSome_34, UInt<1>(1)), 2) - wire _bundle_structural_eq_3: UInt<1> - connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_34, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) - connect extern_child_out.struct_opt_bool_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 13:1] - connect child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 9:1] - wire _cast_enum_to_bits_expr_35: UInt<1> - match child.io.opt_unit: + wire _cast_enum_to_bits_expr_35: UInt<2> + match io_zeros.array_opt_bool[1]: HdlNone: - connect _cast_enum_to_bits_expr_35, UInt<1>(0) + connect _cast_enum_to_bits_expr_35, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_35): - connect _cast_enum_to_bits_expr_35, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect child_out.opt_unit, eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - wire _cast_enum_to_bits_expr_36: UInt<1> - match child.io.opt_unit_flip: + connect _cast_enum_to_bits_expr_35, pad(cat(_cast_enum_to_bits_expr_HdlSome_35, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_36: UInt<2> + match _cast_bits_to_array_expr[1]: HdlNone: - connect _cast_enum_to_bits_expr_36, UInt<1>(0) + connect _cast_enum_to_bits_expr_36, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_36): - connect _cast_enum_to_bits_expr_36, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_36, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 9:1] - connect child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 10:1] + connect _cast_enum_to_bits_expr_36, pad(cat(_cast_enum_to_bits_expr_HdlSome_36, UInt<1>(1)), 2) + wire _array_structural_eq_2: UInt<1> + connect _array_structural_eq_2, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_36)) + connect parent_zeros_out.array_opt_bool, _array_structural_eq_2 @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_37: UInt<2> - match child.io.opt_bool: + match io_zeros.array_opt_bool_flip[0]: HdlNone: connect _cast_enum_to_bits_expr_37, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_37): connect _cast_enum_to_bits_expr_37, pad(cat(_cast_enum_to_bits_expr_HdlSome_37, UInt<1>(1)), 2) - connect child_out.opt_bool, eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] wire _cast_enum_to_bits_expr_38: UInt<2> - match child.io.opt_bool_flip: + match io_zeros.array_opt_bool_flip[1]: HdlNone: connect _cast_enum_to_bits_expr_38, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_38): connect _cast_enum_to_bits_expr_38, pad(cat(_cast_enum_to_bits_expr_HdlSome_38, UInt<1>(1)), 2) - connect child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 10:1] - connect child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 11:1] + wire _array_structural_eq_3: UInt<1> + connect _array_structural_eq_3, and(eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_34), eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_36)) + connect parent_zeros_out.array_opt_bool_flip, _array_structural_eq_3 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_1: Ty4 + wire _cast_bits_to_bundle_expr_flattened: Ty7 + connect _cast_bits_to_bundle_expr_flattened.`0`, bits(UInt<3>(0h0), 1, 0) + wire _cast_bits_to_enum_expr_6: Ty2 + wire _cast_bits_to_enum_expr_body_6: UInt<1> + connect _cast_bits_to_enum_expr_body_6, head(_cast_bits_to_bundle_expr_flattened.`0`, 1) + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.`0`, 1)): + connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_6) + connect _cast_bits_to_bundle_expr_1.`0`, _cast_bits_to_enum_expr_6 + connect _cast_bits_to_bundle_expr_flattened.`1`, bits(UInt<3>(0h0), 2, 2) + connect _cast_bits_to_bundle_expr_1.`1`, _cast_bits_to_bundle_expr_flattened.`1` + connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_39: UInt<2> - match child.io.opt_opt_unit: + match io_zeros.struct_opt_bool.`0`: HdlNone: connect _cast_enum_to_bits_expr_39, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_39): - wire _cast_enum_to_bits_expr_40: UInt<1> - match _cast_enum_to_bits_expr_HdlSome_39: - HdlNone: - connect _cast_enum_to_bits_expr_40, UInt<1>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_40): - connect _cast_enum_to_bits_expr_40, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect _cast_enum_to_bits_expr_39, pad(cat(_cast_enum_to_bits_expr_40, UInt<1>(1)), 2) - connect child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] + connect _cast_enum_to_bits_expr_39, pad(cat(_cast_enum_to_bits_expr_HdlSome_39, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_40: UInt<2> + match _cast_bits_to_bundle_expr_1.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_40, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_40): + connect _cast_enum_to_bits_expr_40, pad(cat(_cast_enum_to_bits_expr_HdlSome_40, UInt<1>(1)), 2) + wire _bundle_structural_eq_2: UInt<1> + connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_1.`1`)) + connect parent_zeros_out.struct_opt_bool, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_41: UInt<2> - match child.io.opt_opt_unit_flip: + match io_zeros.struct_opt_bool_flip.`0`: HdlNone: connect _cast_enum_to_bits_expr_41, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_41): - wire _cast_enum_to_bits_expr_42: UInt<1> - match _cast_enum_to_bits_expr_HdlSome_41: - HdlNone: - connect _cast_enum_to_bits_expr_42, UInt<1>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_42): - connect _cast_enum_to_bits_expr_42, pad(cat(UInt<0>(0), UInt<1>(1)), 1) - connect _cast_enum_to_bits_expr_41, pad(cat(_cast_enum_to_bits_expr_42, UInt<1>(1)), 2) - connect child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 11:1] - connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - wire _cast_enum_to_bits_expr_43: UInt<2> - match child.io.array_opt_bool[0]: + connect _cast_enum_to_bits_expr_41, pad(cat(_cast_enum_to_bits_expr_HdlSome_41, UInt<1>(1)), 2) + wire _bundle_structural_eq_3: UInt<1> + connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_40), eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_1.`1`)) + connect parent_zeros_out.struct_opt_bool_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 17:1] + connect io_alternating.opt_unit_flip, _cast_bits_to_enum_expr @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_42: UInt<1> + match io_alternating.opt_unit: HdlNone: - connect _cast_enum_to_bits_expr_43, UInt<2>(0) + connect _cast_enum_to_bits_expr_42, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_42): + connect _cast_enum_to_bits_expr_42, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect parent_alternating_out.opt_unit, eq(_cast_enum_to_bits_expr_42, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_43: UInt<1> + match io_alternating.opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_43, UInt<1>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_43): - connect _cast_enum_to_bits_expr_43, pad(cat(_cast_enum_to_bits_expr_HdlSome_43, UInt<1>(1)), 2) + connect _cast_enum_to_bits_expr_43, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect parent_alternating_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_22) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_enum_expr_7: Ty2 + wire _cast_bits_to_enum_expr_body_7: UInt<1> + connect _cast_bits_to_enum_expr_body_7, head(UInt<2>(0h2), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)): + connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_7) + connect io_alternating.opt_bool_flip, _cast_bits_to_enum_expr_7 @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_44: UInt<2> - match child.io.array_opt_bool[1]: + match io_alternating.opt_bool: HdlNone: connect _cast_enum_to_bits_expr_44, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_44): connect _cast_enum_to_bits_expr_44, pad(cat(_cast_enum_to_bits_expr_HdlSome_44, UInt<1>(1)), 2) - wire _array_structural_eq_4: UInt<1> - connect _array_structural_eq_4, and(eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_15)) - connect child_out.array_opt_bool, _array_structural_eq_4 @[module-XXXXXXXXXX.rs 12:1] wire _cast_enum_to_bits_expr_45: UInt<2> - match child.io.array_opt_bool_flip[0]: + match _cast_bits_to_enum_expr_7: HdlNone: connect _cast_enum_to_bits_expr_45, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_45): connect _cast_enum_to_bits_expr_45, pad(cat(_cast_enum_to_bits_expr_HdlSome_45, UInt<1>(1)), 2) + connect parent_alternating_out.opt_bool, eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_46: UInt<2> - match child.io.array_opt_bool_flip[1]: + match io_alternating.opt_bool_flip: HdlNone: connect _cast_enum_to_bits_expr_46, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_46): connect _cast_enum_to_bits_expr_46, pad(cat(_cast_enum_to_bits_expr_HdlSome_46, UInt<1>(1)), 2) - wire _array_structural_eq_5: UInt<1> - connect _array_structural_eq_5, and(eq(_cast_enum_to_bits_expr_45, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_15)) - connect child_out.array_opt_bool_flip, _array_structural_eq_5 @[module-XXXXXXXXXX.rs 12:1] - connect child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 13:1] + connect parent_alternating_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_45) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_bits_to_enum_expr_8: Ty3 + wire _cast_bits_to_enum_expr_body_8: UInt<1> + connect _cast_bits_to_enum_expr_body_8, head(UInt<2>(0h2), 1) + when eq(UInt<1>(0), tail(UInt<2>(0h2), 1)): + connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlNone) + else: + wire _cast_bits_to_enum_expr_9: Ty1 + when eq(UInt<1>(0), tail(_cast_bits_to_enum_expr_body_8, 0)): + connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome: Ty0|}(HdlSome, _cast_bits_to_bundle_expr) + connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome: Ty1|}(HdlSome, _cast_bits_to_enum_expr_9) + connect io_alternating.opt_opt_unit_flip, _cast_bits_to_enum_expr_8 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_47: UInt<2> - match child.io.struct_opt_bool.`0`: + match io_alternating.opt_opt_unit: HdlNone: connect _cast_enum_to_bits_expr_47, UInt<2>(0) HdlSome(_cast_enum_to_bits_expr_HdlSome_47): - connect _cast_enum_to_bits_expr_47, pad(cat(_cast_enum_to_bits_expr_HdlSome_47, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_48: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_47: + HdlNone: + connect _cast_enum_to_bits_expr_48, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_48): + connect _cast_enum_to_bits_expr_48, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_47, pad(cat(_cast_enum_to_bits_expr_48, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_49: UInt<2> + match _cast_bits_to_enum_expr_8: + HdlNone: + connect _cast_enum_to_bits_expr_49, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_49): + wire _cast_enum_to_bits_expr_50: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_49: + HdlNone: + connect _cast_enum_to_bits_expr_50, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_50): + connect _cast_enum_to_bits_expr_50, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_49, pad(cat(_cast_enum_to_bits_expr_50, UInt<1>(1)), 2) + connect parent_alternating_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_51: UInt<2> + match io_alternating.opt_opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_51, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_51): + wire _cast_enum_to_bits_expr_52: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_51: + HdlNone: + connect _cast_enum_to_bits_expr_52, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_52): + connect _cast_enum_to_bits_expr_52, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_51, pad(cat(_cast_enum_to_bits_expr_52, UInt<1>(1)), 2) + connect parent_alternating_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_51, _cast_enum_to_bits_expr_49) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr_1: Ty2[2] + wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0) + wire _cast_bits_to_enum_expr_10: Ty2 + wire _cast_bits_to_enum_expr_body_10: UInt<1> + connect _cast_bits_to_enum_expr_body_10, head(_cast_bits_to_array_expr_flattened_1[0], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[0], 1)): + connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_10) + connect _cast_bits_to_array_expr_1[0], _cast_bits_to_enum_expr_10 + connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2) + wire _cast_bits_to_enum_expr_11: Ty2 + wire _cast_bits_to_enum_expr_body_11: UInt<1> + connect _cast_bits_to_enum_expr_body_11, head(_cast_bits_to_array_expr_flattened_1[1], 1) + when eq(UInt<1>(0), tail(_cast_bits_to_array_expr_flattened_1[1], 1)): + connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_11) + connect _cast_bits_to_array_expr_1[1], _cast_bits_to_enum_expr_11 + connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_53: UInt<2> + match io_alternating.array_opt_bool[0]: + HdlNone: + connect _cast_enum_to_bits_expr_53, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_53): + connect _cast_enum_to_bits_expr_53, pad(cat(_cast_enum_to_bits_expr_HdlSome_53, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_54: UInt<2> + match _cast_bits_to_array_expr_1[0]: + HdlNone: + connect _cast_enum_to_bits_expr_54, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_54): + connect _cast_enum_to_bits_expr_54, pad(cat(_cast_enum_to_bits_expr_HdlSome_54, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_55: UInt<2> + match io_alternating.array_opt_bool[1]: + HdlNone: + connect _cast_enum_to_bits_expr_55, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_55): + connect _cast_enum_to_bits_expr_55, pad(cat(_cast_enum_to_bits_expr_HdlSome_55, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_56: UInt<2> + match _cast_bits_to_array_expr_1[1]: + HdlNone: + connect _cast_enum_to_bits_expr_56, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_56): + connect _cast_enum_to_bits_expr_56, pad(cat(_cast_enum_to_bits_expr_HdlSome_56, UInt<1>(1)), 2) + wire _array_structural_eq_4: UInt<1> + connect _array_structural_eq_4, and(eq(_cast_enum_to_bits_expr_53, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_55, _cast_enum_to_bits_expr_56)) + connect parent_alternating_out.array_opt_bool, _array_structural_eq_4 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_57: UInt<2> + match io_alternating.array_opt_bool_flip[0]: + HdlNone: + connect _cast_enum_to_bits_expr_57, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_57): + connect _cast_enum_to_bits_expr_57, pad(cat(_cast_enum_to_bits_expr_HdlSome_57, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_58: UInt<2> + match io_alternating.array_opt_bool_flip[1]: + HdlNone: + connect _cast_enum_to_bits_expr_58, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_58): + connect _cast_enum_to_bits_expr_58, pad(cat(_cast_enum_to_bits_expr_HdlSome_58, UInt<1>(1)), 2) + wire _array_structural_eq_5: UInt<1> + connect _array_structural_eq_5, and(eq(_cast_enum_to_bits_expr_57, _cast_enum_to_bits_expr_54), eq(_cast_enum_to_bits_expr_58, _cast_enum_to_bits_expr_56)) + connect parent_alternating_out.array_opt_bool_flip, _array_structural_eq_5 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_2: Ty4 + wire _cast_bits_to_bundle_expr_flattened_1: Ty7 + connect _cast_bits_to_bundle_expr_flattened_1.`0`, bits(UInt<3>(0h2), 1, 0) + wire _cast_bits_to_enum_expr_12: Ty2 + wire _cast_bits_to_enum_expr_body_12: UInt<1> + connect _cast_bits_to_enum_expr_body_12, head(_cast_bits_to_bundle_expr_flattened_1.`0`, 1) + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.`0`, 1)): + connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, _cast_bits_to_enum_expr_body_12) + connect _cast_bits_to_bundle_expr_2.`0`, _cast_bits_to_enum_expr_12 + connect _cast_bits_to_bundle_expr_flattened_1.`1`, bits(UInt<3>(0h2), 2, 2) + connect _cast_bits_to_bundle_expr_2.`1`, _cast_bits_to_bundle_expr_flattened_1.`1` + connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_2 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_59: UInt<2> + match io_alternating.struct_opt_bool.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_59, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_59): + connect _cast_enum_to_bits_expr_59, pad(cat(_cast_enum_to_bits_expr_HdlSome_59, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_60: UInt<2> + match _cast_bits_to_bundle_expr_2.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_60, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_60): + connect _cast_enum_to_bits_expr_60, pad(cat(_cast_enum_to_bits_expr_HdlSome_60, UInt<1>(1)), 2) wire _bundle_structural_eq_4: UInt<1> - connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) - connect child_out.struct_opt_bool, _bundle_structural_eq_4 @[module-XXXXXXXXXX.rs 13:1] - wire _cast_enum_to_bits_expr_48: UInt<2> + connect _bundle_structural_eq_4, and(eq(_cast_enum_to_bits_expr_59, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_2.`1`)) + connect parent_alternating_out.struct_opt_bool, _bundle_structural_eq_4 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_61: UInt<2> + match io_alternating.struct_opt_bool_flip.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_61, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_61): + connect _cast_enum_to_bits_expr_61, pad(cat(_cast_enum_to_bits_expr_HdlSome_61, UInt<1>(1)), 2) + wire _bundle_structural_eq_5: UInt<1> + connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_61, _cast_enum_to_bits_expr_60), eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_2.`1`)) + connect parent_alternating_out.struct_opt_bool_flip, _bundle_structural_eq_5 @[module-XXXXXXXXXX.rs 17:1] + connect extern_child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_62: UInt<1> + match extern_child.io.opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_62, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_62): + connect _cast_enum_to_bits_expr_62, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect extern_child_out.opt_unit, eq(_cast_enum_to_bits_expr_62, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_63: UInt<1> + match extern_child.io.opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_63, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_63): + connect _cast_enum_to_bits_expr_63, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect extern_child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_63, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + connect extern_child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_64: UInt<2> + match extern_child.io.opt_bool: + HdlNone: + connect _cast_enum_to_bits_expr_64, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_64): + connect _cast_enum_to_bits_expr_64, pad(cat(_cast_enum_to_bits_expr_HdlSome_64, UInt<1>(1)), 2) + connect extern_child_out.opt_bool, eq(_cast_enum_to_bits_expr_64, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_65: UInt<2> + match extern_child.io.opt_bool_flip: + HdlNone: + connect _cast_enum_to_bits_expr_65, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_65): + connect _cast_enum_to_bits_expr_65, pad(cat(_cast_enum_to_bits_expr_HdlSome_65, UInt<1>(1)), 2) + connect extern_child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_65, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + connect extern_child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_66: UInt<2> + match extern_child.io.opt_opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_66, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_66): + wire _cast_enum_to_bits_expr_67: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_66: + HdlNone: + connect _cast_enum_to_bits_expr_67, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_67): + connect _cast_enum_to_bits_expr_67, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_66, pad(cat(_cast_enum_to_bits_expr_67, UInt<1>(1)), 2) + connect extern_child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_66, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_68: UInt<2> + match extern_child.io.opt_opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_68, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_68): + wire _cast_enum_to_bits_expr_69: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_68: + HdlNone: + connect _cast_enum_to_bits_expr_69, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_69): + connect _cast_enum_to_bits_expr_69, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_68, pad(cat(_cast_enum_to_bits_expr_69, UInt<1>(1)), 2) + connect extern_child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_68, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_70: UInt<2> + match extern_child.io.array_opt_bool[0]: + HdlNone: + connect _cast_enum_to_bits_expr_70, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_70): + connect _cast_enum_to_bits_expr_70, pad(cat(_cast_enum_to_bits_expr_HdlSome_70, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_71: UInt<2> + match extern_child.io.array_opt_bool[1]: + HdlNone: + connect _cast_enum_to_bits_expr_71, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_71): + connect _cast_enum_to_bits_expr_71, pad(cat(_cast_enum_to_bits_expr_HdlSome_71, UInt<1>(1)), 2) + wire _array_structural_eq_6: UInt<1> + connect _array_structural_eq_6, and(eq(_cast_enum_to_bits_expr_70, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_71, _cast_enum_to_bits_expr_15)) + connect extern_child_out.array_opt_bool, _array_structural_eq_6 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_72: UInt<2> + match extern_child.io.array_opt_bool_flip[0]: + HdlNone: + connect _cast_enum_to_bits_expr_72, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_72): + connect _cast_enum_to_bits_expr_72, pad(cat(_cast_enum_to_bits_expr_HdlSome_72, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_73: UInt<2> + match extern_child.io.array_opt_bool_flip[1]: + HdlNone: + connect _cast_enum_to_bits_expr_73, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_73): + connect _cast_enum_to_bits_expr_73, pad(cat(_cast_enum_to_bits_expr_HdlSome_73, UInt<1>(1)), 2) + wire _array_structural_eq_7: UInt<1> + connect _array_structural_eq_7, and(eq(_cast_enum_to_bits_expr_72, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_73, _cast_enum_to_bits_expr_15)) + connect extern_child_out.array_opt_bool_flip, _array_structural_eq_7 @[module-XXXXXXXXXX.rs 16:1] + connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_74: UInt<2> + match extern_child.io.struct_opt_bool.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_74, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_74): + connect _cast_enum_to_bits_expr_74, pad(cat(_cast_enum_to_bits_expr_HdlSome_74, UInt<1>(1)), 2) + wire _bundle_structural_eq_6: UInt<1> + connect _bundle_structural_eq_6, and(eq(_cast_enum_to_bits_expr_74, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) + connect extern_child_out.struct_opt_bool, _bundle_structural_eq_6 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_75: UInt<2> + match extern_child.io.struct_opt_bool_flip.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_75, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_75): + connect _cast_enum_to_bits_expr_75, pad(cat(_cast_enum_to_bits_expr_HdlSome_75, UInt<1>(1)), 2) + wire _bundle_structural_eq_7: UInt<1> + connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_75, _cast_enum_to_bits_expr_19), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) + connect extern_child_out.struct_opt_bool_flip, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 17:1] + connect child.io.opt_unit_flip, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_76: UInt<1> + match child.io.opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_76, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_76): + connect _cast_enum_to_bits_expr_76, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect child_out.opt_unit, eq(_cast_enum_to_bits_expr_76, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_77: UInt<1> + match child.io.opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_77, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_77): + connect _cast_enum_to_bits_expr_77, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect child_out.opt_unit_flip, eq(_cast_enum_to_bits_expr_77, _cast_enum_to_bits_expr_1) @[module-XXXXXXXXXX.rs 13:1] + connect child.io.opt_bool_flip, {|HdlNone, HdlSome: UInt<1>|}(HdlSome, UInt<1>(0h1)) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_78: UInt<2> + match child.io.opt_bool: + HdlNone: + connect _cast_enum_to_bits_expr_78, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_78): + connect _cast_enum_to_bits_expr_78, pad(cat(_cast_enum_to_bits_expr_HdlSome_78, UInt<1>(1)), 2) + connect child_out.opt_bool, eq(_cast_enum_to_bits_expr_78, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_79: UInt<2> + match child.io.opt_bool_flip: + HdlNone: + connect _cast_enum_to_bits_expr_79, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_79): + connect _cast_enum_to_bits_expr_79, pad(cat(_cast_enum_to_bits_expr_HdlSome_79, UInt<1>(1)), 2) + connect child_out.opt_bool_flip, eq(_cast_enum_to_bits_expr_79, _cast_enum_to_bits_expr_4) @[module-XXXXXXXXXX.rs 14:1] + connect child.io.opt_opt_unit_flip, {|HdlNone, HdlSome: Ty1|}(HdlSome, {|HdlNone, HdlSome: Ty0|}(HdlSome, _bundle_literal_expr)) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_80: UInt<2> + match child.io.opt_opt_unit: + HdlNone: + connect _cast_enum_to_bits_expr_80, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_80): + wire _cast_enum_to_bits_expr_81: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_80: + HdlNone: + connect _cast_enum_to_bits_expr_81, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_81): + connect _cast_enum_to_bits_expr_81, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_80, pad(cat(_cast_enum_to_bits_expr_81, UInt<1>(1)), 2) + connect child_out.opt_opt_unit, eq(_cast_enum_to_bits_expr_80, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_82: UInt<2> + match child.io.opt_opt_unit_flip: + HdlNone: + connect _cast_enum_to_bits_expr_82, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_82): + wire _cast_enum_to_bits_expr_83: UInt<1> + match _cast_enum_to_bits_expr_HdlSome_82: + HdlNone: + connect _cast_enum_to_bits_expr_83, UInt<1>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_83): + connect _cast_enum_to_bits_expr_83, pad(cat(UInt<0>(0), UInt<1>(1)), 1) + connect _cast_enum_to_bits_expr_82, pad(cat(_cast_enum_to_bits_expr_83, UInt<1>(1)), 2) + connect child_out.opt_opt_unit_flip, eq(_cast_enum_to_bits_expr_82, _cast_enum_to_bits_expr_8) @[module-XXXXXXXXXX.rs 15:1] + connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_84: UInt<2> + match child.io.array_opt_bool[0]: + HdlNone: + connect _cast_enum_to_bits_expr_84, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_84): + connect _cast_enum_to_bits_expr_84, pad(cat(_cast_enum_to_bits_expr_HdlSome_84, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_85: UInt<2> + match child.io.array_opt_bool[1]: + HdlNone: + connect _cast_enum_to_bits_expr_85, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_85): + connect _cast_enum_to_bits_expr_85, pad(cat(_cast_enum_to_bits_expr_HdlSome_85, UInt<1>(1)), 2) + wire _array_structural_eq_8: UInt<1> + connect _array_structural_eq_8, and(eq(_cast_enum_to_bits_expr_84, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_85, _cast_enum_to_bits_expr_15)) + connect child_out.array_opt_bool, _array_structural_eq_8 @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_86: UInt<2> + match child.io.array_opt_bool_flip[0]: + HdlNone: + connect _cast_enum_to_bits_expr_86, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_86): + connect _cast_enum_to_bits_expr_86, pad(cat(_cast_enum_to_bits_expr_HdlSome_86, UInt<1>(1)), 2) + wire _cast_enum_to_bits_expr_87: UInt<2> + match child.io.array_opt_bool_flip[1]: + HdlNone: + connect _cast_enum_to_bits_expr_87, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_87): + connect _cast_enum_to_bits_expr_87, pad(cat(_cast_enum_to_bits_expr_HdlSome_87, UInt<1>(1)), 2) + wire _array_structural_eq_9: UInt<1> + connect _array_structural_eq_9, and(eq(_cast_enum_to_bits_expr_86, _cast_enum_to_bits_expr_13), eq(_cast_enum_to_bits_expr_87, _cast_enum_to_bits_expr_15)) + connect child_out.array_opt_bool_flip, _array_structural_eq_9 @[module-XXXXXXXXXX.rs 16:1] + connect child.io.struct_opt_bool_flip, _bundle_literal_expr_1 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_88: UInt<2> + match child.io.struct_opt_bool.`0`: + HdlNone: + connect _cast_enum_to_bits_expr_88, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_88): + connect _cast_enum_to_bits_expr_88, pad(cat(_cast_enum_to_bits_expr_HdlSome_88, UInt<1>(1)), 2) + wire _bundle_structural_eq_8: UInt<1> + connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_88, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_1.`1`)) + connect child_out.struct_opt_bool, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_89: UInt<2> match child.io.struct_opt_bool_flip.`0`: HdlNone: - connect _cast_enum_to_bits_expr_48, UInt<2>(0) - HdlSome(_cast_enum_to_bits_expr_HdlSome_48): - connect _cast_enum_to_bits_expr_48, pad(cat(_cast_enum_to_bits_expr_HdlSome_48, UInt<1>(1)), 2) - wire _bundle_structural_eq_5: UInt<1> - connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_48, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) - connect child_out.struct_opt_bool_flip, _bundle_structural_eq_5 @[module-XXXXXXXXXX.rs 13:1] + connect _cast_enum_to_bits_expr_89, UInt<2>(0) + HdlSome(_cast_enum_to_bits_expr_HdlSome_89): + connect _cast_enum_to_bits_expr_89, pad(cat(_cast_enum_to_bits_expr_HdlSome_89, UInt<1>(1)), 2) + wire _bundle_structural_eq_9: UInt<1> + connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_89, _cast_enum_to_bits_expr_19), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_1.`1`)) + connect child_out.struct_opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 17:1] extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1] output io: Ty5 @[module-XXXXXXXXXX-2.rs 2:1] defname = check_deduce_structural_eq_flags_extern_child @@ -1059,12 +1934,18 @@ circuit check_deduce_structural_eq_flags_parent: type Ty5 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>} type Ty6 = {} type Ty7 = {tag: UInt<1>, body: UInt<0>} - type Ty8 = {io: Ty4} + type Ty8 = {tag: UInt<1>, body: UInt<1>} + type Ty9 = {`0`: UInt<2>, `1`: UInt<1>} + type Ty10 = {io: Ty4} module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1] input io: Ty4 @[module-XXXXXXXXXX.rs 2:1] - output parent_out: Ty5 @[module-XXXXXXXXXX.rs 3:1] - output extern_child_out: Ty5 @[module-XXXXXXXXXX.rs 4:1] - output child_out: Ty5 @[module-XXXXXXXXXX.rs 5:1] + input io_zeros: Ty4 @[module-XXXXXXXXXX.rs 3:1] + input io_alternating: Ty4 @[module-XXXXXXXXXX.rs 4:1] + output parent_out: Ty5 @[module-XXXXXXXXXX.rs 5:1] + output parent_zeros_out: Ty5 @[module-XXXXXXXXXX.rs 6:1] + output parent_alternating_out: Ty5 @[module-XXXXXXXXXX.rs 7:1] + output extern_child_out: Ty5 @[module-XXXXXXXXXX.rs 8:1] + output child_out: Ty5 @[module-XXXXXXXXXX.rs 9:1] wire __enum_structural_eq: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_1: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_2: UInt<1> @[module-XXXXXXXXXX.rs 1:1] @@ -1075,14 +1956,29 @@ circuit check_deduce_structural_eq_flags_parent: wire __enum_structural_eq_7: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_8: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_9: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 6:1] - inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 7:1] + wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_12: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_13: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_14: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_15: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_16: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_17: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_18: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_19: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_20: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_21: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_22: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_23: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_24: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1] + inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1] wire _bundle_literal_expr: Ty1 connect _bundle_literal_expr.tag, {|HdlNone, HdlSome|}(HdlSome) wire _bundle_literal_expr_1: Ty6 invalidate _bundle_literal_expr_1 connect _bundle_literal_expr.body, UInt<0>(0) - connect io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 9:1] + connect io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr: UInt<1> match io.opt_unit.tag: HdlNone: @@ -1097,7 +1993,7 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_1, UInt<1>(1) wire _bundle_structural_eq: UInt<1> connect _bundle_structural_eq, and(eq(_cast_enum_to_bits_expr, _cast_enum_to_bits_expr_1), eq(io.opt_unit.body, _bundle_literal_expr.body)) - connect parent_out.opt_unit, _bundle_structural_eq @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.opt_unit, _bundle_structural_eq @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_2: UInt<1> match io.opt_unit_flip.tag: HdlNone: @@ -1106,12 +2002,12 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_2, UInt<1>(1) wire _bundle_structural_eq_1: UInt<1> connect _bundle_structural_eq_1, and(eq(_cast_enum_to_bits_expr_2, _cast_enum_to_bits_expr_1), eq(io.opt_unit_flip.body, _bundle_literal_expr.body)) - connect parent_out.opt_unit_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.opt_unit_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 13:1] wire _bundle_literal_expr_2: Ty2 connect _bundle_literal_expr_2.tag, {|HdlNone, HdlSome|}(HdlSome) connect _bundle_literal_expr_2.body, UInt<1>(0h1) - connect io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 10:1] - connect parent_out.opt_bool, __enum_structural_eq @[module-XXXXXXXXXX.rs 10:1] + connect io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1] + connect parent_out.opt_bool, __enum_structural_eq @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_3: UInt<1> match io.opt_bool_flip.tag: HdlNone: @@ -1126,7 +2022,7 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_4, UInt<1>(1) wire _bundle_structural_eq_2: UInt<1> connect _bundle_structural_eq_2, and(eq(_cast_enum_to_bits_expr_3, _cast_enum_to_bits_expr_4), eq(io.opt_bool_flip.body, _bundle_literal_expr_2.body)) - connect parent_out.opt_bool_flip, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 10:1] + connect parent_out.opt_bool_flip, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 14:1] wire _bundle_literal_expr_3: Ty2 connect _bundle_literal_expr_3.tag, {|HdlNone, HdlSome|}(HdlSome) wire _cast_bundle_to_bits_expr: Ty7 @@ -1135,8 +2031,8 @@ circuit check_deduce_structural_eq_flags_parent: wire _cast_to_bits_expr: UInt<1> connect _cast_to_bits_expr, cat(_cast_bundle_to_bits_expr.body, _cast_bundle_to_bits_expr.tag) connect _bundle_literal_expr_3.body, _cast_to_bits_expr - connect io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 11:1] - connect parent_out.opt_opt_unit, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 11:1] + connect io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1] + connect parent_out.opt_opt_unit, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_5: UInt<1> match io.opt_opt_unit_flip.tag: HdlNone: @@ -1151,15 +2047,15 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_6, UInt<1>(1) wire _bundle_structural_eq_3: UInt<1> connect _bundle_structural_eq_3, and(eq(_cast_enum_to_bits_expr_5, _cast_enum_to_bits_expr_6), eq(io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) - connect parent_out.opt_opt_unit_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_opt_unit_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 15:1] wire _array_literal_expr: Ty2[2] wire _bundle_literal_expr_4: Ty2 connect _bundle_literal_expr_4.tag, {|HdlNone, HdlSome|}(HdlSome) connect _bundle_literal_expr_4.body, UInt<1>(0h0) connect _array_literal_expr[0], _bundle_literal_expr_4 connect _array_literal_expr[1], _bundle_literal_expr_2 - connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect parent_out.array_opt_bool, and(__enum_structural_eq_2, __enum_structural_eq_3) @[module-XXXXXXXXXX.rs 12:1] + connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect parent_out.array_opt_bool, and(__enum_structural_eq_2, __enum_structural_eq_3) @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_7: UInt<1> match io.array_opt_bool_flip[0].tag: HdlNone: @@ -1188,12 +2084,12 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_10, UInt<1>(1) wire _bundle_structural_eq_5: UInt<1> connect _bundle_structural_eq_5, and(eq(_cast_enum_to_bits_expr_9, _cast_enum_to_bits_expr_10), eq(io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) - connect parent_out.array_opt_bool_flip, and(_bundle_structural_eq_4, _bundle_structural_eq_5) @[module-XXXXXXXXXX.rs 12:1] + connect parent_out.array_opt_bool_flip, and(_bundle_structural_eq_4, _bundle_structural_eq_5) @[module-XXXXXXXXXX.rs 16:1] wire _bundle_literal_expr_5: Ty3 connect _bundle_literal_expr_5.`0`, _bundle_literal_expr_2 connect _bundle_literal_expr_5.`1`, UInt<1>(0h1) - connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect parent_out.struct_opt_bool, and(__enum_structural_eq_4, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect parent_out.struct_opt_bool, and(__enum_structural_eq_4, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_11: UInt<1> match io.struct_opt_bool_flip.`0`.tag: HdlNone: @@ -1208,411 +2104,1023 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_enum_to_bits_expr_12, UInt<1>(1) wire _bundle_structural_eq_6: UInt<1> connect _bundle_structural_eq_6, and(eq(_cast_enum_to_bits_expr_11, _cast_enum_to_bits_expr_12), eq(io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect parent_out.struct_opt_bool_flip, and(_bundle_structural_eq_6, eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect extern_child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.struct_opt_bool_flip, and(_bundle_structural_eq_6, eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + wire _cast_bits_to_bundle_expr: Ty1 + wire _cast_bits_to_bundle_expr_flattened: Ty7 + connect _cast_bits_to_bundle_expr_flattened.tag, bits(UInt<1>(0h0), 0, 0) + wire _cast_bits_to_enum_expr: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.tag, 0)): + connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr.tag, _cast_bits_to_enum_expr + connect _cast_bits_to_bundle_expr_flattened.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr.body, _cast_bits_to_bundle_expr_flattened.body + connect io_zeros.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_13: UInt<1> - match extern_child.io.opt_unit.tag: + match io_zeros.opt_unit.tag: HdlNone: connect _cast_enum_to_bits_expr_13, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_13, UInt<1>(1) - wire _bundle_structural_eq_7: UInt<1> - connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_13, _cast_enum_to_bits_expr_1), eq(extern_child.io.opt_unit.body, _bundle_literal_expr.body)) - connect extern_child_out.opt_unit, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 9:1] wire _cast_enum_to_bits_expr_14: UInt<1> - match extern_child.io.opt_unit_flip.tag: + match _cast_bits_to_bundle_expr.tag: HdlNone: connect _cast_enum_to_bits_expr_14, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_14, UInt<1>(1) - wire _bundle_structural_eq_8: UInt<1> - connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_14, _cast_enum_to_bits_expr_1), eq(extern_child.io.opt_unit_flip.body, _bundle_literal_expr.body)) - connect extern_child_out.opt_unit_flip, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 9:1] - connect extern_child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 10:1] - connect extern_child_out.opt_bool, __enum_structural_eq_5 @[module-XXXXXXXXXX.rs 10:1] + wire _bundle_structural_eq_7: UInt<1> + connect _bundle_structural_eq_7, and(eq(_cast_enum_to_bits_expr_13, _cast_enum_to_bits_expr_14), eq(io_zeros.opt_unit.body, _cast_bits_to_bundle_expr.body)) + connect parent_zeros_out.opt_unit, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_15: UInt<1> - match extern_child.io.opt_bool_flip.tag: + match io_zeros.opt_unit_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_15, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_15, UInt<1>(1) - wire _bundle_structural_eq_9: UInt<1> - connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_15, _cast_enum_to_bits_expr_4), eq(extern_child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) - connect extern_child_out.opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 10:1] - connect extern_child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 11:1] - connect extern_child_out.opt_opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 11:1] + wire _bundle_structural_eq_8: UInt<1> + connect _bundle_structural_eq_8, and(eq(_cast_enum_to_bits_expr_15, _cast_enum_to_bits_expr_14), eq(io_zeros.opt_unit_flip.body, _cast_bits_to_bundle_expr.body)) + connect parent_zeros_out.opt_unit_flip, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_bundle_expr_1: Ty2 + wire _cast_bits_to_bundle_expr_flattened_1: Ty8 + connect _cast_bits_to_bundle_expr_flattened_1.tag, bits(UInt<2>(0h0), 0, 0) + wire _cast_bits_to_enum_expr_1: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.tag, 0)): + connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_1.tag, _cast_bits_to_enum_expr_1 + connect _cast_bits_to_bundle_expr_flattened_1.body, bits(UInt<2>(0h0), 1, 1) + connect _cast_bits_to_bundle_expr_1.body, _cast_bits_to_bundle_expr_flattened_1.body + connect io_zeros.opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 14:1] + connect parent_zeros_out.opt_bool, __enum_structural_eq_5 @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_16: UInt<1> - match extern_child.io.opt_opt_unit_flip.tag: + match io_zeros.opt_bool_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_16, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_16, UInt<1>(1) - wire _bundle_structural_eq_10: UInt<1> - connect _bundle_structural_eq_10, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_6), eq(extern_child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) - connect extern_child_out.opt_opt_unit_flip, _bundle_structural_eq_10 @[module-XXXXXXXXXX.rs 11:1] - connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect extern_child_out.array_opt_bool, and(__enum_structural_eq_7, __enum_structural_eq_8) @[module-XXXXXXXXXX.rs 12:1] wire _cast_enum_to_bits_expr_17: UInt<1> - match extern_child.io.array_opt_bool_flip[0].tag: + match _cast_bits_to_bundle_expr_1.tag: HdlNone: connect _cast_enum_to_bits_expr_17, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_17, UInt<1>(1) - wire _bundle_structural_eq_11: UInt<1> - connect _bundle_structural_eq_11, and(eq(_cast_enum_to_bits_expr_17, _cast_enum_to_bits_expr_8), eq(extern_child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) + wire _bundle_structural_eq_9: UInt<1> + connect _bundle_structural_eq_9, and(eq(_cast_enum_to_bits_expr_16, _cast_enum_to_bits_expr_17), eq(io_zeros.opt_bool_flip.body, _cast_bits_to_bundle_expr_1.body)) + connect parent_zeros_out.opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 14:1] + connect io_zeros.opt_opt_unit_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 15:1] + connect parent_zeros_out.opt_opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_18: UInt<1> - match extern_child.io.array_opt_bool_flip[1].tag: + match io_zeros.opt_opt_unit_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_18, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_18, UInt<1>(1) - wire _bundle_structural_eq_12: UInt<1> - connect _bundle_structural_eq_12, and(eq(_cast_enum_to_bits_expr_18, _cast_enum_to_bits_expr_10), eq(extern_child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) - connect extern_child_out.array_opt_bool_flip, and(_bundle_structural_eq_11, _bundle_structural_eq_12) @[module-XXXXXXXXXX.rs 12:1] - connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_9, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + wire _bundle_structural_eq_10: UInt<1> + connect _bundle_structural_eq_10, and(eq(_cast_enum_to_bits_expr_18, _cast_enum_to_bits_expr_17), eq(io_zeros.opt_opt_unit_flip.body, _cast_bits_to_bundle_expr_1.body)) + connect parent_zeros_out.opt_opt_unit_flip, _bundle_structural_eq_10 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr: Ty2[2] + wire _cast_bits_to_array_expr_flattened: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0) + wire _cast_bits_to_bundle_expr_2: Ty2 + wire _cast_bits_to_bundle_expr_flattened_2: Ty8 + connect _cast_bits_to_bundle_expr_flattened_2.tag, bits(_cast_bits_to_array_expr_flattened[0], 0, 0) + wire _cast_bits_to_enum_expr_2: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_2.tag, 0)): + connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_2.tag, _cast_bits_to_enum_expr_2 + connect _cast_bits_to_bundle_expr_flattened_2.body, bits(_cast_bits_to_array_expr_flattened[0], 1, 1) + connect _cast_bits_to_bundle_expr_2.body, _cast_bits_to_bundle_expr_flattened_2.body + connect _cast_bits_to_array_expr[0], _cast_bits_to_bundle_expr_2 + connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2) + wire _cast_bits_to_bundle_expr_3: Ty2 + wire _cast_bits_to_bundle_expr_flattened_3: Ty8 + connect _cast_bits_to_bundle_expr_flattened_3.tag, bits(_cast_bits_to_array_expr_flattened[1], 0, 0) + wire _cast_bits_to_enum_expr_3: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_3.tag, 0)): + connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_3.tag, _cast_bits_to_enum_expr_3 + connect _cast_bits_to_bundle_expr_flattened_3.body, bits(_cast_bits_to_array_expr_flattened[1], 1, 1) + connect _cast_bits_to_bundle_expr_3.body, _cast_bits_to_bundle_expr_flattened_3.body + connect _cast_bits_to_array_expr[1], _cast_bits_to_bundle_expr_3 + connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1] + connect parent_zeros_out.array_opt_bool, and(__enum_structural_eq_7, __enum_structural_eq_8) @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_19: UInt<1> - match extern_child.io.struct_opt_bool_flip.`0`.tag: + match io_zeros.array_opt_bool_flip[0].tag: HdlNone: connect _cast_enum_to_bits_expr_19, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_19, UInt<1>(1) - wire _bundle_structural_eq_13: UInt<1> - connect _bundle_structural_eq_13, and(eq(_cast_enum_to_bits_expr_19, _cast_enum_to_bits_expr_12), eq(extern_child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect extern_child_out.struct_opt_bool_flip, and(_bundle_structural_eq_13, eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 9:1] wire _cast_enum_to_bits_expr_20: UInt<1> - match child.io.opt_unit.tag: + match _cast_bits_to_array_expr[0].tag: HdlNone: connect _cast_enum_to_bits_expr_20, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_20, UInt<1>(1) - wire _bundle_structural_eq_14: UInt<1> - connect _bundle_structural_eq_14, and(eq(_cast_enum_to_bits_expr_20, _cast_enum_to_bits_expr_1), eq(child.io.opt_unit.body, _bundle_literal_expr.body)) - connect child_out.opt_unit, _bundle_structural_eq_14 @[module-XXXXXXXXXX.rs 9:1] + wire _bundle_structural_eq_11: UInt<1> + connect _bundle_structural_eq_11, and(eq(_cast_enum_to_bits_expr_19, _cast_enum_to_bits_expr_20), eq(io_zeros.array_opt_bool_flip[0].body, _cast_bits_to_array_expr[0].body)) wire _cast_enum_to_bits_expr_21: UInt<1> - match child.io.opt_unit_flip.tag: + match io_zeros.array_opt_bool_flip[1].tag: HdlNone: connect _cast_enum_to_bits_expr_21, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_21, UInt<1>(1) - wire _bundle_structural_eq_15: UInt<1> - connect _bundle_structural_eq_15, and(eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_1), eq(child.io.opt_unit_flip.body, _bundle_literal_expr.body)) - connect child_out.opt_unit_flip, _bundle_structural_eq_15 @[module-XXXXXXXXXX.rs 9:1] - connect child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 10:1] wire _cast_enum_to_bits_expr_22: UInt<1> - match child.io.opt_bool.tag: + match _cast_bits_to_array_expr[1].tag: HdlNone: connect _cast_enum_to_bits_expr_22, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_22, UInt<1>(1) - wire _bundle_structural_eq_16: UInt<1> - connect _bundle_structural_eq_16, and(eq(_cast_enum_to_bits_expr_22, _cast_enum_to_bits_expr_4), eq(child.io.opt_bool.body, _bundle_literal_expr_2.body)) - connect child_out.opt_bool, _bundle_structural_eq_16 @[module-XXXXXXXXXX.rs 10:1] + wire _bundle_structural_eq_12: UInt<1> + connect _bundle_structural_eq_12, and(eq(_cast_enum_to_bits_expr_21, _cast_enum_to_bits_expr_22), eq(io_zeros.array_opt_bool_flip[1].body, _cast_bits_to_array_expr[1].body)) + connect parent_zeros_out.array_opt_bool_flip, and(_bundle_structural_eq_11, _bundle_structural_eq_12) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_4: Ty3 + wire _cast_bits_to_bundle_expr_flattened_4: Ty9 + connect _cast_bits_to_bundle_expr_flattened_4.`0`, bits(UInt<3>(0h0), 1, 0) + wire _cast_bits_to_bundle_expr_5: Ty2 + wire _cast_bits_to_bundle_expr_flattened_5: Ty8 + connect _cast_bits_to_bundle_expr_flattened_5.tag, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 0, 0) + wire _cast_bits_to_enum_expr_4: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_5.tag, 0)): + connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_4, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_5.tag, _cast_bits_to_enum_expr_4 + connect _cast_bits_to_bundle_expr_flattened_5.body, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 1, 1) + connect _cast_bits_to_bundle_expr_5.body, _cast_bits_to_bundle_expr_flattened_5.body + connect _cast_bits_to_bundle_expr_4.`0`, _cast_bits_to_bundle_expr_5 + connect _cast_bits_to_bundle_expr_flattened_4.`1`, bits(UInt<3>(0h0), 2, 2) + connect _cast_bits_to_bundle_expr_4.`1`, _cast_bits_to_bundle_expr_flattened_4.`1` + connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_4 @[module-XXXXXXXXXX.rs 17:1] + connect parent_zeros_out.struct_opt_bool, and(__enum_structural_eq_9, eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1] wire _cast_enum_to_bits_expr_23: UInt<1> - match child.io.opt_bool_flip.tag: + match io_zeros.struct_opt_bool_flip.`0`.tag: HdlNone: connect _cast_enum_to_bits_expr_23, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_23, UInt<1>(1) - wire _bundle_structural_eq_17: UInt<1> - connect _bundle_structural_eq_17, and(eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_4), eq(child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) - connect child_out.opt_bool_flip, _bundle_structural_eq_17 @[module-XXXXXXXXXX.rs 10:1] - connect child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 11:1] wire _cast_enum_to_bits_expr_24: UInt<1> - match child.io.opt_opt_unit.tag: + match _cast_bits_to_bundle_expr_4.`0`.tag: HdlNone: connect _cast_enum_to_bits_expr_24, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_24, UInt<1>(1) - wire _bundle_structural_eq_18: UInt<1> - connect _bundle_structural_eq_18, and(eq(_cast_enum_to_bits_expr_24, _cast_enum_to_bits_expr_6), eq(child.io.opt_opt_unit.body, _bundle_literal_expr_3.body)) - connect child_out.opt_opt_unit, _bundle_structural_eq_18 @[module-XXXXXXXXXX.rs 11:1] + wire _bundle_structural_eq_13: UInt<1> + connect _bundle_structural_eq_13, and(eq(_cast_enum_to_bits_expr_23, _cast_enum_to_bits_expr_24), eq(io_zeros.struct_opt_bool_flip.`0`.body, _cast_bits_to_bundle_expr_4.`0`.body)) + connect parent_zeros_out.struct_opt_bool_flip, and(_bundle_structural_eq_13, eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect io_alternating.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_25: UInt<1> - match child.io.opt_opt_unit_flip.tag: + match io_alternating.opt_unit.tag: HdlNone: connect _cast_enum_to_bits_expr_25, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_25, UInt<1>(1) - wire _bundle_structural_eq_19: UInt<1> - connect _bundle_structural_eq_19, and(eq(_cast_enum_to_bits_expr_25, _cast_enum_to_bits_expr_6), eq(child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) - connect child_out.opt_opt_unit_flip, _bundle_structural_eq_19 @[module-XXXXXXXXXX.rs 11:1] - connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] + wire _bundle_structural_eq_14: UInt<1> + connect _bundle_structural_eq_14, and(eq(_cast_enum_to_bits_expr_25, _cast_enum_to_bits_expr_14), eq(io_alternating.opt_unit.body, _cast_bits_to_bundle_expr.body)) + connect parent_alternating_out.opt_unit, _bundle_structural_eq_14 @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_26: UInt<1> - match child.io.array_opt_bool[0].tag: + match io_alternating.opt_unit_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_26, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_26, UInt<1>(1) - wire _bundle_structural_eq_20: UInt<1> - connect _bundle_structural_eq_20, and(eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_8), eq(child.io.array_opt_bool[0].body, _array_literal_expr[0].body)) + wire _bundle_structural_eq_15: UInt<1> + connect _bundle_structural_eq_15, and(eq(_cast_enum_to_bits_expr_26, _cast_enum_to_bits_expr_14), eq(io_alternating.opt_unit_flip.body, _cast_bits_to_bundle_expr.body)) + connect parent_alternating_out.opt_unit_flip, _bundle_structural_eq_15 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_bundle_expr_6: Ty2 + wire _cast_bits_to_bundle_expr_flattened_6: Ty8 + connect _cast_bits_to_bundle_expr_flattened_6.tag, bits(UInt<2>(0h2), 0, 0) + wire _cast_bits_to_enum_expr_5: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_6.tag, 0)): + connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_5, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_6.tag, _cast_bits_to_enum_expr_5 + connect _cast_bits_to_bundle_expr_flattened_6.body, bits(UInt<2>(0h2), 1, 1) + connect _cast_bits_to_bundle_expr_6.body, _cast_bits_to_bundle_expr_flattened_6.body + connect io_alternating.opt_bool_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 14:1] + connect parent_alternating_out.opt_bool, __enum_structural_eq_10 @[module-XXXXXXXXXX.rs 14:1] + connect parent_alternating_out.opt_bool_flip, __enum_structural_eq_11 @[module-XXXXXXXXXX.rs 14:1] + connect io_alternating.opt_opt_unit_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 15:1] + connect parent_alternating_out.opt_opt_unit, __enum_structural_eq_12 @[module-XXXXXXXXXX.rs 15:1] + connect parent_alternating_out.opt_opt_unit_flip, __enum_structural_eq_13 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr_1: Ty2[2] + wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0) + wire _cast_bits_to_bundle_expr_7: Ty2 + wire _cast_bits_to_bundle_expr_flattened_7: Ty8 + connect _cast_bits_to_bundle_expr_flattened_7.tag, bits(_cast_bits_to_array_expr_flattened_1[0], 0, 0) + wire _cast_bits_to_enum_expr_6: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_7.tag, 0)): + connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_6, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_7.tag, _cast_bits_to_enum_expr_6 + connect _cast_bits_to_bundle_expr_flattened_7.body, bits(_cast_bits_to_array_expr_flattened_1[0], 1, 1) + connect _cast_bits_to_bundle_expr_7.body, _cast_bits_to_bundle_expr_flattened_7.body + connect _cast_bits_to_array_expr_1[0], _cast_bits_to_bundle_expr_7 + connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2) + wire _cast_bits_to_bundle_expr_8: Ty2 + wire _cast_bits_to_bundle_expr_flattened_8: Ty8 + connect _cast_bits_to_bundle_expr_flattened_8.tag, bits(_cast_bits_to_array_expr_flattened_1[1], 0, 0) + wire _cast_bits_to_enum_expr_7: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_8.tag, 0)): + connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_7, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_8.tag, _cast_bits_to_enum_expr_7 + connect _cast_bits_to_bundle_expr_flattened_8.body, bits(_cast_bits_to_array_expr_flattened_1[1], 1, 1) + connect _cast_bits_to_bundle_expr_8.body, _cast_bits_to_bundle_expr_flattened_8.body + connect _cast_bits_to_array_expr_1[1], _cast_bits_to_bundle_expr_8 + connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1] + connect parent_alternating_out.array_opt_bool, and(__enum_structural_eq_14, __enum_structural_eq_15) @[module-XXXXXXXXXX.rs 16:1] + connect parent_alternating_out.array_opt_bool_flip, and(__enum_structural_eq_16, __enum_structural_eq_17) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_9: Ty3 + wire _cast_bits_to_bundle_expr_flattened_9: Ty9 + connect _cast_bits_to_bundle_expr_flattened_9.`0`, bits(UInt<3>(0h2), 1, 0) + wire _cast_bits_to_bundle_expr_10: Ty2 + wire _cast_bits_to_bundle_expr_flattened_10: Ty8 + connect _cast_bits_to_bundle_expr_flattened_10.tag, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 0, 0) + wire _cast_bits_to_enum_expr_8: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_10.tag, 0)): + connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_8, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_10.tag, _cast_bits_to_enum_expr_8 + connect _cast_bits_to_bundle_expr_flattened_10.body, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 1, 1) + connect _cast_bits_to_bundle_expr_10.body, _cast_bits_to_bundle_expr_flattened_10.body + connect _cast_bits_to_bundle_expr_9.`0`, _cast_bits_to_bundle_expr_10 + connect _cast_bits_to_bundle_expr_flattened_9.`1`, bits(UInt<3>(0h2), 2, 2) + connect _cast_bits_to_bundle_expr_9.`1`, _cast_bits_to_bundle_expr_flattened_9.`1` + connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_9 @[module-XXXXXXXXXX.rs 17:1] + connect parent_alternating_out.struct_opt_bool, and(__enum_structural_eq_18, eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect parent_alternating_out.struct_opt_bool_flip, and(__enum_structural_eq_19, eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect extern_child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_27: UInt<1> - match child.io.array_opt_bool[1].tag: + match extern_child.io.opt_unit.tag: HdlNone: connect _cast_enum_to_bits_expr_27, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_27, UInt<1>(1) - wire _bundle_structural_eq_21: UInt<1> - connect _bundle_structural_eq_21, and(eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_10), eq(child.io.array_opt_bool[1].body, _array_literal_expr[1].body)) - connect child_out.array_opt_bool, and(_bundle_structural_eq_20, _bundle_structural_eq_21) @[module-XXXXXXXXXX.rs 12:1] + wire _bundle_structural_eq_16: UInt<1> + connect _bundle_structural_eq_16, and(eq(_cast_enum_to_bits_expr_27, _cast_enum_to_bits_expr_1), eq(extern_child.io.opt_unit.body, _bundle_literal_expr.body)) + connect extern_child_out.opt_unit, _bundle_structural_eq_16 @[module-XXXXXXXXXX.rs 13:1] wire _cast_enum_to_bits_expr_28: UInt<1> - match child.io.array_opt_bool_flip[0].tag: + match extern_child.io.opt_unit_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_28, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_28, UInt<1>(1) - wire _bundle_structural_eq_22: UInt<1> - connect _bundle_structural_eq_22, and(eq(_cast_enum_to_bits_expr_28, _cast_enum_to_bits_expr_8), eq(child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) + wire _bundle_structural_eq_17: UInt<1> + connect _bundle_structural_eq_17, and(eq(_cast_enum_to_bits_expr_28, _cast_enum_to_bits_expr_1), eq(extern_child.io.opt_unit_flip.body, _bundle_literal_expr.body)) + connect extern_child_out.opt_unit_flip, _bundle_structural_eq_17 @[module-XXXXXXXXXX.rs 13:1] + connect extern_child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1] + connect extern_child_out.opt_bool, __enum_structural_eq_20 @[module-XXXXXXXXXX.rs 14:1] wire _cast_enum_to_bits_expr_29: UInt<1> - match child.io.array_opt_bool_flip[1].tag: + match extern_child.io.opt_bool_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_29, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_29, UInt<1>(1) - wire _bundle_structural_eq_23: UInt<1> - connect _bundle_structural_eq_23, and(eq(_cast_enum_to_bits_expr_29, _cast_enum_to_bits_expr_10), eq(child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) - connect child_out.array_opt_bool_flip, and(_bundle_structural_eq_22, _bundle_structural_eq_23) @[module-XXXXXXXXXX.rs 12:1] - connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] + wire _bundle_structural_eq_18: UInt<1> + connect _bundle_structural_eq_18, and(eq(_cast_enum_to_bits_expr_29, _cast_enum_to_bits_expr_4), eq(extern_child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) + connect extern_child_out.opt_bool_flip, _bundle_structural_eq_18 @[module-XXXXXXXXXX.rs 14:1] + connect extern_child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1] + connect extern_child_out.opt_opt_unit, __enum_structural_eq_21 @[module-XXXXXXXXXX.rs 15:1] wire _cast_enum_to_bits_expr_30: UInt<1> - match child.io.struct_opt_bool.`0`.tag: + match extern_child.io.opt_opt_unit_flip.tag: HdlNone: connect _cast_enum_to_bits_expr_30, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_30, UInt<1>(1) - wire _bundle_structural_eq_24: UInt<1> - connect _bundle_structural_eq_24, and(eq(_cast_enum_to_bits_expr_30, _cast_enum_to_bits_expr_12), eq(child.io.struct_opt_bool.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect child_out.struct_opt_bool, and(_bundle_structural_eq_24, eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + wire _bundle_structural_eq_19: UInt<1> + connect _bundle_structural_eq_19, and(eq(_cast_enum_to_bits_expr_30, _cast_enum_to_bits_expr_6), eq(extern_child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) + connect extern_child_out.opt_opt_unit_flip, _bundle_structural_eq_19 @[module-XXXXXXXXXX.rs 15:1] + connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect extern_child_out.array_opt_bool, and(__enum_structural_eq_22, __enum_structural_eq_23) @[module-XXXXXXXXXX.rs 16:1] wire _cast_enum_to_bits_expr_31: UInt<1> - match child.io.struct_opt_bool_flip.`0`.tag: + match extern_child.io.array_opt_bool_flip[0].tag: HdlNone: connect _cast_enum_to_bits_expr_31, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_31, UInt<1>(1) - wire _bundle_structural_eq_25: UInt<1> - connect _bundle_structural_eq_25, and(eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_12), eq(child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect child_out.struct_opt_bool_flip, and(_bundle_structural_eq_25, eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _bundle_structural_eq_20: UInt<1> + connect _bundle_structural_eq_20, and(eq(_cast_enum_to_bits_expr_31, _cast_enum_to_bits_expr_8), eq(extern_child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) wire _cast_enum_to_bits_expr_32: UInt<1> - match io.opt_bool.tag: + match extern_child.io.array_opt_bool_flip[1].tag: HdlNone: connect _cast_enum_to_bits_expr_32, UInt<1>(0) HdlSome: connect _cast_enum_to_bits_expr_32, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_32, _cast_enum_to_bits_expr_4): @[module-XXXXXXXXXX.rs 1:1] + wire _bundle_structural_eq_21: UInt<1> + connect _bundle_structural_eq_21, and(eq(_cast_enum_to_bits_expr_32, _cast_enum_to_bits_expr_10), eq(extern_child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) + connect extern_child_out.array_opt_bool_flip, and(_bundle_structural_eq_20, _bundle_structural_eq_21) @[module-XXXXXXXXXX.rs 16:1] + connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_24, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_33: UInt<1> + match extern_child.io.struct_opt_bool_flip.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_33, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_33, UInt<1>(1) + wire _bundle_structural_eq_22: UInt<1> + connect _bundle_structural_eq_22, and(eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_12), eq(extern_child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) + connect extern_child_out.struct_opt_bool_flip, and(_bundle_structural_eq_22, eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_34: UInt<1> + match child.io.opt_unit.tag: + HdlNone: + connect _cast_enum_to_bits_expr_34, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_34, UInt<1>(1) + wire _bundle_structural_eq_23: UInt<1> + connect _bundle_structural_eq_23, and(eq(_cast_enum_to_bits_expr_34, _cast_enum_to_bits_expr_1), eq(child.io.opt_unit.body, _bundle_literal_expr.body)) + connect child_out.opt_unit, _bundle_structural_eq_23 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_enum_to_bits_expr_35: UInt<1> + match child.io.opt_unit_flip.tag: + HdlNone: + connect _cast_enum_to_bits_expr_35, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_35, UInt<1>(1) + wire _bundle_structural_eq_24: UInt<1> + connect _bundle_structural_eq_24, and(eq(_cast_enum_to_bits_expr_35, _cast_enum_to_bits_expr_1), eq(child.io.opt_unit_flip.body, _bundle_literal_expr.body)) + connect child_out.opt_unit_flip, _bundle_structural_eq_24 @[module-XXXXXXXXXX.rs 13:1] + connect child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_36: UInt<1> + match child.io.opt_bool.tag: + HdlNone: + connect _cast_enum_to_bits_expr_36, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_36, UInt<1>(1) + wire _bundle_structural_eq_25: UInt<1> + connect _bundle_structural_eq_25, and(eq(_cast_enum_to_bits_expr_36, _cast_enum_to_bits_expr_4), eq(child.io.opt_bool.body, _bundle_literal_expr_2.body)) + connect child_out.opt_bool, _bundle_structural_eq_25 @[module-XXXXXXXXXX.rs 14:1] + wire _cast_enum_to_bits_expr_37: UInt<1> + match child.io.opt_bool_flip.tag: + HdlNone: + connect _cast_enum_to_bits_expr_37, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_37, UInt<1>(1) + wire _bundle_structural_eq_26: UInt<1> + connect _bundle_structural_eq_26, and(eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_4), eq(child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) + connect child_out.opt_bool_flip, _bundle_structural_eq_26 @[module-XXXXXXXXXX.rs 14:1] + connect child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_38: UInt<1> + match child.io.opt_opt_unit.tag: + HdlNone: + connect _cast_enum_to_bits_expr_38, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_38, UInt<1>(1) + wire _bundle_structural_eq_27: UInt<1> + connect _bundle_structural_eq_27, and(eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_6), eq(child.io.opt_opt_unit.body, _bundle_literal_expr_3.body)) + connect child_out.opt_opt_unit, _bundle_structural_eq_27 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_enum_to_bits_expr_39: UInt<1> + match child.io.opt_opt_unit_flip.tag: + HdlNone: + connect _cast_enum_to_bits_expr_39, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_39, UInt<1>(1) + wire _bundle_structural_eq_28: UInt<1> + connect _bundle_structural_eq_28, and(eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_6), eq(child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) + connect child_out.opt_opt_unit_flip, _bundle_structural_eq_28 @[module-XXXXXXXXXX.rs 15:1] + connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_40: UInt<1> + match child.io.array_opt_bool[0].tag: + HdlNone: + connect _cast_enum_to_bits_expr_40, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_40, UInt<1>(1) + wire _bundle_structural_eq_29: UInt<1> + connect _bundle_structural_eq_29, and(eq(_cast_enum_to_bits_expr_40, _cast_enum_to_bits_expr_8), eq(child.io.array_opt_bool[0].body, _array_literal_expr[0].body)) + wire _cast_enum_to_bits_expr_41: UInt<1> + match child.io.array_opt_bool[1].tag: + HdlNone: + connect _cast_enum_to_bits_expr_41, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_41, UInt<1>(1) + wire _bundle_structural_eq_30: UInt<1> + connect _bundle_structural_eq_30, and(eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_10), eq(child.io.array_opt_bool[1].body, _array_literal_expr[1].body)) + connect child_out.array_opt_bool, and(_bundle_structural_eq_29, _bundle_structural_eq_30) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_enum_to_bits_expr_42: UInt<1> + match child.io.array_opt_bool_flip[0].tag: + HdlNone: + connect _cast_enum_to_bits_expr_42, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_42, UInt<1>(1) + wire _bundle_structural_eq_31: UInt<1> + connect _bundle_structural_eq_31, and(eq(_cast_enum_to_bits_expr_42, _cast_enum_to_bits_expr_8), eq(child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) + wire _cast_enum_to_bits_expr_43: UInt<1> + match child.io.array_opt_bool_flip[1].tag: + HdlNone: + connect _cast_enum_to_bits_expr_43, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_43, UInt<1>(1) + wire _bundle_structural_eq_32: UInt<1> + connect _bundle_structural_eq_32, and(eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_10), eq(child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) + connect child_out.array_opt_bool_flip, and(_bundle_structural_eq_31, _bundle_structural_eq_32) @[module-XXXXXXXXXX.rs 16:1] + connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_44: UInt<1> + match child.io.struct_opt_bool.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_44, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_44, UInt<1>(1) + wire _bundle_structural_eq_33: UInt<1> + connect _bundle_structural_eq_33, and(eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_12), eq(child.io.struct_opt_bool.`0`.body, _bundle_literal_expr_5.`0`.body)) + connect child_out.struct_opt_bool, and(_bundle_structural_eq_33, eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + wire _cast_enum_to_bits_expr_45: UInt<1> + match child.io.struct_opt_bool_flip.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_45, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_45, UInt<1>(1) + wire _bundle_structural_eq_34: UInt<1> + connect _bundle_structural_eq_34, and(eq(_cast_enum_to_bits_expr_45, _cast_enum_to_bits_expr_12), eq(child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) + connect child_out.struct_opt_bool_flip, and(_bundle_structural_eq_34, eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_46: UInt<1> + match io.opt_bool.tag: + HdlNone: + connect _cast_enum_to_bits_expr_46, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_46, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_46, _cast_enum_to_bits_expr_4): @[module-XXXXXXXXXX.rs 1:1] match io.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: connect __enum_structural_eq, eq(bits(io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_1, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_33: UInt<1> + wire _cast_enum_to_bits_expr_47: UInt<1> match io.opt_opt_unit.tag: HdlNone: - connect _cast_enum_to_bits_expr_33, UInt<1>(0) + connect _cast_enum_to_bits_expr_47, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_33, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_33, _cast_enum_to_bits_expr_6): @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_47, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_47, _cast_enum_to_bits_expr_6): @[module-XXXXXXXXXX.rs 1:1] match io.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_1, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_1, __enum_structural_eq_10 @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_bits_to_bundle_expr: Ty1 - wire _cast_bits_to_bundle_expr_flattened: Ty7 - connect _cast_bits_to_bundle_expr_flattened.tag, bits(bits(io.opt_opt_unit.body, 0, 0), 0, 0) - wire _cast_bits_to_enum_expr: Ty0 - when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened.tag, 0)): - connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome|}(HdlNone) + wire __enum_structural_eq_25: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_1, __enum_structural_eq_25 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_25, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_11: Ty1 + wire _cast_bits_to_bundle_expr_flattened_11: Ty7 + connect _cast_bits_to_bundle_expr_flattened_11.tag, bits(bits(io.opt_opt_unit.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_9: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_11.tag, 0)): + connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome|}(HdlNone) else: - connect _cast_bits_to_enum_expr, {|HdlNone, HdlSome|}(HdlSome) - connect _cast_bits_to_bundle_expr.tag, _cast_bits_to_enum_expr - connect _cast_bits_to_bundle_expr_flattened.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr.body, _cast_bits_to_bundle_expr_flattened.body - wire _cast_bits_to_bundle_expr_1: Ty1 - wire _cast_bits_to_bundle_expr_flattened_1: Ty7 - connect _cast_bits_to_bundle_expr_flattened_1.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) - wire _cast_bits_to_enum_expr_1: Ty0 - when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_1.tag, 0)): - connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome|}(HdlNone) + connect _cast_bits_to_enum_expr_9, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_11.tag, _cast_bits_to_enum_expr_9 + connect _cast_bits_to_bundle_expr_flattened_11.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_11.body, _cast_bits_to_bundle_expr_flattened_11.body + wire _cast_bits_to_bundle_expr_12: Ty1 + wire _cast_bits_to_bundle_expr_flattened_12: Ty7 + connect _cast_bits_to_bundle_expr_flattened_12.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_10: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_12.tag, 0)): + connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome|}(HdlNone) else: - connect _cast_bits_to_enum_expr_1, {|HdlNone, HdlSome|}(HdlSome) - connect _cast_bits_to_bundle_expr_1.tag, _cast_bits_to_enum_expr_1 - connect _cast_bits_to_bundle_expr_flattened_1.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr_1.body, _cast_bits_to_bundle_expr_flattened_1.body - wire _cast_enum_to_bits_expr_34: UInt<1> - match _cast_bits_to_bundle_expr.tag: + connect _cast_bits_to_enum_expr_10, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_12.tag, _cast_bits_to_enum_expr_10 + connect _cast_bits_to_bundle_expr_flattened_12.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_12.body, _cast_bits_to_bundle_expr_flattened_12.body + wire _cast_enum_to_bits_expr_48: UInt<1> + match _cast_bits_to_bundle_expr_11.tag: HdlNone: - connect _cast_enum_to_bits_expr_34, UInt<1>(0) + connect _cast_enum_to_bits_expr_48, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_34, UInt<1>(1) - wire _cast_enum_to_bits_expr_35: UInt<1> - match _cast_bits_to_bundle_expr_1.tag: + connect _cast_enum_to_bits_expr_48, UInt<1>(1) + wire _cast_enum_to_bits_expr_49: UInt<1> + match _cast_bits_to_bundle_expr_12.tag: HdlNone: - connect _cast_enum_to_bits_expr_35, UInt<1>(0) + connect _cast_enum_to_bits_expr_49, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_35, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_34, _cast_enum_to_bits_expr_35): @[module-XXXXXXXXXX.rs 1:1] - match _cast_bits_to_bundle_expr.tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_49, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_48, _cast_enum_to_bits_expr_49): @[module-XXXXXXXXXX.rs 1:1] + match _cast_bits_to_bundle_expr_11.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: - connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - wire _cast_bits_to_bundle_expr_2: Ty6 - invalidate _cast_bits_to_bundle_expr_2 - wire _cast_bits_to_bundle_expr_3: Ty6 - invalidate _cast_bits_to_bundle_expr_3 - connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_13: Ty6 + invalidate _cast_bits_to_bundle_expr_13 + wire _cast_bits_to_bundle_expr_14: Ty6 + invalidate _cast_bits_to_bundle_expr_14 + connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_2, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_36: UInt<1> + wire _cast_enum_to_bits_expr_50: UInt<1> match io.array_opt_bool[0].tag: HdlNone: - connect _cast_enum_to_bits_expr_36, UInt<1>(0) + connect _cast_enum_to_bits_expr_50, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_36, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_36, _cast_enum_to_bits_expr_8): @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_50, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_50, _cast_enum_to_bits_expr_8): @[module-XXXXXXXXXX.rs 1:1] match io.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_2, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: connect __enum_structural_eq_2, eq(bits(io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_3, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_37: UInt<1> + wire _cast_enum_to_bits_expr_51: UInt<1> match io.array_opt_bool[1].tag: HdlNone: - connect _cast_enum_to_bits_expr_37, UInt<1>(0) + connect _cast_enum_to_bits_expr_51, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_37, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_37, _cast_enum_to_bits_expr_10): @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_51, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_51, _cast_enum_to_bits_expr_10): @[module-XXXXXXXXXX.rs 1:1] match io.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_3, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: connect __enum_structural_eq_3, eq(bits(io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_4, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_38: UInt<1> + wire _cast_enum_to_bits_expr_52: UInt<1> match io.struct_opt_bool.`0`.tag: HdlNone: - connect _cast_enum_to_bits_expr_38, UInt<1>(0) + connect _cast_enum_to_bits_expr_52, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_38, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_38, _cast_enum_to_bits_expr_12): @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_52, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_52, _cast_enum_to_bits_expr_12): @[module-XXXXXXXXXX.rs 1:1] match io.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_4, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: connect __enum_structural_eq_4, eq(bits(io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_5, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_39: UInt<1> - match extern_child.io.opt_bool.tag: + wire _cast_enum_to_bits_expr_53: UInt<1> + match io_zeros.opt_bool.tag: HdlNone: - connect _cast_enum_to_bits_expr_39, UInt<1>(0) + connect _cast_enum_to_bits_expr_53, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_39, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_39, _cast_enum_to_bits_expr_4): @[module-XXXXXXXXXX.rs 1:1] - match extern_child.io.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_53, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_53, _cast_enum_to_bits_expr_17): @[module-XXXXXXXXXX.rs 1:1] + match io_zeros.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_5, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - connect __enum_structural_eq_5, eq(bits(extern_child.io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_5, eq(bits(io_zeros.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_1.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_6, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_40: UInt<1> - match extern_child.io.opt_opt_unit.tag: + wire _cast_enum_to_bits_expr_54: UInt<1> + match io_zeros.opt_opt_unit.tag: HdlNone: - connect _cast_enum_to_bits_expr_40, UInt<1>(0) + connect _cast_enum_to_bits_expr_54, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_40, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_40, _cast_enum_to_bits_expr_6): @[module-XXXXXXXXXX.rs 1:1] - match extern_child.io.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_54, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_54, _cast_enum_to_bits_expr_17): @[module-XXXXXXXXXX.rs 1:1] + match io_zeros.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_6, __enum_structural_eq_11 @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_bits_to_bundle_expr_4: Ty1 - wire _cast_bits_to_bundle_expr_flattened_2: Ty7 - connect _cast_bits_to_bundle_expr_flattened_2.tag, bits(bits(extern_child.io.opt_opt_unit.body, 0, 0), 0, 0) - wire _cast_bits_to_enum_expr_2: Ty0 - when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_2.tag, 0)): - connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome|}(HdlNone) + wire __enum_structural_eq_26: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_6, __enum_structural_eq_26 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_26, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_15: Ty1 + wire _cast_bits_to_bundle_expr_flattened_13: Ty7 + connect _cast_bits_to_bundle_expr_flattened_13.tag, bits(bits(io_zeros.opt_opt_unit.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_11: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_13.tag, 0)): + connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome|}(HdlNone) else: - connect _cast_bits_to_enum_expr_2, {|HdlNone, HdlSome|}(HdlSome) - connect _cast_bits_to_bundle_expr_4.tag, _cast_bits_to_enum_expr_2 - connect _cast_bits_to_bundle_expr_flattened_2.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr_4.body, _cast_bits_to_bundle_expr_flattened_2.body - wire _cast_bits_to_bundle_expr_5: Ty1 - wire _cast_bits_to_bundle_expr_flattened_3: Ty7 - connect _cast_bits_to_bundle_expr_flattened_3.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) - wire _cast_bits_to_enum_expr_3: Ty0 - when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_3.tag, 0)): - connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome|}(HdlNone) + connect _cast_bits_to_enum_expr_11, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_15.tag, _cast_bits_to_enum_expr_11 + connect _cast_bits_to_bundle_expr_flattened_13.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_15.body, _cast_bits_to_bundle_expr_flattened_13.body + wire _cast_bits_to_bundle_expr_16: Ty1 + wire _cast_bits_to_bundle_expr_flattened_14: Ty7 + connect _cast_bits_to_bundle_expr_flattened_14.tag, bits(bits(_cast_bits_to_bundle_expr_1.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_12: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_14.tag, 0)): + connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome|}(HdlNone) else: - connect _cast_bits_to_enum_expr_3, {|HdlNone, HdlSome|}(HdlSome) - connect _cast_bits_to_bundle_expr_5.tag, _cast_bits_to_enum_expr_3 - connect _cast_bits_to_bundle_expr_flattened_3.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr_5.body, _cast_bits_to_bundle_expr_flattened_3.body - wire _cast_enum_to_bits_expr_41: UInt<1> - match _cast_bits_to_bundle_expr_4.tag: + connect _cast_bits_to_enum_expr_12, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_16.tag, _cast_bits_to_enum_expr_12 + connect _cast_bits_to_bundle_expr_flattened_14.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_16.body, _cast_bits_to_bundle_expr_flattened_14.body + wire _cast_enum_to_bits_expr_55: UInt<1> + match _cast_bits_to_bundle_expr_15.tag: HdlNone: - connect _cast_enum_to_bits_expr_41, UInt<1>(0) + connect _cast_enum_to_bits_expr_55, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_41, UInt<1>(1) - wire _cast_enum_to_bits_expr_42: UInt<1> - match _cast_bits_to_bundle_expr_5.tag: + connect _cast_enum_to_bits_expr_55, UInt<1>(1) + wire _cast_enum_to_bits_expr_56: UInt<1> + match _cast_bits_to_bundle_expr_16.tag: HdlNone: - connect _cast_enum_to_bits_expr_42, UInt<1>(0) + connect _cast_enum_to_bits_expr_56, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_42, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_41, _cast_enum_to_bits_expr_42): @[module-XXXXXXXXXX.rs 1:1] - match _cast_bits_to_bundle_expr_4.tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_56, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_55, _cast_enum_to_bits_expr_56): @[module-XXXXXXXXXX.rs 1:1] + match _cast_bits_to_bundle_expr_15.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: - connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - wire _cast_bits_to_bundle_expr_6: Ty6 - invalidate _cast_bits_to_bundle_expr_6 - wire _cast_bits_to_bundle_expr_7: Ty6 - invalidate _cast_bits_to_bundle_expr_7 - connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_17: Ty6 + invalidate _cast_bits_to_bundle_expr_17 + wire _cast_bits_to_bundle_expr_18: Ty6 + invalidate _cast_bits_to_bundle_expr_18 + connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_7, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_43: UInt<1> - match extern_child.io.array_opt_bool[0].tag: + wire _cast_enum_to_bits_expr_57: UInt<1> + match io_zeros.array_opt_bool[0].tag: HdlNone: - connect _cast_enum_to_bits_expr_43, UInt<1>(0) + connect _cast_enum_to_bits_expr_57, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_43, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_43, _cast_enum_to_bits_expr_8): @[module-XXXXXXXXXX.rs 1:1] - match extern_child.io.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_57, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_57, _cast_enum_to_bits_expr_20): @[module-XXXXXXXXXX.rs 1:1] + match io_zeros.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_7, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - connect __enum_structural_eq_7, eq(bits(extern_child.io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_7, eq(bits(io_zeros.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_8, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_44: UInt<1> - match extern_child.io.array_opt_bool[1].tag: + wire _cast_enum_to_bits_expr_58: UInt<1> + match io_zeros.array_opt_bool[1].tag: HdlNone: - connect _cast_enum_to_bits_expr_44, UInt<1>(0) + connect _cast_enum_to_bits_expr_58, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_44, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_44, _cast_enum_to_bits_expr_10): @[module-XXXXXXXXXX.rs 1:1] - match extern_child.io.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_58, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_58, _cast_enum_to_bits_expr_22): @[module-XXXXXXXXXX.rs 1:1] + match io_zeros.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_8, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - connect __enum_structural_eq_8, eq(bits(extern_child.io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_8, eq(bits(io_zeros.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_9, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_enum_to_bits_expr_45: UInt<1> - match extern_child.io.struct_opt_bool.`0`.tag: + wire _cast_enum_to_bits_expr_59: UInt<1> + match io_zeros.struct_opt_bool.`0`.tag: HdlNone: - connect _cast_enum_to_bits_expr_45, UInt<1>(0) + connect _cast_enum_to_bits_expr_59, UInt<1>(0) HdlSome: - connect _cast_enum_to_bits_expr_45, UInt<1>(1) - when eq(_cast_enum_to_bits_expr_45, _cast_enum_to_bits_expr_12): @[module-XXXXXXXXXX.rs 1:1] - match extern_child.io.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1] + connect _cast_enum_to_bits_expr_59, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_59, _cast_enum_to_bits_expr_24): @[module-XXXXXXXXXX.rs 1:1] + match io_zeros.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1] HdlNone: connect __enum_structural_eq_9, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] HdlSome: - connect __enum_structural_eq_9, eq(bits(extern_child.io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_9, eq(bits(io_zeros.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_4.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_60: UInt<1> + match io_alternating.opt_bool.tag: + HdlNone: + connect _cast_enum_to_bits_expr_60, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_60, UInt<1>(1) + wire _cast_enum_to_bits_expr_61: UInt<1> + match _cast_bits_to_bundle_expr_6.tag: + HdlNone: + connect _cast_enum_to_bits_expr_61, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_61, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_60, _cast_enum_to_bits_expr_61): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_10, eq(bits(io_alternating.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_62: UInt<1> + match io_alternating.opt_bool_flip.tag: + HdlNone: + connect _cast_enum_to_bits_expr_62, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_62, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_62, _cast_enum_to_bits_expr_61): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.opt_bool_flip.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_11, eq(bits(io_alternating.opt_bool_flip.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_63: UInt<1> + match io_alternating.opt_opt_unit.tag: + HdlNone: + connect _cast_enum_to_bits_expr_63, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_63, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_63, _cast_enum_to_bits_expr_61): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + wire __enum_structural_eq_27: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, __enum_structural_eq_27 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_27, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_19: Ty1 + wire _cast_bits_to_bundle_expr_flattened_15: Ty7 + connect _cast_bits_to_bundle_expr_flattened_15.tag, bits(bits(io_alternating.opt_opt_unit.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_13: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_15.tag, 0)): + connect _cast_bits_to_enum_expr_13, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_13, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_19.tag, _cast_bits_to_enum_expr_13 + connect _cast_bits_to_bundle_expr_flattened_15.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_19.body, _cast_bits_to_bundle_expr_flattened_15.body + wire _cast_bits_to_bundle_expr_20: Ty1 + wire _cast_bits_to_bundle_expr_flattened_16: Ty7 + connect _cast_bits_to_bundle_expr_flattened_16.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_14: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_16.tag, 0)): + connect _cast_bits_to_enum_expr_14, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_14, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_20.tag, _cast_bits_to_enum_expr_14 + connect _cast_bits_to_bundle_expr_flattened_16.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_20.body, _cast_bits_to_bundle_expr_flattened_16.body + wire _cast_enum_to_bits_expr_64: UInt<1> + match _cast_bits_to_bundle_expr_19.tag: + HdlNone: + connect _cast_enum_to_bits_expr_64, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_64, UInt<1>(1) + wire _cast_enum_to_bits_expr_65: UInt<1> + match _cast_bits_to_bundle_expr_20.tag: + HdlNone: + connect _cast_enum_to_bits_expr_65, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_65, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_64, _cast_enum_to_bits_expr_65): @[module-XXXXXXXXXX.rs 1:1] + match _cast_bits_to_bundle_expr_19.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + wire _cast_bits_to_bundle_expr_21: Ty6 + invalidate _cast_bits_to_bundle_expr_21 + wire _cast_bits_to_bundle_expr_22: Ty6 + invalidate _cast_bits_to_bundle_expr_22 + connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_66: UInt<1> + match io_alternating.opt_opt_unit_flip.tag: + HdlNone: + connect _cast_enum_to_bits_expr_66, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_66, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_66, _cast_enum_to_bits_expr_61): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.opt_opt_unit_flip.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_13, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + wire __enum_structural_eq_28: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, __enum_structural_eq_28 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_28, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_23: Ty1 + wire _cast_bits_to_bundle_expr_flattened_17: Ty7 + connect _cast_bits_to_bundle_expr_flattened_17.tag, bits(bits(io_alternating.opt_opt_unit_flip.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_15: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_17.tag, 0)): + connect _cast_bits_to_enum_expr_15, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_15, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_23.tag, _cast_bits_to_enum_expr_15 + connect _cast_bits_to_bundle_expr_flattened_17.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_23.body, _cast_bits_to_bundle_expr_flattened_17.body + wire _cast_bits_to_bundle_expr_24: Ty1 + wire _cast_bits_to_bundle_expr_flattened_18: Ty7 + connect _cast_bits_to_bundle_expr_flattened_18.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_16: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_18.tag, 0)): + connect _cast_bits_to_enum_expr_16, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_16, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_24.tag, _cast_bits_to_enum_expr_16 + connect _cast_bits_to_bundle_expr_flattened_18.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_24.body, _cast_bits_to_bundle_expr_flattened_18.body + wire _cast_enum_to_bits_expr_67: UInt<1> + match _cast_bits_to_bundle_expr_23.tag: + HdlNone: + connect _cast_enum_to_bits_expr_67, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_67, UInt<1>(1) + wire _cast_enum_to_bits_expr_68: UInt<1> + match _cast_bits_to_bundle_expr_24.tag: + HdlNone: + connect _cast_enum_to_bits_expr_68, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_68, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_67, _cast_enum_to_bits_expr_68): @[module-XXXXXXXXXX.rs 1:1] + match _cast_bits_to_bundle_expr_23.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + wire _cast_bits_to_bundle_expr_25: Ty6 + invalidate _cast_bits_to_bundle_expr_25 + wire _cast_bits_to_bundle_expr_26: Ty6 + invalidate _cast_bits_to_bundle_expr_26 + connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_14, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_69: UInt<1> + match io_alternating.array_opt_bool[0].tag: + HdlNone: + connect _cast_enum_to_bits_expr_69, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_69, UInt<1>(1) + wire _cast_enum_to_bits_expr_70: UInt<1> + match _cast_bits_to_array_expr_1[0].tag: + HdlNone: + connect _cast_enum_to_bits_expr_70, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_70, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_69, _cast_enum_to_bits_expr_70): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_14, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_14, eq(bits(io_alternating.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_15, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_71: UInt<1> + match io_alternating.array_opt_bool[1].tag: + HdlNone: + connect _cast_enum_to_bits_expr_71, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_71, UInt<1>(1) + wire _cast_enum_to_bits_expr_72: UInt<1> + match _cast_bits_to_array_expr_1[1].tag: + HdlNone: + connect _cast_enum_to_bits_expr_72, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_72, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_71, _cast_enum_to_bits_expr_72): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_15, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_15, eq(bits(io_alternating.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_16, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_73: UInt<1> + match io_alternating.array_opt_bool_flip[0].tag: + HdlNone: + connect _cast_enum_to_bits_expr_73, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_73, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_73, _cast_enum_to_bits_expr_70): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.array_opt_bool_flip[0].tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_16, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_16, eq(bits(io_alternating.array_opt_bool_flip[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_17, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_74: UInt<1> + match io_alternating.array_opt_bool_flip[1].tag: + HdlNone: + connect _cast_enum_to_bits_expr_74, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_74, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_74, _cast_enum_to_bits_expr_72): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.array_opt_bool_flip[1].tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_17, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_17, eq(bits(io_alternating.array_opt_bool_flip[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_18, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_75: UInt<1> + match io_alternating.struct_opt_bool.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_75, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_75, UInt<1>(1) + wire _cast_enum_to_bits_expr_76: UInt<1> + match _cast_bits_to_bundle_expr_9.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_76, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_76, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_75, _cast_enum_to_bits_expr_76): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_18, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_18, eq(bits(io_alternating.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_19, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_77: UInt<1> + match io_alternating.struct_opt_bool_flip.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_77, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_77, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_77, _cast_enum_to_bits_expr_76): @[module-XXXXXXXXXX.rs 1:1] + match io_alternating.struct_opt_bool_flip.`0`.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_19, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_19, eq(bits(io_alternating.struct_opt_bool_flip.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_20, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_78: UInt<1> + match extern_child.io.opt_bool.tag: + HdlNone: + connect _cast_enum_to_bits_expr_78, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_78, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_78, _cast_enum_to_bits_expr_4): @[module-XXXXXXXXXX.rs 1:1] + match extern_child.io.opt_bool.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_20, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_20, eq(bits(extern_child.io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_79: UInt<1> + match extern_child.io.opt_opt_unit.tag: + HdlNone: + connect _cast_enum_to_bits_expr_79, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_79, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_79, _cast_enum_to_bits_expr_6): @[module-XXXXXXXXXX.rs 1:1] + match extern_child.io.opt_opt_unit.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_21, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + wire __enum_structural_eq_29: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, __enum_structural_eq_29 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_29, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_27: Ty1 + wire _cast_bits_to_bundle_expr_flattened_19: Ty7 + connect _cast_bits_to_bundle_expr_flattened_19.tag, bits(bits(extern_child.io.opt_opt_unit.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_17: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_19.tag, 0)): + connect _cast_bits_to_enum_expr_17, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_17, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_27.tag, _cast_bits_to_enum_expr_17 + connect _cast_bits_to_bundle_expr_flattened_19.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_27.body, _cast_bits_to_bundle_expr_flattened_19.body + wire _cast_bits_to_bundle_expr_28: Ty1 + wire _cast_bits_to_bundle_expr_flattened_20: Ty7 + connect _cast_bits_to_bundle_expr_flattened_20.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) + wire _cast_bits_to_enum_expr_18: Ty0 + when eq(UInt<1>(0), tail(_cast_bits_to_bundle_expr_flattened_20.tag, 0)): + connect _cast_bits_to_enum_expr_18, {|HdlNone, HdlSome|}(HdlNone) + else: + connect _cast_bits_to_enum_expr_18, {|HdlNone, HdlSome|}(HdlSome) + connect _cast_bits_to_bundle_expr_28.tag, _cast_bits_to_enum_expr_18 + connect _cast_bits_to_bundle_expr_flattened_20.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_28.body, _cast_bits_to_bundle_expr_flattened_20.body + wire _cast_enum_to_bits_expr_80: UInt<1> + match _cast_bits_to_bundle_expr_27.tag: + HdlNone: + connect _cast_enum_to_bits_expr_80, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_80, UInt<1>(1) + wire _cast_enum_to_bits_expr_81: UInt<1> + match _cast_bits_to_bundle_expr_28.tag: + HdlNone: + connect _cast_enum_to_bits_expr_81, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_81, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_80, _cast_enum_to_bits_expr_81): @[module-XXXXXXXXXX.rs 1:1] + match _cast_bits_to_bundle_expr_27.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + wire _cast_bits_to_bundle_expr_29: Ty6 + invalidate _cast_bits_to_bundle_expr_29 + wire _cast_bits_to_bundle_expr_30: Ty6 + invalidate _cast_bits_to_bundle_expr_30 + connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_22, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_82: UInt<1> + match extern_child.io.array_opt_bool[0].tag: + HdlNone: + connect _cast_enum_to_bits_expr_82, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_82, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_82, _cast_enum_to_bits_expr_8): @[module-XXXXXXXXXX.rs 1:1] + match extern_child.io.array_opt_bool[0].tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_22, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_22, eq(bits(extern_child.io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_23, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_83: UInt<1> + match extern_child.io.array_opt_bool[1].tag: + HdlNone: + connect _cast_enum_to_bits_expr_83, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_83, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_83, _cast_enum_to_bits_expr_10): @[module-XXXXXXXXXX.rs 1:1] + match extern_child.io.array_opt_bool[1].tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_23, eq(bits(extern_child.io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_24, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_enum_to_bits_expr_84: UInt<1> + match extern_child.io.struct_opt_bool.`0`.tag: + HdlNone: + connect _cast_enum_to_bits_expr_84, UInt<1>(0) + HdlSome: + connect _cast_enum_to_bits_expr_84, UInt<1>(1) + when eq(_cast_enum_to_bits_expr_84, _cast_enum_to_bits_expr_12): @[module-XXXXXXXXXX.rs 1:1] + match extern_child.io.struct_opt_bool.`0`.tag: @[module-XXXXXXXXXX.rs 1:1] + HdlNone: + connect __enum_structural_eq_24, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + HdlSome: + connect __enum_structural_eq_24, eq(bits(extern_child.io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1] output io: Ty4 @[module-XXXXXXXXXX-2.rs 2:1] defname = check_deduce_structural_eq_flags_extern_child @@ -1642,12 +3150,17 @@ circuit check_deduce_structural_eq_flags_parent: type Ty3 = {flip opt_unit_flip: Ty0, opt_unit: Ty0, flip opt_bool_flip: Ty1, opt_bool: Ty1, flip opt_opt_unit_flip: Ty1, opt_opt_unit: Ty1, flip array_opt_bool_flip: Ty1[2], array_opt_bool: Ty1[2], flip struct_opt_bool_flip: Ty2, struct_opt_bool: Ty2} type Ty4 = {opt_unit_flip: UInt<1>, opt_unit: UInt<1>, opt_bool_flip: UInt<1>, opt_bool: UInt<1>, opt_opt_unit_flip: UInt<1>, opt_opt_unit: UInt<1>, array_opt_bool_flip: UInt<1>, array_opt_bool: UInt<1>, struct_opt_bool_flip: UInt<1>, struct_opt_bool: UInt<1>} type Ty5 = {} - type Ty6 = {io: Ty3} + type Ty6 = {`0`: UInt<2>, `1`: UInt<1>} + type Ty7 = {io: Ty3} module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1] input io: Ty3 @[module-XXXXXXXXXX.rs 2:1] - output parent_out: Ty4 @[module-XXXXXXXXXX.rs 3:1] - output extern_child_out: Ty4 @[module-XXXXXXXXXX.rs 4:1] - output child_out: Ty4 @[module-XXXXXXXXXX.rs 5:1] + input io_zeros: Ty3 @[module-XXXXXXXXXX.rs 3:1] + input io_alternating: Ty3 @[module-XXXXXXXXXX.rs 4:1] + output parent_out: Ty4 @[module-XXXXXXXXXX.rs 5:1] + output parent_zeros_out: Ty4 @[module-XXXXXXXXXX.rs 6:1] + output parent_alternating_out: Ty4 @[module-XXXXXXXXXX.rs 7:1] + output extern_child_out: Ty4 @[module-XXXXXXXXXX.rs 8:1] + output child_out: Ty4 @[module-XXXXXXXXXX.rs 9:1] wire __enum_structural_eq: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_1: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_2: UInt<1> @[module-XXXXXXXXXX.rs 1:1] @@ -1658,28 +3171,43 @@ circuit check_deduce_structural_eq_flags_parent: wire __enum_structural_eq_7: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_8: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_9: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 6:1] - inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 7:1] + wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_12: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_13: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_14: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_15: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_16: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_17: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_18: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_19: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_20: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_21: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_22: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_23: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_24: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1] + inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1] wire _bundle_literal_expr: Ty0 connect _bundle_literal_expr.tag, UInt<1>(0h1) wire _bundle_literal_expr_1: Ty5 invalidate _bundle_literal_expr_1 connect _bundle_literal_expr.body, UInt<0>(0) - connect io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 9:1] + connect io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq: UInt<1> connect _bundle_structural_eq, and(eq(io.opt_unit.tag, _bundle_literal_expr.tag), eq(io.opt_unit.body, _bundle_literal_expr.body)) - connect parent_out.opt_unit, _bundle_structural_eq @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.opt_unit, _bundle_structural_eq @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_1: UInt<1> connect _bundle_structural_eq_1, and(eq(io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(io.opt_unit_flip.body, _bundle_literal_expr.body)) - connect parent_out.opt_unit_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.opt_unit_flip, _bundle_structural_eq_1 @[module-XXXXXXXXXX.rs 13:1] wire _bundle_literal_expr_2: Ty1 connect _bundle_literal_expr_2.tag, UInt<1>(0h1) connect _bundle_literal_expr_2.body, UInt<1>(0h1) - connect io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 10:1] - connect parent_out.opt_bool, __enum_structural_eq @[module-XXXXXXXXXX.rs 10:1] + connect io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1] + connect parent_out.opt_bool, __enum_structural_eq @[module-XXXXXXXXXX.rs 14:1] wire _bundle_structural_eq_2: UInt<1> connect _bundle_structural_eq_2, and(eq(io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(io.opt_bool_flip.body, _bundle_literal_expr_2.body)) - connect parent_out.opt_bool_flip, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 10:1] + connect parent_out.opt_bool_flip, _bundle_structural_eq_2 @[module-XXXXXXXXXX.rs 14:1] wire _bundle_literal_expr_3: Ty1 connect _bundle_literal_expr_3.tag, UInt<1>(0h1) wire _cast_bundle_to_bits_expr: Ty0 @@ -1688,100 +3216,226 @@ circuit check_deduce_structural_eq_flags_parent: wire _cast_to_bits_expr: UInt<1> connect _cast_to_bits_expr, cat(_cast_bundle_to_bits_expr.body, _cast_bundle_to_bits_expr.tag) connect _bundle_literal_expr_3.body, _cast_to_bits_expr - connect io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 11:1] - connect parent_out.opt_opt_unit, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 11:1] + connect io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1] + connect parent_out.opt_opt_unit, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 15:1] wire _bundle_structural_eq_3: UInt<1> connect _bundle_structural_eq_3, and(eq(io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) - connect parent_out.opt_opt_unit_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 11:1] + connect parent_out.opt_opt_unit_flip, _bundle_structural_eq_3 @[module-XXXXXXXXXX.rs 15:1] wire _array_literal_expr: Ty1[2] wire _bundle_literal_expr_4: Ty1 connect _bundle_literal_expr_4.tag, UInt<1>(0h1) connect _bundle_literal_expr_4.body, UInt<1>(0h0) connect _array_literal_expr[0], _bundle_literal_expr_4 connect _array_literal_expr[1], _bundle_literal_expr_2 - connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect parent_out.array_opt_bool, and(__enum_structural_eq_2, __enum_structural_eq_3) @[module-XXXXXXXXXX.rs 12:1] + connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect parent_out.array_opt_bool, and(__enum_structural_eq_2, __enum_structural_eq_3) @[module-XXXXXXXXXX.rs 16:1] wire _bundle_structural_eq_4: UInt<1> connect _bundle_structural_eq_4, and(eq(io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) wire _bundle_structural_eq_5: UInt<1> connect _bundle_structural_eq_5, and(eq(io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) - connect parent_out.array_opt_bool_flip, and(_bundle_structural_eq_4, _bundle_structural_eq_5) @[module-XXXXXXXXXX.rs 12:1] + connect parent_out.array_opt_bool_flip, and(_bundle_structural_eq_4, _bundle_structural_eq_5) @[module-XXXXXXXXXX.rs 16:1] wire _bundle_literal_expr_5: Ty2 connect _bundle_literal_expr_5.`0`, _bundle_literal_expr_2 connect _bundle_literal_expr_5.`1`, UInt<1>(0h1) - connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect parent_out.struct_opt_bool, and(__enum_structural_eq_4, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect parent_out.struct_opt_bool, and(__enum_structural_eq_4, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] wire _bundle_structural_eq_6: UInt<1> connect _bundle_structural_eq_6, and(eq(io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect parent_out.struct_opt_bool_flip, and(_bundle_structural_eq_6, eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect extern_child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 9:1] + connect parent_out.struct_opt_bool_flip, and(_bundle_structural_eq_6, eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + wire _cast_bits_to_bundle_expr: Ty0 + wire _cast_bits_to_bundle_expr_flattened: Ty0 + connect _cast_bits_to_bundle_expr_flattened.tag, bits(UInt<1>(0h0), 0, 0) + connect _cast_bits_to_bundle_expr.tag, _cast_bits_to_bundle_expr_flattened.tag + connect _cast_bits_to_bundle_expr_flattened.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr.body, _cast_bits_to_bundle_expr_flattened.body + connect io_zeros.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_7: UInt<1> - connect _bundle_structural_eq_7, and(eq(extern_child.io.opt_unit.tag, _bundle_literal_expr.tag), eq(extern_child.io.opt_unit.body, _bundle_literal_expr.body)) - connect extern_child_out.opt_unit, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 9:1] + connect _bundle_structural_eq_7, and(eq(io_zeros.opt_unit.tag, _cast_bits_to_bundle_expr.tag), eq(io_zeros.opt_unit.body, _cast_bits_to_bundle_expr.body)) + connect parent_zeros_out.opt_unit, _bundle_structural_eq_7 @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_8: UInt<1> - connect _bundle_structural_eq_8, and(eq(extern_child.io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(extern_child.io.opt_unit_flip.body, _bundle_literal_expr.body)) - connect extern_child_out.opt_unit_flip, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 9:1] - connect extern_child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 10:1] - connect extern_child_out.opt_bool, __enum_structural_eq_5 @[module-XXXXXXXXXX.rs 10:1] + connect _bundle_structural_eq_8, and(eq(io_zeros.opt_unit_flip.tag, _cast_bits_to_bundle_expr.tag), eq(io_zeros.opt_unit_flip.body, _cast_bits_to_bundle_expr.body)) + connect parent_zeros_out.opt_unit_flip, _bundle_structural_eq_8 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_bundle_expr_1: Ty1 + wire _cast_bits_to_bundle_expr_flattened_1: Ty1 + connect _cast_bits_to_bundle_expr_flattened_1.tag, bits(UInt<2>(0h0), 0, 0) + connect _cast_bits_to_bundle_expr_1.tag, _cast_bits_to_bundle_expr_flattened_1.tag + connect _cast_bits_to_bundle_expr_flattened_1.body, bits(UInt<2>(0h0), 1, 1) + connect _cast_bits_to_bundle_expr_1.body, _cast_bits_to_bundle_expr_flattened_1.body + connect io_zeros.opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 14:1] + connect parent_zeros_out.opt_bool, __enum_structural_eq_5 @[module-XXXXXXXXXX.rs 14:1] wire _bundle_structural_eq_9: UInt<1> - connect _bundle_structural_eq_9, and(eq(extern_child.io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(extern_child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) - connect extern_child_out.opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 10:1] - connect extern_child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 11:1] - connect extern_child_out.opt_opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 11:1] + connect _bundle_structural_eq_9, and(eq(io_zeros.opt_bool_flip.tag, _cast_bits_to_bundle_expr_1.tag), eq(io_zeros.opt_bool_flip.body, _cast_bits_to_bundle_expr_1.body)) + connect parent_zeros_out.opt_bool_flip, _bundle_structural_eq_9 @[module-XXXXXXXXXX.rs 14:1] + connect io_zeros.opt_opt_unit_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 15:1] + connect parent_zeros_out.opt_opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 15:1] wire _bundle_structural_eq_10: UInt<1> - connect _bundle_structural_eq_10, and(eq(extern_child.io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(extern_child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) - connect extern_child_out.opt_opt_unit_flip, _bundle_structural_eq_10 @[module-XXXXXXXXXX.rs 11:1] - connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect extern_child_out.array_opt_bool, and(__enum_structural_eq_7, __enum_structural_eq_8) @[module-XXXXXXXXXX.rs 12:1] + connect _bundle_structural_eq_10, and(eq(io_zeros.opt_opt_unit_flip.tag, _cast_bits_to_bundle_expr_1.tag), eq(io_zeros.opt_opt_unit_flip.body, _cast_bits_to_bundle_expr_1.body)) + connect parent_zeros_out.opt_opt_unit_flip, _bundle_structural_eq_10 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr: Ty1[2] + wire _cast_bits_to_array_expr_flattened: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0) + wire _cast_bits_to_bundle_expr_2: Ty1 + wire _cast_bits_to_bundle_expr_flattened_2: Ty1 + connect _cast_bits_to_bundle_expr_flattened_2.tag, bits(_cast_bits_to_array_expr_flattened[0], 0, 0) + connect _cast_bits_to_bundle_expr_2.tag, _cast_bits_to_bundle_expr_flattened_2.tag + connect _cast_bits_to_bundle_expr_flattened_2.body, bits(_cast_bits_to_array_expr_flattened[0], 1, 1) + connect _cast_bits_to_bundle_expr_2.body, _cast_bits_to_bundle_expr_flattened_2.body + connect _cast_bits_to_array_expr[0], _cast_bits_to_bundle_expr_2 + connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2) + wire _cast_bits_to_bundle_expr_3: Ty1 + wire _cast_bits_to_bundle_expr_flattened_3: Ty1 + connect _cast_bits_to_bundle_expr_flattened_3.tag, bits(_cast_bits_to_array_expr_flattened[1], 0, 0) + connect _cast_bits_to_bundle_expr_3.tag, _cast_bits_to_bundle_expr_flattened_3.tag + connect _cast_bits_to_bundle_expr_flattened_3.body, bits(_cast_bits_to_array_expr_flattened[1], 1, 1) + connect _cast_bits_to_bundle_expr_3.body, _cast_bits_to_bundle_expr_flattened_3.body + connect _cast_bits_to_array_expr[1], _cast_bits_to_bundle_expr_3 + connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1] + connect parent_zeros_out.array_opt_bool, and(__enum_structural_eq_7, __enum_structural_eq_8) @[module-XXXXXXXXXX.rs 16:1] wire _bundle_structural_eq_11: UInt<1> - connect _bundle_structural_eq_11, and(eq(extern_child.io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(extern_child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) + connect _bundle_structural_eq_11, and(eq(io_zeros.array_opt_bool_flip[0].tag, _cast_bits_to_array_expr[0].tag), eq(io_zeros.array_opt_bool_flip[0].body, _cast_bits_to_array_expr[0].body)) wire _bundle_structural_eq_12: UInt<1> - connect _bundle_structural_eq_12, and(eq(extern_child.io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(extern_child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) - connect extern_child_out.array_opt_bool_flip, and(_bundle_structural_eq_11, _bundle_structural_eq_12) @[module-XXXXXXXXXX.rs 12:1] - connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_9, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + connect _bundle_structural_eq_12, and(eq(io_zeros.array_opt_bool_flip[1].tag, _cast_bits_to_array_expr[1].tag), eq(io_zeros.array_opt_bool_flip[1].body, _cast_bits_to_array_expr[1].body)) + connect parent_zeros_out.array_opt_bool_flip, and(_bundle_structural_eq_11, _bundle_structural_eq_12) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_4: Ty2 + wire _cast_bits_to_bundle_expr_flattened_4: Ty6 + connect _cast_bits_to_bundle_expr_flattened_4.`0`, bits(UInt<3>(0h0), 1, 0) + wire _cast_bits_to_bundle_expr_5: Ty1 + wire _cast_bits_to_bundle_expr_flattened_5: Ty1 + connect _cast_bits_to_bundle_expr_flattened_5.tag, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 0, 0) + connect _cast_bits_to_bundle_expr_5.tag, _cast_bits_to_bundle_expr_flattened_5.tag + connect _cast_bits_to_bundle_expr_flattened_5.body, bits(_cast_bits_to_bundle_expr_flattened_4.`0`, 1, 1) + connect _cast_bits_to_bundle_expr_5.body, _cast_bits_to_bundle_expr_flattened_5.body + connect _cast_bits_to_bundle_expr_4.`0`, _cast_bits_to_bundle_expr_5 + connect _cast_bits_to_bundle_expr_flattened_4.`1`, bits(UInt<3>(0h0), 2, 2) + connect _cast_bits_to_bundle_expr_4.`1`, _cast_bits_to_bundle_expr_flattened_4.`1` + connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr_4 @[module-XXXXXXXXXX.rs 17:1] + connect parent_zeros_out.struct_opt_bool, and(__enum_structural_eq_9, eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1] wire _bundle_structural_eq_13: UInt<1> - connect _bundle_structural_eq_13, and(eq(extern_child.io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(extern_child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect extern_child_out.struct_opt_bool_flip, and(_bundle_structural_eq_13, eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 9:1] + connect _bundle_structural_eq_13, and(eq(io_zeros.struct_opt_bool_flip.`0`.tag, _cast_bits_to_bundle_expr_4.`0`.tag), eq(io_zeros.struct_opt_bool_flip.`0`.body, _cast_bits_to_bundle_expr_4.`0`.body)) + connect parent_zeros_out.struct_opt_bool_flip, and(_bundle_structural_eq_13, eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_4.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect io_alternating.opt_unit_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_14: UInt<1> - connect _bundle_structural_eq_14, and(eq(child.io.opt_unit.tag, _bundle_literal_expr.tag), eq(child.io.opt_unit.body, _bundle_literal_expr.body)) - connect child_out.opt_unit, _bundle_structural_eq_14 @[module-XXXXXXXXXX.rs 9:1] + connect _bundle_structural_eq_14, and(eq(io_alternating.opt_unit.tag, _cast_bits_to_bundle_expr.tag), eq(io_alternating.opt_unit.body, _cast_bits_to_bundle_expr.body)) + connect parent_alternating_out.opt_unit, _bundle_structural_eq_14 @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_15: UInt<1> - connect _bundle_structural_eq_15, and(eq(child.io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(child.io.opt_unit_flip.body, _bundle_literal_expr.body)) - connect child_out.opt_unit_flip, _bundle_structural_eq_15 @[module-XXXXXXXXXX.rs 9:1] - connect child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 10:1] + connect _bundle_structural_eq_15, and(eq(io_alternating.opt_unit_flip.tag, _cast_bits_to_bundle_expr.tag), eq(io_alternating.opt_unit_flip.body, _cast_bits_to_bundle_expr.body)) + connect parent_alternating_out.opt_unit_flip, _bundle_structural_eq_15 @[module-XXXXXXXXXX.rs 13:1] + wire _cast_bits_to_bundle_expr_6: Ty1 + wire _cast_bits_to_bundle_expr_flattened_6: Ty1 + connect _cast_bits_to_bundle_expr_flattened_6.tag, bits(UInt<2>(0h2), 0, 0) + connect _cast_bits_to_bundle_expr_6.tag, _cast_bits_to_bundle_expr_flattened_6.tag + connect _cast_bits_to_bundle_expr_flattened_6.body, bits(UInt<2>(0h2), 1, 1) + connect _cast_bits_to_bundle_expr_6.body, _cast_bits_to_bundle_expr_flattened_6.body + connect io_alternating.opt_bool_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 14:1] + connect parent_alternating_out.opt_bool, __enum_structural_eq_10 @[module-XXXXXXXXXX.rs 14:1] + connect parent_alternating_out.opt_bool_flip, __enum_structural_eq_11 @[module-XXXXXXXXXX.rs 14:1] + connect io_alternating.opt_opt_unit_flip, _cast_bits_to_bundle_expr_6 @[module-XXXXXXXXXX.rs 15:1] + connect parent_alternating_out.opt_opt_unit, __enum_structural_eq_12 @[module-XXXXXXXXXX.rs 15:1] + connect parent_alternating_out.opt_opt_unit_flip, __enum_structural_eq_13 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr_1: Ty1[2] + wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0) + wire _cast_bits_to_bundle_expr_7: Ty1 + wire _cast_bits_to_bundle_expr_flattened_7: Ty1 + connect _cast_bits_to_bundle_expr_flattened_7.tag, bits(_cast_bits_to_array_expr_flattened_1[0], 0, 0) + connect _cast_bits_to_bundle_expr_7.tag, _cast_bits_to_bundle_expr_flattened_7.tag + connect _cast_bits_to_bundle_expr_flattened_7.body, bits(_cast_bits_to_array_expr_flattened_1[0], 1, 1) + connect _cast_bits_to_bundle_expr_7.body, _cast_bits_to_bundle_expr_flattened_7.body + connect _cast_bits_to_array_expr_1[0], _cast_bits_to_bundle_expr_7 + connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2) + wire _cast_bits_to_bundle_expr_8: Ty1 + wire _cast_bits_to_bundle_expr_flattened_8: Ty1 + connect _cast_bits_to_bundle_expr_flattened_8.tag, bits(_cast_bits_to_array_expr_flattened_1[1], 0, 0) + connect _cast_bits_to_bundle_expr_8.tag, _cast_bits_to_bundle_expr_flattened_8.tag + connect _cast_bits_to_bundle_expr_flattened_8.body, bits(_cast_bits_to_array_expr_flattened_1[1], 1, 1) + connect _cast_bits_to_bundle_expr_8.body, _cast_bits_to_bundle_expr_flattened_8.body + connect _cast_bits_to_array_expr_1[1], _cast_bits_to_bundle_expr_8 + connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1] + connect parent_alternating_out.array_opt_bool, and(__enum_structural_eq_14, __enum_structural_eq_15) @[module-XXXXXXXXXX.rs 16:1] + connect parent_alternating_out.array_opt_bool_flip, and(__enum_structural_eq_16, __enum_structural_eq_17) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_9: Ty2 + wire _cast_bits_to_bundle_expr_flattened_9: Ty6 + connect _cast_bits_to_bundle_expr_flattened_9.`0`, bits(UInt<3>(0h2), 1, 0) + wire _cast_bits_to_bundle_expr_10: Ty1 + wire _cast_bits_to_bundle_expr_flattened_10: Ty1 + connect _cast_bits_to_bundle_expr_flattened_10.tag, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 0, 0) + connect _cast_bits_to_bundle_expr_10.tag, _cast_bits_to_bundle_expr_flattened_10.tag + connect _cast_bits_to_bundle_expr_flattened_10.body, bits(_cast_bits_to_bundle_expr_flattened_9.`0`, 1, 1) + connect _cast_bits_to_bundle_expr_10.body, _cast_bits_to_bundle_expr_flattened_10.body + connect _cast_bits_to_bundle_expr_9.`0`, _cast_bits_to_bundle_expr_10 + connect _cast_bits_to_bundle_expr_flattened_9.`1`, bits(UInt<3>(0h2), 2, 2) + connect _cast_bits_to_bundle_expr_9.`1`, _cast_bits_to_bundle_expr_flattened_9.`1` + connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_9 @[module-XXXXXXXXXX.rs 17:1] + connect parent_alternating_out.struct_opt_bool, and(__enum_structural_eq_18, eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect parent_alternating_out.struct_opt_bool_flip, and(__enum_structural_eq_19, eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_9.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect extern_child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_16: UInt<1> - connect _bundle_structural_eq_16, and(eq(child.io.opt_bool.tag, _bundle_literal_expr_2.tag), eq(child.io.opt_bool.body, _bundle_literal_expr_2.body)) - connect child_out.opt_bool, _bundle_structural_eq_16 @[module-XXXXXXXXXX.rs 10:1] + connect _bundle_structural_eq_16, and(eq(extern_child.io.opt_unit.tag, _bundle_literal_expr.tag), eq(extern_child.io.opt_unit.body, _bundle_literal_expr.body)) + connect extern_child_out.opt_unit, _bundle_structural_eq_16 @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_17: UInt<1> - connect _bundle_structural_eq_17, and(eq(child.io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) - connect child_out.opt_bool_flip, _bundle_structural_eq_17 @[module-XXXXXXXXXX.rs 10:1] - connect child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 11:1] + connect _bundle_structural_eq_17, and(eq(extern_child.io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(extern_child.io.opt_unit_flip.body, _bundle_literal_expr.body)) + connect extern_child_out.opt_unit_flip, _bundle_structural_eq_17 @[module-XXXXXXXXXX.rs 13:1] + connect extern_child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1] + connect extern_child_out.opt_bool, __enum_structural_eq_20 @[module-XXXXXXXXXX.rs 14:1] wire _bundle_structural_eq_18: UInt<1> - connect _bundle_structural_eq_18, and(eq(child.io.opt_opt_unit.tag, _bundle_literal_expr_3.tag), eq(child.io.opt_opt_unit.body, _bundle_literal_expr_3.body)) - connect child_out.opt_opt_unit, _bundle_structural_eq_18 @[module-XXXXXXXXXX.rs 11:1] + connect _bundle_structural_eq_18, and(eq(extern_child.io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(extern_child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) + connect extern_child_out.opt_bool_flip, _bundle_structural_eq_18 @[module-XXXXXXXXXX.rs 14:1] + connect extern_child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1] + connect extern_child_out.opt_opt_unit, __enum_structural_eq_21 @[module-XXXXXXXXXX.rs 15:1] wire _bundle_structural_eq_19: UInt<1> - connect _bundle_structural_eq_19, and(eq(child.io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) - connect child_out.opt_opt_unit_flip, _bundle_structural_eq_19 @[module-XXXXXXXXXX.rs 11:1] - connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] + connect _bundle_structural_eq_19, and(eq(extern_child.io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(extern_child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) + connect extern_child_out.opt_opt_unit_flip, _bundle_structural_eq_19 @[module-XXXXXXXXXX.rs 15:1] + connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect extern_child_out.array_opt_bool, and(__enum_structural_eq_22, __enum_structural_eq_23) @[module-XXXXXXXXXX.rs 16:1] wire _bundle_structural_eq_20: UInt<1> - connect _bundle_structural_eq_20, and(eq(child.io.array_opt_bool[0].tag, _array_literal_expr[0].tag), eq(child.io.array_opt_bool[0].body, _array_literal_expr[0].body)) + connect _bundle_structural_eq_20, and(eq(extern_child.io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(extern_child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) wire _bundle_structural_eq_21: UInt<1> - connect _bundle_structural_eq_21, and(eq(child.io.array_opt_bool[1].tag, _array_literal_expr[1].tag), eq(child.io.array_opt_bool[1].body, _array_literal_expr[1].body)) - connect child_out.array_opt_bool, and(_bundle_structural_eq_20, _bundle_structural_eq_21) @[module-XXXXXXXXXX.rs 12:1] + connect _bundle_structural_eq_21, and(eq(extern_child.io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(extern_child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) + connect extern_child_out.array_opt_bool_flip, and(_bundle_structural_eq_20, _bundle_structural_eq_21) @[module-XXXXXXXXXX.rs 16:1] + connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_24, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] wire _bundle_structural_eq_22: UInt<1> - connect _bundle_structural_eq_22, and(eq(child.io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) + connect _bundle_structural_eq_22, and(eq(extern_child.io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(extern_child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) + connect extern_child_out.struct_opt_bool_flip, and(_bundle_structural_eq_22, eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect child.io.opt_unit_flip, _bundle_literal_expr @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_23: UInt<1> - connect _bundle_structural_eq_23, and(eq(child.io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) - connect child_out.array_opt_bool_flip, and(_bundle_structural_eq_22, _bundle_structural_eq_23) @[module-XXXXXXXXXX.rs 12:1] - connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] + connect _bundle_structural_eq_23, and(eq(child.io.opt_unit.tag, _bundle_literal_expr.tag), eq(child.io.opt_unit.body, _bundle_literal_expr.body)) + connect child_out.opt_unit, _bundle_structural_eq_23 @[module-XXXXXXXXXX.rs 13:1] wire _bundle_structural_eq_24: UInt<1> - connect _bundle_structural_eq_24, and(eq(child.io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(child.io.struct_opt_bool.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect child_out.struct_opt_bool, and(_bundle_structural_eq_24, eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + connect _bundle_structural_eq_24, and(eq(child.io.opt_unit_flip.tag, _bundle_literal_expr.tag), eq(child.io.opt_unit_flip.body, _bundle_literal_expr.body)) + connect child_out.opt_unit_flip, _bundle_structural_eq_24 @[module-XXXXXXXXXX.rs 13:1] + connect child.io.opt_bool_flip, _bundle_literal_expr_2 @[module-XXXXXXXXXX.rs 14:1] wire _bundle_structural_eq_25: UInt<1> - connect _bundle_structural_eq_25, and(eq(child.io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) - connect child_out.struct_opt_bool_flip, and(_bundle_structural_eq_25, eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + connect _bundle_structural_eq_25, and(eq(child.io.opt_bool.tag, _bundle_literal_expr_2.tag), eq(child.io.opt_bool.body, _bundle_literal_expr_2.body)) + connect child_out.opt_bool, _bundle_structural_eq_25 @[module-XXXXXXXXXX.rs 14:1] + wire _bundle_structural_eq_26: UInt<1> + connect _bundle_structural_eq_26, and(eq(child.io.opt_bool_flip.tag, _bundle_literal_expr_2.tag), eq(child.io.opt_bool_flip.body, _bundle_literal_expr_2.body)) + connect child_out.opt_bool_flip, _bundle_structural_eq_26 @[module-XXXXXXXXXX.rs 14:1] + connect child.io.opt_opt_unit_flip, _bundle_literal_expr_3 @[module-XXXXXXXXXX.rs 15:1] + wire _bundle_structural_eq_27: UInt<1> + connect _bundle_structural_eq_27, and(eq(child.io.opt_opt_unit.tag, _bundle_literal_expr_3.tag), eq(child.io.opt_opt_unit.body, _bundle_literal_expr_3.body)) + connect child_out.opt_opt_unit, _bundle_structural_eq_27 @[module-XXXXXXXXXX.rs 15:1] + wire _bundle_structural_eq_28: UInt<1> + connect _bundle_structural_eq_28, and(eq(child.io.opt_opt_unit_flip.tag, _bundle_literal_expr_3.tag), eq(child.io.opt_opt_unit_flip.body, _bundle_literal_expr_3.body)) + connect child_out.opt_opt_unit_flip, _bundle_structural_eq_28 @[module-XXXXXXXXXX.rs 15:1] + connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + wire _bundle_structural_eq_29: UInt<1> + connect _bundle_structural_eq_29, and(eq(child.io.array_opt_bool[0].tag, _array_literal_expr[0].tag), eq(child.io.array_opt_bool[0].body, _array_literal_expr[0].body)) + wire _bundle_structural_eq_30: UInt<1> + connect _bundle_structural_eq_30, and(eq(child.io.array_opt_bool[1].tag, _array_literal_expr[1].tag), eq(child.io.array_opt_bool[1].body, _array_literal_expr[1].body)) + connect child_out.array_opt_bool, and(_bundle_structural_eq_29, _bundle_structural_eq_30) @[module-XXXXXXXXXX.rs 16:1] + wire _bundle_structural_eq_31: UInt<1> + connect _bundle_structural_eq_31, and(eq(child.io.array_opt_bool_flip[0].tag, _array_literal_expr[0].tag), eq(child.io.array_opt_bool_flip[0].body, _array_literal_expr[0].body)) + wire _bundle_structural_eq_32: UInt<1> + connect _bundle_structural_eq_32, and(eq(child.io.array_opt_bool_flip[1].tag, _array_literal_expr[1].tag), eq(child.io.array_opt_bool_flip[1].body, _array_literal_expr[1].body)) + connect child_out.array_opt_bool_flip, and(_bundle_structural_eq_31, _bundle_structural_eq_32) @[module-XXXXXXXXXX.rs 16:1] + connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + wire _bundle_structural_eq_33: UInt<1> + connect _bundle_structural_eq_33, and(eq(child.io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(child.io.struct_opt_bool.`0`.body, _bundle_literal_expr_5.`0`.body)) + connect child_out.struct_opt_bool, and(_bundle_structural_eq_33, eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + wire _bundle_structural_eq_34: UInt<1> + connect _bundle_structural_eq_34, and(eq(child.io.struct_opt_bool_flip.`0`.tag, _bundle_literal_expr_5.`0`.tag), eq(child.io.struct_opt_bool_flip.`0`.body, _bundle_literal_expr_5.`0`.body)) + connect child_out.struct_opt_bool_flip, and(_bundle_structural_eq_34, eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] when eq(io.opt_bool.tag, _bundle_literal_expr_2.tag): @[module-XXXXXXXXXX.rs 1:1] when eq(io.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] @@ -1793,30 +3447,30 @@ circuit check_deduce_structural_eq_flags_parent: when eq(io.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_1, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_1, __enum_structural_eq_10 @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_bits_to_bundle_expr: Ty0 - wire _cast_bits_to_bundle_expr_flattened: Ty0 - connect _cast_bits_to_bundle_expr_flattened.tag, bits(bits(io.opt_opt_unit.body, 0, 0), 0, 0) - connect _cast_bits_to_bundle_expr.tag, _cast_bits_to_bundle_expr_flattened.tag - connect _cast_bits_to_bundle_expr_flattened.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr.body, _cast_bits_to_bundle_expr_flattened.body - wire _cast_bits_to_bundle_expr_1: Ty0 - wire _cast_bits_to_bundle_expr_flattened_1: Ty0 - connect _cast_bits_to_bundle_expr_flattened_1.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) - connect _cast_bits_to_bundle_expr_1.tag, _cast_bits_to_bundle_expr_flattened_1.tag - connect _cast_bits_to_bundle_expr_flattened_1.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr_1.body, _cast_bits_to_bundle_expr_flattened_1.body - when eq(_cast_bits_to_bundle_expr.tag, _cast_bits_to_bundle_expr_1.tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(_cast_bits_to_bundle_expr.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_25: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_1, __enum_structural_eq_25 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_25, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_11: Ty0 + wire _cast_bits_to_bundle_expr_flattened_11: Ty0 + connect _cast_bits_to_bundle_expr_flattened_11.tag, bits(bits(io.opt_opt_unit.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_11.tag, _cast_bits_to_bundle_expr_flattened_11.tag + connect _cast_bits_to_bundle_expr_flattened_11.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_11.body, _cast_bits_to_bundle_expr_flattened_11.body + wire _cast_bits_to_bundle_expr_12: Ty0 + wire _cast_bits_to_bundle_expr_flattened_12: Ty0 + connect _cast_bits_to_bundle_expr_flattened_12.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_12.tag, _cast_bits_to_bundle_expr_flattened_12.tag + connect _cast_bits_to_bundle_expr_flattened_12.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_12.body, _cast_bits_to_bundle_expr_flattened_12.body + when eq(_cast_bits_to_bundle_expr_11.tag, _cast_bits_to_bundle_expr_12.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(_cast_bits_to_bundle_expr_11.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire _cast_bits_to_bundle_expr_2: Ty5 - invalidate _cast_bits_to_bundle_expr_2 - wire _cast_bits_to_bundle_expr_3: Ty5 - invalidate _cast_bits_to_bundle_expr_3 - connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_13: Ty5 + invalidate _cast_bits_to_bundle_expr_13 + wire _cast_bits_to_bundle_expr_14: Ty5 + invalidate _cast_bits_to_bundle_expr_14 + connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_2, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] when eq(io.array_opt_bool[0].tag, _array_literal_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1] when eq(io.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] @@ -1836,58 +3490,217 @@ circuit check_deduce_structural_eq_flags_parent: else: connect __enum_structural_eq_4, eq(bits(io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_5, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.opt_bool.tag, _bundle_literal_expr_2.tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.opt_bool.tag, _cast_bits_to_bundle_expr_1.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_5, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_5, eq(bits(extern_child.io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_5, eq(bits(io_zeros.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_1.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_6, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.opt_opt_unit.tag, _bundle_literal_expr_3.tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.opt_opt_unit.tag, _cast_bits_to_bundle_expr_1.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_6, __enum_structural_eq_11 @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - wire _cast_bits_to_bundle_expr_4: Ty0 - wire _cast_bits_to_bundle_expr_flattened_2: Ty0 - connect _cast_bits_to_bundle_expr_flattened_2.tag, bits(bits(extern_child.io.opt_opt_unit.body, 0, 0), 0, 0) - connect _cast_bits_to_bundle_expr_4.tag, _cast_bits_to_bundle_expr_flattened_2.tag - connect _cast_bits_to_bundle_expr_flattened_2.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr_4.body, _cast_bits_to_bundle_expr_flattened_2.body - wire _cast_bits_to_bundle_expr_5: Ty0 - wire _cast_bits_to_bundle_expr_flattened_3: Ty0 - connect _cast_bits_to_bundle_expr_flattened_3.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) - connect _cast_bits_to_bundle_expr_5.tag, _cast_bits_to_bundle_expr_flattened_3.tag - connect _cast_bits_to_bundle_expr_flattened_3.body, UInt<0>(0) - connect _cast_bits_to_bundle_expr_5.body, _cast_bits_to_bundle_expr_flattened_3.body - when eq(_cast_bits_to_bundle_expr_4.tag, _cast_bits_to_bundle_expr_5.tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(_cast_bits_to_bundle_expr_4.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_26: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_6, __enum_structural_eq_26 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_26, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_15: Ty0 + wire _cast_bits_to_bundle_expr_flattened_13: Ty0 + connect _cast_bits_to_bundle_expr_flattened_13.tag, bits(bits(io_zeros.opt_opt_unit.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_15.tag, _cast_bits_to_bundle_expr_flattened_13.tag + connect _cast_bits_to_bundle_expr_flattened_13.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_15.body, _cast_bits_to_bundle_expr_flattened_13.body + wire _cast_bits_to_bundle_expr_16: Ty0 + wire _cast_bits_to_bundle_expr_flattened_14: Ty0 + connect _cast_bits_to_bundle_expr_flattened_14.tag, bits(bits(_cast_bits_to_bundle_expr_1.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_16.tag, _cast_bits_to_bundle_expr_flattened_14.tag + connect _cast_bits_to_bundle_expr_flattened_14.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_16.body, _cast_bits_to_bundle_expr_flattened_14.body + when eq(_cast_bits_to_bundle_expr_15.tag, _cast_bits_to_bundle_expr_16.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(_cast_bits_to_bundle_expr_15.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire _cast_bits_to_bundle_expr_6: Ty5 - invalidate _cast_bits_to_bundle_expr_6 - wire _cast_bits_to_bundle_expr_7: Ty5 - invalidate _cast_bits_to_bundle_expr_7 - connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_17: Ty5 + invalidate _cast_bits_to_bundle_expr_17 + wire _cast_bits_to_bundle_expr_18: Ty5 + invalidate _cast_bits_to_bundle_expr_18 + connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_7, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.array_opt_bool[0].tag, _array_literal_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.array_opt_bool[0].tag, _cast_bits_to_array_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_7, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_7, eq(bits(extern_child.io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_7, eq(bits(io_zeros.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_8, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.array_opt_bool[1].tag, _array_literal_expr[1].tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.array_opt_bool[1].tag, _cast_bits_to_array_expr[1].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_8, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_8, eq(bits(extern_child.io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_8, eq(bits(io_zeros.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_9, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag): @[module-XXXXXXXXXX.rs 1:1] - when eq(extern_child.io.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.struct_opt_bool.`0`.tag, _cast_bits_to_bundle_expr_4.`0`.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_zeros.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_9, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_9, eq(bits(extern_child.io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_9, eq(bits(io_zeros.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_4.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_bool.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_10, eq(bits(io_alternating.opt_bool.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_bool_flip.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_bool_flip.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_11, eq(bits(io_alternating.opt_bool_flip.body, 0, 0), bits(_cast_bits_to_bundle_expr_6.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_opt_unit.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire __enum_structural_eq_27: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, __enum_structural_eq_27 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_27, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_19: Ty0 + wire _cast_bits_to_bundle_expr_flattened_15: Ty0 + connect _cast_bits_to_bundle_expr_flattened_15.tag, bits(bits(io_alternating.opt_opt_unit.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_19.tag, _cast_bits_to_bundle_expr_flattened_15.tag + connect _cast_bits_to_bundle_expr_flattened_15.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_19.body, _cast_bits_to_bundle_expr_flattened_15.body + wire _cast_bits_to_bundle_expr_20: Ty0 + wire _cast_bits_to_bundle_expr_flattened_16: Ty0 + connect _cast_bits_to_bundle_expr_flattened_16.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_20.tag, _cast_bits_to_bundle_expr_flattened_16.tag + connect _cast_bits_to_bundle_expr_flattened_16.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_20.body, _cast_bits_to_bundle_expr_flattened_16.body + when eq(_cast_bits_to_bundle_expr_19.tag, _cast_bits_to_bundle_expr_20.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(_cast_bits_to_bundle_expr_19.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire _cast_bits_to_bundle_expr_21: Ty5 + invalidate _cast_bits_to_bundle_expr_21 + wire _cast_bits_to_bundle_expr_22: Ty5 + invalidate _cast_bits_to_bundle_expr_22 + connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_opt_unit_flip.tag, _cast_bits_to_bundle_expr_6.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.opt_opt_unit_flip.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire __enum_structural_eq_28: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, __enum_structural_eq_28 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_28, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_23: Ty0 + wire _cast_bits_to_bundle_expr_flattened_17: Ty0 + connect _cast_bits_to_bundle_expr_flattened_17.tag, bits(bits(io_alternating.opt_opt_unit_flip.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_23.tag, _cast_bits_to_bundle_expr_flattened_17.tag + connect _cast_bits_to_bundle_expr_flattened_17.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_23.body, _cast_bits_to_bundle_expr_flattened_17.body + wire _cast_bits_to_bundle_expr_24: Ty0 + wire _cast_bits_to_bundle_expr_flattened_18: Ty0 + connect _cast_bits_to_bundle_expr_flattened_18.tag, bits(bits(_cast_bits_to_bundle_expr_6.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_24.tag, _cast_bits_to_bundle_expr_flattened_18.tag + connect _cast_bits_to_bundle_expr_flattened_18.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_24.body, _cast_bits_to_bundle_expr_flattened_18.body + when eq(_cast_bits_to_bundle_expr_23.tag, _cast_bits_to_bundle_expr_24.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(_cast_bits_to_bundle_expr_23.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire _cast_bits_to_bundle_expr_25: Ty5 + invalidate _cast_bits_to_bundle_expr_25 + wire _cast_bits_to_bundle_expr_26: Ty5 + invalidate _cast_bits_to_bundle_expr_26 + connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_14, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool[0].tag, _cast_bits_to_array_expr_1[0].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_14, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_14, eq(bits(io_alternating.array_opt_bool[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_15, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool[1].tag, _cast_bits_to_array_expr_1[1].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_15, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_15, eq(bits(io_alternating.array_opt_bool[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_16, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool_flip[0].tag, _cast_bits_to_array_expr_1[0].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool_flip[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_16, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_16, eq(bits(io_alternating.array_opt_bool_flip[0].body, 0, 0), bits(_cast_bits_to_array_expr_1[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_17, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool_flip[1].tag, _cast_bits_to_array_expr_1[1].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.array_opt_bool_flip[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_17, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_17, eq(bits(io_alternating.array_opt_bool_flip[1].body, 0, 0), bits(_cast_bits_to_array_expr_1[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_18, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.struct_opt_bool.`0`.tag, _cast_bits_to_bundle_expr_9.`0`.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_18, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_18, eq(bits(io_alternating.struct_opt_bool.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_19, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.struct_opt_bool_flip.`0`.tag, _cast_bits_to_bundle_expr_9.`0`.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(io_alternating.struct_opt_bool_flip.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_19, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_19, eq(bits(io_alternating.struct_opt_bool_flip.`0`.body, 0, 0), bits(_cast_bits_to_bundle_expr_9.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_20, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.opt_bool.tag, _bundle_literal_expr_2.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.opt_bool.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_20, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_20, eq(bits(extern_child.io.opt_bool.body, 0, 0), bits(_bundle_literal_expr_2.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.opt_opt_unit.tag, _bundle_literal_expr_3.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.opt_opt_unit.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire __enum_structural_eq_29: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, __enum_structural_eq_29 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_29, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_27: Ty0 + wire _cast_bits_to_bundle_expr_flattened_19: Ty0 + connect _cast_bits_to_bundle_expr_flattened_19.tag, bits(bits(extern_child.io.opt_opt_unit.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_27.tag, _cast_bits_to_bundle_expr_flattened_19.tag + connect _cast_bits_to_bundle_expr_flattened_19.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_27.body, _cast_bits_to_bundle_expr_flattened_19.body + wire _cast_bits_to_bundle_expr_28: Ty0 + wire _cast_bits_to_bundle_expr_flattened_20: Ty0 + connect _cast_bits_to_bundle_expr_flattened_20.tag, bits(bits(_bundle_literal_expr_3.body, 0, 0), 0, 0) + connect _cast_bits_to_bundle_expr_28.tag, _cast_bits_to_bundle_expr_flattened_20.tag + connect _cast_bits_to_bundle_expr_flattened_20.body, UInt<0>(0) + connect _cast_bits_to_bundle_expr_28.body, _cast_bits_to_bundle_expr_flattened_20.body + when eq(_cast_bits_to_bundle_expr_27.tag, _cast_bits_to_bundle_expr_28.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(_cast_bits_to_bundle_expr_27.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire _cast_bits_to_bundle_expr_29: Ty5 + invalidate _cast_bits_to_bundle_expr_29 + wire _cast_bits_to_bundle_expr_30: Ty5 + invalidate _cast_bits_to_bundle_expr_30 + connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_22, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.array_opt_bool[0].tag, _array_literal_expr[0].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.array_opt_bool[0].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_22, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_22, eq(bits(extern_child.io.array_opt_bool[0].body, 0, 0), bits(_array_literal_expr[0].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_23, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.array_opt_bool[1].tag, _array_literal_expr[1].tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.array_opt_bool[1].tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_23, eq(bits(extern_child.io.array_opt_bool[1].body, 0, 0), bits(_array_literal_expr[1].body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_24, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.struct_opt_bool.`0`.tag, _bundle_literal_expr_5.`0`.tag): @[module-XXXXXXXXXX.rs 1:1] + when eq(extern_child.io.struct_opt_bool.`0`.tag, UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_24, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_24, eq(bits(extern_child.io.struct_opt_bool.`0`.body, 0, 0), bits(_bundle_literal_expr_5.`0`.body, 0, 0)) @[module-XXXXXXXXXX.rs 1:1] extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1] output io: Ty3 @[module-XXXXXXXXXX-2.rs 2:1] defname = check_deduce_structural_eq_flags_extern_child @@ -1917,12 +3730,17 @@ circuit check_deduce_structural_eq_flags_parent: type Ty3 = {tag: UInt<1>, body: UInt<0>} type Ty4 = {} type Ty5 = {tag: UInt<1>, body: UInt<1>} - type Ty6 = {io: Ty1} + type Ty6 = {`0`: UInt<2>, `1`: UInt<1>} + type Ty7 = {io: Ty1} module check_deduce_structural_eq_flags_parent: @[module-XXXXXXXXXX.rs 1:1] input io: Ty1 @[module-XXXXXXXXXX.rs 2:1] - output parent_out: Ty2 @[module-XXXXXXXXXX.rs 3:1] - output extern_child_out: Ty2 @[module-XXXXXXXXXX.rs 4:1] - output child_out: Ty2 @[module-XXXXXXXXXX.rs 5:1] + input io_zeros: Ty1 @[module-XXXXXXXXXX.rs 3:1] + input io_alternating: Ty1 @[module-XXXXXXXXXX.rs 4:1] + output parent_out: Ty2 @[module-XXXXXXXXXX.rs 5:1] + output parent_zeros_out: Ty2 @[module-XXXXXXXXXX.rs 6:1] + output parent_alternating_out: Ty2 @[module-XXXXXXXXXX.rs 7:1] + output extern_child_out: Ty2 @[module-XXXXXXXXXX.rs 8:1] + output child_out: Ty2 @[module-XXXXXXXXXX.rs 9:1] wire __enum_structural_eq: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_1: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_2: UInt<1> @[module-XXXXXXXXXX.rs 1:1] @@ -1933,8 +3751,23 @@ circuit check_deduce_structural_eq_flags_parent: wire __enum_structural_eq_7: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_8: UInt<1> @[module-XXXXXXXXXX.rs 1:1] wire __enum_structural_eq_9: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 6:1] - inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 7:1] + wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_12: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_13: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_14: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_15: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_16: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_17: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_18: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_19: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_20: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_21: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_22: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_23: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_24: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + inst extern_child of check_deduce_structural_eq_flags_extern_child @[module-XXXXXXXXXX.rs 10:1] + inst child of check_deduce_structural_eq_flags_child @[module-XXXXXXXXXX.rs 11:1] wire _bundle_literal_expr: Ty3 connect _bundle_literal_expr.tag, UInt<1>(0h1) wire _bundle_literal_expr_1: Ty4 @@ -1945,9 +3778,9 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_bundle_to_bits_expr.body, _bundle_literal_expr.body wire _cast_to_bits_expr: UInt<1> connect _cast_to_bits_expr, cat(_cast_bundle_to_bits_expr.body, _cast_bundle_to_bits_expr.tag) - connect io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 9:1] - connect parent_out.opt_unit, eq(io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 9:1] - connect parent_out.opt_unit_flip, eq(io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 9:1] + connect io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 13:1] + connect parent_out.opt_unit, eq(io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1] + connect parent_out.opt_unit_flip, eq(io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1] wire _bundle_literal_expr_2: Ty5 connect _bundle_literal_expr_2.tag, UInt<1>(0h1) connect _bundle_literal_expr_2.body, UInt<1>(0h1) @@ -1956,9 +3789,9 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_bundle_to_bits_expr_1.body, _bundle_literal_expr_2.body wire _cast_to_bits_expr_1: UInt<2> connect _cast_to_bits_expr_1, cat(_cast_bundle_to_bits_expr_1.body, _cast_bundle_to_bits_expr_1.tag) - connect io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 10:1] - connect parent_out.opt_bool, __enum_structural_eq @[module-XXXXXXXXXX.rs 10:1] - connect parent_out.opt_bool_flip, eq(io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 10:1] + connect io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 14:1] + connect parent_out.opt_bool, __enum_structural_eq @[module-XXXXXXXXXX.rs 14:1] + connect parent_out.opt_bool_flip, eq(io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1] wire _bundle_literal_expr_3: Ty5 connect _bundle_literal_expr_3.tag, UInt<1>(0h1) connect _bundle_literal_expr_3.body, _cast_to_bits_expr @@ -1967,9 +3800,9 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_bundle_to_bits_expr_2.body, _bundle_literal_expr_3.body wire _cast_to_bits_expr_2: UInt<2> connect _cast_to_bits_expr_2, cat(_cast_bundle_to_bits_expr_2.body, _cast_bundle_to_bits_expr_2.tag) - connect io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 11:1] - connect parent_out.opt_opt_unit, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 11:1] - connect parent_out.opt_opt_unit_flip, eq(io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 11:1] + connect io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 15:1] + connect parent_out.opt_opt_unit, __enum_structural_eq_1 @[module-XXXXXXXXXX.rs 15:1] + connect parent_out.opt_opt_unit_flip, eq(io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1] wire _array_literal_expr: UInt<2>[2] wire _bundle_literal_expr_4: Ty5 connect _bundle_literal_expr_4.tag, UInt<1>(0h1) @@ -1981,45 +3814,99 @@ circuit check_deduce_structural_eq_flags_parent: connect _cast_to_bits_expr_3, cat(_cast_bundle_to_bits_expr_3.body, _cast_bundle_to_bits_expr_3.tag) connect _array_literal_expr[0], _cast_to_bits_expr_3 connect _array_literal_expr[1], _cast_to_bits_expr_1 - connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect parent_out.array_opt_bool, and(__enum_structural_eq_2, __enum_structural_eq_3) @[module-XXXXXXXXXX.rs 12:1] - connect parent_out.array_opt_bool_flip, and(eq(io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 12:1] + connect io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect parent_out.array_opt_bool, and(__enum_structural_eq_2, __enum_structural_eq_3) @[module-XXXXXXXXXX.rs 16:1] + connect parent_out.array_opt_bool_flip, and(eq(io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1] wire _bundle_literal_expr_5: Ty0 connect _bundle_literal_expr_5.`0`, _cast_to_bits_expr_1 connect _bundle_literal_expr_5.`1`, UInt<1>(0h1) - connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect parent_out.struct_opt_bool, and(__enum_structural_eq_4, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect parent_out.struct_opt_bool_flip, and(eq(io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect extern_child.io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 9:1] - connect extern_child_out.opt_unit, eq(extern_child.io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 9:1] - connect extern_child_out.opt_unit_flip, eq(extern_child.io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 9:1] - connect extern_child.io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 10:1] - connect extern_child_out.opt_bool, __enum_structural_eq_5 @[module-XXXXXXXXXX.rs 10:1] - connect extern_child_out.opt_bool_flip, eq(extern_child.io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 10:1] - connect extern_child.io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 11:1] - connect extern_child_out.opt_opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 11:1] - connect extern_child_out.opt_opt_unit_flip, eq(extern_child.io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 11:1] - connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect extern_child_out.array_opt_bool, and(__enum_structural_eq_7, __enum_structural_eq_8) @[module-XXXXXXXXXX.rs 12:1] - connect extern_child_out.array_opt_bool_flip, and(eq(extern_child.io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(extern_child.io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 12:1] - connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_9, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect extern_child_out.struct_opt_bool_flip, and(eq(extern_child.io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect child.io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 9:1] - connect child_out.opt_unit, eq(child.io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 9:1] - connect child_out.opt_unit_flip, eq(child.io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 9:1] - connect child.io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 10:1] - connect child_out.opt_bool, eq(child.io.opt_bool, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 10:1] - connect child_out.opt_bool_flip, eq(child.io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 10:1] - connect child.io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 11:1] - connect child_out.opt_opt_unit, eq(child.io.opt_opt_unit, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 11:1] - connect child_out.opt_opt_unit_flip, eq(child.io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 11:1] - connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 12:1] - connect child_out.array_opt_bool, and(eq(child.io.array_opt_bool[0], _array_literal_expr[0]), eq(child.io.array_opt_bool[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 12:1] - connect child_out.array_opt_bool_flip, and(eq(child.io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(child.io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 12:1] - connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 13:1] - connect child_out.struct_opt_bool, and(eq(child.io.struct_opt_bool.`0`, _bundle_literal_expr_5.`0`), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] - connect child_out.struct_opt_bool_flip, and(eq(child.io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 13:1] + connect io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect parent_out.struct_opt_bool, and(__enum_structural_eq_4, eq(io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect parent_out.struct_opt_bool_flip, and(eq(io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect io_zeros.opt_unit_flip, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 13:1] + connect parent_zeros_out.opt_unit, eq(io_zeros.opt_unit, UInt<1>(0h0)) @[module-XXXXXXXXXX.rs 13:1] + connect parent_zeros_out.opt_unit_flip, eq(io_zeros.opt_unit_flip, UInt<1>(0h0)) @[module-XXXXXXXXXX.rs 13:1] + connect io_zeros.opt_bool_flip, UInt<2>(0h0) @[module-XXXXXXXXXX.rs 14:1] + connect parent_zeros_out.opt_bool, __enum_structural_eq_5 @[module-XXXXXXXXXX.rs 14:1] + connect parent_zeros_out.opt_bool_flip, eq(io_zeros.opt_bool_flip, UInt<2>(0h0)) @[module-XXXXXXXXXX.rs 14:1] + connect io_zeros.opt_opt_unit_flip, UInt<2>(0h0) @[module-XXXXXXXXXX.rs 15:1] + connect parent_zeros_out.opt_opt_unit, __enum_structural_eq_6 @[module-XXXXXXXXXX.rs 15:1] + connect parent_zeros_out.opt_opt_unit_flip, eq(io_zeros.opt_opt_unit_flip, UInt<2>(0h0)) @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr: UInt<2>[2] + wire _cast_bits_to_array_expr_flattened: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened[0], bits(UInt<4>(0h0), 1, 0) + connect _cast_bits_to_array_expr[0], _cast_bits_to_array_expr_flattened[0] + connect _cast_bits_to_array_expr_flattened[1], bits(UInt<4>(0h0), 3, 2) + connect _cast_bits_to_array_expr[1], _cast_bits_to_array_expr_flattened[1] + connect io_zeros.array_opt_bool_flip, _cast_bits_to_array_expr @[module-XXXXXXXXXX.rs 16:1] + connect parent_zeros_out.array_opt_bool, and(__enum_structural_eq_7, __enum_structural_eq_8) @[module-XXXXXXXXXX.rs 16:1] + connect parent_zeros_out.array_opt_bool_flip, and(eq(io_zeros.array_opt_bool_flip[0], _cast_bits_to_array_expr[0]), eq(io_zeros.array_opt_bool_flip[1], _cast_bits_to_array_expr[1])) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr: Ty0 + wire _cast_bits_to_bundle_expr_flattened: Ty6 + connect _cast_bits_to_bundle_expr_flattened.`0`, bits(UInt<3>(0h0), 1, 0) + connect _cast_bits_to_bundle_expr.`0`, _cast_bits_to_bundle_expr_flattened.`0` + connect _cast_bits_to_bundle_expr_flattened.`1`, bits(UInt<3>(0h0), 2, 2) + connect _cast_bits_to_bundle_expr.`1`, _cast_bits_to_bundle_expr_flattened.`1` + connect io_zeros.struct_opt_bool_flip, _cast_bits_to_bundle_expr @[module-XXXXXXXXXX.rs 17:1] + connect parent_zeros_out.struct_opt_bool, and(__enum_structural_eq_9, eq(io_zeros.struct_opt_bool.`1`, _cast_bits_to_bundle_expr.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect parent_zeros_out.struct_opt_bool_flip, and(eq(io_zeros.struct_opt_bool_flip.`0`, _cast_bits_to_bundle_expr.`0`), eq(io_zeros.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect io_alternating.opt_unit_flip, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 13:1] + connect parent_alternating_out.opt_unit, eq(io_alternating.opt_unit, UInt<1>(0h0)) @[module-XXXXXXXXXX.rs 13:1] + connect parent_alternating_out.opt_unit_flip, eq(io_alternating.opt_unit_flip, UInt<1>(0h0)) @[module-XXXXXXXXXX.rs 13:1] + connect io_alternating.opt_bool_flip, UInt<2>(0h2) @[module-XXXXXXXXXX.rs 14:1] + connect parent_alternating_out.opt_bool, __enum_structural_eq_10 @[module-XXXXXXXXXX.rs 14:1] + connect parent_alternating_out.opt_bool_flip, __enum_structural_eq_11 @[module-XXXXXXXXXX.rs 14:1] + connect io_alternating.opt_opt_unit_flip, UInt<2>(0h2) @[module-XXXXXXXXXX.rs 15:1] + connect parent_alternating_out.opt_opt_unit, __enum_structural_eq_12 @[module-XXXXXXXXXX.rs 15:1] + connect parent_alternating_out.opt_opt_unit_flip, __enum_structural_eq_13 @[module-XXXXXXXXXX.rs 15:1] + wire _cast_bits_to_array_expr_1: UInt<2>[2] + wire _cast_bits_to_array_expr_flattened_1: UInt<2>[2] + connect _cast_bits_to_array_expr_flattened_1[0], bits(UInt<4>(0hA), 1, 0) + connect _cast_bits_to_array_expr_1[0], _cast_bits_to_array_expr_flattened_1[0] + connect _cast_bits_to_array_expr_flattened_1[1], bits(UInt<4>(0hA), 3, 2) + connect _cast_bits_to_array_expr_1[1], _cast_bits_to_array_expr_flattened_1[1] + connect io_alternating.array_opt_bool_flip, _cast_bits_to_array_expr_1 @[module-XXXXXXXXXX.rs 16:1] + connect parent_alternating_out.array_opt_bool, and(__enum_structural_eq_14, __enum_structural_eq_15) @[module-XXXXXXXXXX.rs 16:1] + connect parent_alternating_out.array_opt_bool_flip, and(__enum_structural_eq_16, __enum_structural_eq_17) @[module-XXXXXXXXXX.rs 16:1] + wire _cast_bits_to_bundle_expr_1: Ty0 + wire _cast_bits_to_bundle_expr_flattened_1: Ty6 + connect _cast_bits_to_bundle_expr_flattened_1.`0`, bits(UInt<3>(0h2), 1, 0) + connect _cast_bits_to_bundle_expr_1.`0`, _cast_bits_to_bundle_expr_flattened_1.`0` + connect _cast_bits_to_bundle_expr_flattened_1.`1`, bits(UInt<3>(0h2), 2, 2) + connect _cast_bits_to_bundle_expr_1.`1`, _cast_bits_to_bundle_expr_flattened_1.`1` + connect io_alternating.struct_opt_bool_flip, _cast_bits_to_bundle_expr_1 @[module-XXXXXXXXXX.rs 17:1] + connect parent_alternating_out.struct_opt_bool, and(__enum_structural_eq_18, eq(io_alternating.struct_opt_bool.`1`, _cast_bits_to_bundle_expr_1.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect parent_alternating_out.struct_opt_bool_flip, and(__enum_structural_eq_19, eq(io_alternating.struct_opt_bool_flip.`1`, _cast_bits_to_bundle_expr_1.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect extern_child.io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 13:1] + connect extern_child_out.opt_unit, eq(extern_child.io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1] + connect extern_child_out.opt_unit_flip, eq(extern_child.io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1] + connect extern_child.io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 14:1] + connect extern_child_out.opt_bool, __enum_structural_eq_20 @[module-XXXXXXXXXX.rs 14:1] + connect extern_child_out.opt_bool_flip, eq(extern_child.io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1] + connect extern_child.io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 15:1] + connect extern_child_out.opt_opt_unit, __enum_structural_eq_21 @[module-XXXXXXXXXX.rs 15:1] + connect extern_child_out.opt_opt_unit_flip, eq(extern_child.io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1] + connect extern_child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect extern_child_out.array_opt_bool, and(__enum_structural_eq_22, __enum_structural_eq_23) @[module-XXXXXXXXXX.rs 16:1] + connect extern_child_out.array_opt_bool_flip, and(eq(extern_child.io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(extern_child.io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1] + connect extern_child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect extern_child_out.struct_opt_bool, and(__enum_structural_eq_24, eq(extern_child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect extern_child_out.struct_opt_bool_flip, and(eq(extern_child.io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(extern_child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect child.io.opt_unit_flip, _cast_to_bits_expr @[module-XXXXXXXXXX.rs 13:1] + connect child_out.opt_unit, eq(child.io.opt_unit, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1] + connect child_out.opt_unit_flip, eq(child.io.opt_unit_flip, _cast_to_bits_expr) @[module-XXXXXXXXXX.rs 13:1] + connect child.io.opt_bool_flip, _cast_to_bits_expr_1 @[module-XXXXXXXXXX.rs 14:1] + connect child_out.opt_bool, eq(child.io.opt_bool, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1] + connect child_out.opt_bool_flip, eq(child.io.opt_bool_flip, _cast_to_bits_expr_1) @[module-XXXXXXXXXX.rs 14:1] + connect child.io.opt_opt_unit_flip, _cast_to_bits_expr_2 @[module-XXXXXXXXXX.rs 15:1] + connect child_out.opt_opt_unit, eq(child.io.opt_opt_unit, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1] + connect child_out.opt_opt_unit_flip, eq(child.io.opt_opt_unit_flip, _cast_to_bits_expr_2) @[module-XXXXXXXXXX.rs 15:1] + connect child.io.array_opt_bool_flip, _array_literal_expr @[module-XXXXXXXXXX.rs 16:1] + connect child_out.array_opt_bool, and(eq(child.io.array_opt_bool[0], _array_literal_expr[0]), eq(child.io.array_opt_bool[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1] + connect child_out.array_opt_bool_flip, and(eq(child.io.array_opt_bool_flip[0], _array_literal_expr[0]), eq(child.io.array_opt_bool_flip[1], _array_literal_expr[1])) @[module-XXXXXXXXXX.rs 16:1] + connect child.io.struct_opt_bool_flip, _bundle_literal_expr_5 @[module-XXXXXXXXXX.rs 17:1] + connect child_out.struct_opt_bool, and(eq(child.io.struct_opt_bool.`0`, _bundle_literal_expr_5.`0`), eq(child.io.struct_opt_bool.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] + connect child_out.struct_opt_bool_flip, and(eq(child.io.struct_opt_bool_flip.`0`, _bundle_literal_expr_5.`0`), eq(child.io.struct_opt_bool_flip.`1`, _bundle_literal_expr_5.`1`)) @[module-XXXXXXXXXX.rs 17:1] connect __enum_structural_eq, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] when eq(bits(io.opt_bool, 0, 0), bits(_cast_to_bits_expr_1, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] when eq(bits(io.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] @@ -2031,18 +3918,18 @@ circuit check_deduce_structural_eq_flags_parent: when eq(bits(io.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_1, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire __enum_structural_eq_10: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_1, __enum_structural_eq_10 @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_25: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_1, __enum_structural_eq_25 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_25, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] when eq(bits(bits(bits(io.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(_cast_to_bits_expr_2, 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] when eq(bits(bits(bits(io.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire _cast_bits_to_bundle_expr: Ty4 - invalidate _cast_bits_to_bundle_expr - wire _cast_bits_to_bundle_expr_1: Ty4 - invalidate _cast_bits_to_bundle_expr_1 - connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_2: Ty4 + invalidate _cast_bits_to_bundle_expr_2 + wire _cast_bits_to_bundle_expr_3: Ty4 + invalidate _cast_bits_to_bundle_expr_3 + connect __enum_structural_eq_25, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_2, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] when eq(bits(io.array_opt_bool[0], 0, 0), bits(_array_literal_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] when eq(bits(io.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] @@ -2062,46 +3949,169 @@ circuit check_deduce_structural_eq_flags_parent: else: connect __enum_structural_eq_4, eq(bits(bits(io.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_bundle_literal_expr_5.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_5, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.opt_bool, 0, 0), bits(_cast_to_bits_expr_1, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.opt_bool, 0, 0), bits(UInt<2>(0h0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_5, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_5, eq(bits(bits(extern_child.io.opt_bool, 1, 1), 0, 0), bits(bits(_cast_to_bits_expr_1, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_5, eq(bits(bits(io_zeros.opt_bool, 1, 1), 0, 0), bits(bits(UInt<2>(0h0), 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_6, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.opt_opt_unit, 0, 0), bits(_cast_to_bits_expr_2, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.opt_opt_unit, 0, 0), bits(UInt<2>(0h0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_6, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire __enum_structural_eq_11: UInt<1> @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_6, __enum_structural_eq_11 @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(bits(bits(extern_child.io.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(_cast_to_bits_expr_2, 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(bits(bits(extern_child.io.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] - connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire __enum_structural_eq_26: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_6, __enum_structural_eq_26 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_26, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(io_zeros.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(UInt<2>(0h0), 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(io_zeros.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - wire _cast_bits_to_bundle_expr_2: Ty4 - invalidate _cast_bits_to_bundle_expr_2 - wire _cast_bits_to_bundle_expr_3: Ty4 - invalidate _cast_bits_to_bundle_expr_3 - connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + wire _cast_bits_to_bundle_expr_4: Ty4 + invalidate _cast_bits_to_bundle_expr_4 + wire _cast_bits_to_bundle_expr_5: Ty4 + invalidate _cast_bits_to_bundle_expr_5 + connect __enum_structural_eq_26, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_7, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.array_opt_bool[0], 0, 0), bits(_array_literal_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.array_opt_bool[0], 0, 0), bits(_cast_bits_to_array_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_7, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_7, eq(bits(bits(extern_child.io.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_array_literal_expr[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_7, eq(bits(bits(io_zeros.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_8, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.array_opt_bool[1], 0, 0), bits(_array_literal_expr[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.array_opt_bool[1], 0, 0), bits(_cast_bits_to_array_expr[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_8, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_8, eq(bits(bits(extern_child.io.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_array_literal_expr[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_8, eq(bits(bits(io_zeros.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_9, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.struct_opt_bool.`0`, 0, 0), bits(_bundle_literal_expr_5.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] - when eq(bits(extern_child.io.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.struct_opt_bool.`0`, 0, 0), bits(_cast_bits_to_bundle_expr.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_zeros.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] connect __enum_structural_eq_9, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] else: - connect __enum_structural_eq_9, eq(bits(bits(extern_child.io.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_bundle_literal_expr_5.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_9, eq(bits(bits(io_zeros.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_cast_bits_to_bundle_expr.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_10, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_bool, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_10, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_10, eq(bits(bits(io_alternating.opt_bool, 1, 1), 0, 0), bits(bits(UInt<2>(0h2), 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_11, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_bool_flip, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_bool_flip, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_11, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_11, eq(bits(bits(io_alternating.opt_bool_flip, 1, 1), 0, 0), bits(bits(UInt<2>(0h2), 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_opt_unit, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire __enum_structural_eq_27: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_12, __enum_structural_eq_27 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_27, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(io_alternating.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(UInt<2>(0h2), 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(io_alternating.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire _cast_bits_to_bundle_expr_6: Ty4 + invalidate _cast_bits_to_bundle_expr_6 + wire _cast_bits_to_bundle_expr_7: Ty4 + invalidate _cast_bits_to_bundle_expr_7 + connect __enum_structural_eq_27, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_opt_unit_flip, 0, 0), bits(UInt<2>(0h2), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.opt_opt_unit_flip, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire __enum_structural_eq_28: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_13, __enum_structural_eq_28 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_28, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(io_alternating.opt_opt_unit_flip, 1, 1), 0, 0), 0, 0), bits(bits(bits(UInt<2>(0h2), 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(io_alternating.opt_opt_unit_flip, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire _cast_bits_to_bundle_expr_8: Ty4 + invalidate _cast_bits_to_bundle_expr_8 + wire _cast_bits_to_bundle_expr_9: Ty4 + invalidate _cast_bits_to_bundle_expr_9 + connect __enum_structural_eq_28, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_14, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool[0], 0, 0), bits(_cast_bits_to_array_expr_1[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_14, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_14, eq(bits(bits(io_alternating.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_15, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool[1], 0, 0), bits(_cast_bits_to_array_expr_1[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_15, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_15, eq(bits(bits(io_alternating.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_16, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool_flip[0], 0, 0), bits(_cast_bits_to_array_expr_1[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool_flip[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_16, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_16, eq(bits(bits(io_alternating.array_opt_bool_flip[0], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_17, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool_flip[1], 0, 0), bits(_cast_bits_to_array_expr_1[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.array_opt_bool_flip[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_17, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_17, eq(bits(bits(io_alternating.array_opt_bool_flip[1], 1, 1), 0, 0), bits(bits(_cast_bits_to_array_expr_1[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_18, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.struct_opt_bool.`0`, 0, 0), bits(_cast_bits_to_bundle_expr_1.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_18, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_18, eq(bits(bits(io_alternating.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_cast_bits_to_bundle_expr_1.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_19, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.struct_opt_bool_flip.`0`, 0, 0), bits(_cast_bits_to_bundle_expr_1.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(io_alternating.struct_opt_bool_flip.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_19, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_19, eq(bits(bits(io_alternating.struct_opt_bool_flip.`0`, 1, 1), 0, 0), bits(bits(_cast_bits_to_bundle_expr_1.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_20, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.opt_bool, 0, 0), bits(_cast_to_bits_expr_1, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.opt_bool, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_20, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_20, eq(bits(bits(extern_child.io.opt_bool, 1, 1), 0, 0), bits(bits(_cast_to_bits_expr_1, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.opt_opt_unit, 0, 0), bits(_cast_to_bits_expr_2, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.opt_opt_unit, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire __enum_structural_eq_29: UInt<1> @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_21, __enum_structural_eq_29 @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_29, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(extern_child.io.opt_opt_unit, 1, 1), 0, 0), 0, 0), bits(bits(bits(_cast_to_bits_expr_2, 1, 1), 0, 0), 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(bits(bits(extern_child.io.opt_opt_unit, 1, 1), 0, 0), 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + wire _cast_bits_to_bundle_expr_10: Ty4 + invalidate _cast_bits_to_bundle_expr_10 + wire _cast_bits_to_bundle_expr_11: Ty4 + invalidate _cast_bits_to_bundle_expr_11 + connect __enum_structural_eq_29, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_22, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.array_opt_bool[0], 0, 0), bits(_array_literal_expr[0], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.array_opt_bool[0], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_22, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_22, eq(bits(bits(extern_child.io.array_opt_bool[0], 1, 1), 0, 0), bits(bits(_array_literal_expr[0], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_23, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.array_opt_bool[1], 0, 0), bits(_array_literal_expr[1], 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.array_opt_bool[1], 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_23, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_23, eq(bits(bits(extern_child.io.array_opt_bool[1], 1, 1), 0, 0), bits(bits(_array_literal_expr[1], 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_24, UInt<1>(0h0) @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.struct_opt_bool.`0`, 0, 0), bits(_bundle_literal_expr_5.`0`, 0, 0)): @[module-XXXXXXXXXX.rs 1:1] + when eq(bits(extern_child.io.struct_opt_bool.`0`, 0, 0), UInt<1>(0h0)): @[module-XXXXXXXXXX.rs 1:1] + connect __enum_structural_eq_24, UInt<1>(0h1) @[module-XXXXXXXXXX.rs 1:1] + else: + connect __enum_structural_eq_24, eq(bits(bits(extern_child.io.struct_opt_bool.`0`, 1, 1), 0, 0), bits(bits(_bundle_literal_expr_5.`0`, 1, 1), 0, 0)) @[module-XXXXXXXXXX.rs 1:1] extmodule check_deduce_structural_eq_flags_extern_child: @[module-XXXXXXXXXX-2.rs 1:1] output io: Ty1 @[module-XXXXXXXXXX-2.rs 2:1] defname = check_deduce_structural_eq_flags_extern_child