fix Simulator panicking when you use PhantomConst
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SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
11 changed files with 756 additions and 55 deletions
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@ -300,9 +300,7 @@ macro_rules! define_uint_in_range_type {
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}
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}
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pub fn new(start: Start::SizeType, end: End::SizeType) -> Self {
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Self::from_phantom_const_range(PhantomConst::new(
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$SerdeRange { start, end }.intern_sized(),
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))
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Self::from_phantom_const_range(PhantomConst::new_sized($SerdeRange { start, end }))
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}
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pub fn bit_width(self) -> usize {
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self.value.width()
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@ -152,7 +152,7 @@ pub use fayalite_proc_macros::hdl_module;
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/// This allows you to use some computed property of a [`PhantomConst`] to get a [`Type`] that you can use in other #[hdl] types.
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///
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/// ```
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/// # use fayalite::{intern::Intern, prelude::*};
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/// # use fayalite::prelude::*;
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/// #[derive(Clone, PartialEq, Eq, Hash, Debug, serde::Serialize, serde::Deserialize)]
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/// pub struct Config {
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/// pub foo: usize,
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@ -172,7 +172,7 @@ pub use fayalite_proc_macros::hdl_module;
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///
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/// // you can then use Fayalite's standard syntax for creating dynamic types at runtime:
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/// let bar = Bundle::new(Default::default());
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/// let config = PhantomConst::new(Config { foo: 12, bar }.intern_sized());
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/// let config = PhantomConst::new_sized(Config { foo: 12, bar });
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/// let ty = WrapMyArray[config];
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/// assert_eq!(ty.my_array, Array[bar][12]);
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/// ```
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@ -182,7 +182,7 @@ pub use fayalite_proc_macros::hdl_module;
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/// This allows you to use some computed property of a [`PhantomConst`] to get a [`Size`] that you can use in other #[hdl] types.
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///
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/// ```
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/// # use fayalite::{intern::Intern, prelude::*};
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/// # use fayalite::prelude::*;
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/// # #[derive(Clone, PartialEq, Eq, Hash, Debug, serde::Serialize, serde::Deserialize)]
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/// # pub struct ConfigItem {}
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/// # impl ConfigItem {
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@ -207,7 +207,7 @@ pub use fayalite_proc_macros::hdl_module;
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/// }
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///
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/// // you can then use Fayalite's standard syntax for creating dynamic types at runtime:
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/// let config = PhantomConst::new(Config { items: vec![ConfigItem::new(); 5] }.intern_sized());
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/// let config = PhantomConst::new_sized(Config { items: vec![ConfigItem::new(); 5] });
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/// let ty = FlagPerItem[config];
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/// assert_eq!(ty.flags, Array[Bool][5]);
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/// ```
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@ -131,7 +131,7 @@ impl<T: Type + PhantomConstValue> Index<T> for PhantomConstWithoutGenerics {
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type Output = PhantomConst<T>;
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fn index(&self, value: T) -> &Self::Output {
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Interned::into_inner(PhantomConst::new(value.intern()).intern_sized())
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Interned::into_inner(PhantomConst::new(&value).intern_sized())
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}
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}
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@ -222,11 +222,26 @@ impl<T: ?Sized + PhantomConstValue> Memoize for PhantomConstCanonicalMemoize<T,
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}
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impl<T: ?Sized + PhantomConstValue> PhantomConst<T> {
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pub fn new(value: Interned<T>) -> Self {
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pub fn new_interned(value: Interned<T>) -> Self {
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Self {
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value: LazyInterned::Interned(value),
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}
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}
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pub fn new_sized(value: T) -> Self
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where
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T: Clone,
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{
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Self::new_interned(value.intern_sized())
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}
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pub fn new(value: &T) -> Self {
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Self::new_interned(value.intern())
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}
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pub fn new_deref<U: Intern + std::ops::Deref<Target = T>>(value: U) -> Self
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where
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T: ToOwned<Owned = U>,
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{
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Self::new_interned(value.intern_deref())
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}
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pub const fn new_lazy(v: &'static dyn LazyInternedTrait<T>) -> Self {
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Self {
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value: LazyInterned::new_lazy(v),
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@ -245,7 +260,7 @@ impl<T: ?Sized + PhantomConstValue> PhantomConst<T> {
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if let Some(&retval) = <dyn Any>::downcast_ref::<PhantomConst>(&self) {
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return retval;
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}
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<PhantomConst>::new(
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<PhantomConst>::new_interned(
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PhantomConstCanonicalMemoize::<T, false>(PhantomData).get_owned(self.get()),
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)
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}
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@ -253,7 +268,7 @@ impl<T: ?Sized + PhantomConstValue> PhantomConst<T> {
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if let Some(&retval) = <dyn Any>::downcast_ref::<Self>(&canonical_type) {
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return retval;
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}
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Self::new(
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Self::new_interned(
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PhantomConstCanonicalMemoize::<T, true>(PhantomData).get_owned(canonical_type.get()),
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)
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}
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@ -346,7 +361,9 @@ impl<'de, T: ?Sized + PhantomConstValue> Deserialize<'de> for PhantomConst<T> {
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D: Deserializer<'de>,
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{
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match SerdeType::<T>::deserialize(deserializer)? {
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SerdeCanonicalType::PhantomConst(SerdePhantomConst(value)) => Ok(Self::new(value)),
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SerdeCanonicalType::PhantomConst(SerdePhantomConst(value)) => {
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Ok(Self::new_interned(value))
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}
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ty => Err(Error::invalid_value(
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serde::de::Unexpected::Other(ty.as_serde_unexpected_str()),
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&"a PhantomConst",
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@ -1,7 +1,7 @@
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// SPDX-License-Identifier: LGPL-3.0-or-later
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// See Notices.txt for copyright information
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use crate::{intern::Intern, prelude::*};
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use crate::prelude::*;
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use ordered_float::NotNan;
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use serde::{Deserialize, Serialize};
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@ -26,12 +26,9 @@ impl ClockInput {
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);
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Self {
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clk: Clock,
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properties: PhantomConst::new(
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ClockInputProperties {
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frequency: NotNan::new(frequency).expect("just checked"),
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}
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.intern_sized(),
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),
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properties: PhantomConst::new_sized(ClockInputProperties {
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frequency: NotNan::new(frequency).expect("just checked"),
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}),
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}
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}
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pub fn frequency(self) -> f64 {
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@ -416,6 +416,15 @@ impl_trace_decl! {
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name: Interned<str>,
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flow: Flow,
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}),
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PhantomConst(TracePhantomConst {
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fn location(self) -> _ {
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self.location
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}
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location: TraceLocation,
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name: Interned<str>,
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ty: PhantomConst,
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flow: Flow,
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}),
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SimOnly(TraceSimOnly {
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fn location(self) -> _ {
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self.location
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@ -526,6 +535,11 @@ pub trait TraceWriter: fmt::Debug + 'static {
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variant_index: usize,
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ty: Enum,
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) -> Result<(), Self::Error>;
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fn set_signal_phantom_const(
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&mut self,
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id: TraceScalarId,
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ty: PhantomConst,
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) -> Result<(), Self::Error>;
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fn set_signal_sim_only_value(
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&mut self,
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id: TraceScalarId,
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@ -585,6 +599,11 @@ trait TraceWriterDynTrait: fmt::Debug + 'static {
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variant_index: usize,
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ty: Enum,
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) -> std::io::Result<()>;
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fn set_signal_phantom_const_dyn(
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&mut self,
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id: TraceScalarId,
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ty: PhantomConst,
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) -> std::io::Result<()>;
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fn set_signal_sim_only_value_dyn(
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&mut self,
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id: TraceScalarId,
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@ -649,6 +668,13 @@ impl<T: TraceWriter> TraceWriterDynTrait for T {
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.map_err(err_into_io)?,
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)
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}
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fn set_signal_phantom_const_dyn(
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&mut self,
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id: TraceScalarId,
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ty: PhantomConst,
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) -> std::io::Result<()> {
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Ok(TraceWriter::set_signal_phantom_const(self, id, ty).map_err(err_into_io)?)
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}
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fn set_signal_sim_only_value_dyn(
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&mut self,
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id: TraceScalarId,
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@ -720,6 +746,13 @@ impl TraceWriter for DynTraceWriter {
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self.0
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.set_signal_enum_discriminant_dyn(id, variant_index, ty)
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}
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fn set_signal_phantom_const(
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&mut self,
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id: TraceScalarId,
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ty: PhantomConst,
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) -> Result<(), Self::Error> {
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self.0.set_signal_phantom_const_dyn(id, ty)
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}
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fn set_signal_sim_only_value(
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&mut self,
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id: TraceScalarId,
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@ -895,12 +928,16 @@ pub(crate) enum SimTraceKind {
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index: StatePartIndex<StatePartKindSimOnlySlots>,
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ty: DynSimOnly,
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},
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PhantomConst {
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ty: PhantomConst,
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},
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}
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#[derive(PartialEq, Eq)]
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pub(crate) enum SimTraceState {
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Bits(BitVec),
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SimOnly(DynSimOnlyValue),
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PhantomConst,
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}
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impl Clone for SimTraceState {
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@ -908,6 +945,7 @@ impl Clone for SimTraceState {
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match self {
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Self::Bits(v) => Self::Bits(v.clone()),
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Self::SimOnly(v) => Self::SimOnly(v.clone()),
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Self::PhantomConst => Self::PhantomConst,
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}
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}
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fn clone_from(&mut self, source: &Self) {
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@ -956,6 +994,7 @@ impl fmt::Debug for SimTraceState {
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match self {
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SimTraceState::Bits(v) => BitSliceWriteWithBase(v).fmt(f),
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SimTraceState::SimOnly(v) => v.fmt(f),
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SimTraceState::PhantomConst => f.debug_tuple("PhantomConst").finish(),
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}
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}
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}
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@ -982,6 +1021,7 @@ impl SimTraceKind {
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SimTraceKind::EnumDiscriminant { index: _, ty } => {
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SimTraceState::Bits(BitVec::repeat(false, ty.discriminant_bit_width()))
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}
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SimTraceKind::PhantomConst { .. } => SimTraceState::PhantomConst,
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SimTraceKind::SimOnly { index: _, ty } => SimTraceState::SimOnly(ty.default_value()),
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}
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}
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@ -1097,6 +1137,7 @@ impl SimulationModuleState {
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true
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}
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}
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CompiledTypeLayoutBody::PhantomConst => false,
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CompiledTypeLayoutBody::Bundle { .. } => {
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let value = value.map_ty(Bundle::from_canonical);
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let mut sub_targets = Vec::new();
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@ -1910,6 +1951,9 @@ impl SimulationImpl {
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ty,
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)?;
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}
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SimTraceKind::PhantomConst { ty } => {
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trace_writer.set_signal_phantom_const(id, ty)?
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}
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SimTraceKind::SimOnly { .. } => {
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trace_writer.set_signal_sim_only_value(id, state.unwrap_sim_only_ref())?
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}
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@ -1980,6 +2024,7 @@ impl SimulationImpl {
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.unwrap_bits_mut()
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.set(0, self.state.small_slots[index] != 0);
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}
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SimTraceKind::PhantomConst { .. } => {}
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SimTraceKind::SimOnly { index, ty: _ } => {
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state
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.unwrap_sim_only_mut()
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@ -2545,6 +2590,7 @@ impl SimulationImpl {
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);
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}
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}
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CompiledTypeLayoutBody::PhantomConst => {}
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CompiledTypeLayoutBody::Bundle { fields } => {
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let ty = Bundle::from_canonical(compiled_value.layout.ty);
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for (
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@ -28,8 +28,8 @@ use crate::{
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ExternModuleSimulation, SimTrace, SimTraceKind, SimTraces, TraceArray, TraceAsyncReset,
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TraceBool, TraceBundle, TraceClock, TraceDecl, TraceEnumDiscriminant, TraceEnumWithFields,
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TraceFieldlessEnum, TraceInstance, TraceLocation, TraceMem, TraceMemPort, TraceMemoryId,
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TraceMemoryLocation, TraceModule, TraceModuleIO, TraceReg, TraceSInt, TraceScalarId,
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TraceScope, TraceSimOnly, TraceSyncReset, TraceUInt, TraceWire,
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TraceMemoryLocation, TraceModule, TraceModuleIO, TracePhantomConst, TraceReg, TraceSInt,
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TraceScalarId, TraceScope, TraceSimOnly, TraceSyncReset, TraceUInt, TraceWire,
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interpreter::{
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Insn, InsnField, InsnFieldKind, InsnFieldType, InsnOrLabel, Insns, InsnsBuilding,
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InsnsBuildingDone, InsnsBuildingKind, Label, SmallUInt, StatePartArrayIndex,
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@ -85,6 +85,7 @@ pub(crate) struct CompiledBundleField {
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#[derive(Debug, PartialEq, Eq, Hash, Clone, Copy)]
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pub(crate) enum CompiledTypeLayoutBody {
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Scalar,
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PhantomConst,
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Array {
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/// debug names are ignored, use parent's layout instead
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element: Interned<CompiledTypeLayout<CanonicalType>>,
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@ -165,14 +166,11 @@ impl<T: Type> CompiledTypeLayout<T> {
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body: CompiledTypeLayoutBody::Array { element },
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}
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}
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CanonicalType::PhantomConst(_) => {
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let unit_layout = CompiledTypeLayout::get(());
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CompiledTypeLayout {
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ty: *input,
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layout: unit_layout.layout,
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body: unit_layout.body,
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}
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}
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CanonicalType::PhantomConst(_) => CompiledTypeLayout {
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ty: *input,
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layout: TypeLayout::empty(),
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body: CompiledTypeLayoutBody::PhantomConst,
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},
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CanonicalType::Bundle(bundle) => {
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let mut layout = TypeLayout::empty();
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let fields = bundle
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@ -1681,18 +1679,23 @@ macro_rules! impl_compiler {
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instantiated_module: InstantiatedModule,
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target: MakeTraceDeclTarget,
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source_location: SourceLocation,
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empty_kind: impl FnOnce() -> SimTraceKind,
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$($type_singular_field: impl FnOnce(StatePartIndex<$type_kind>) -> SimTraceKind,)*
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) -> TraceLocation {
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match target {
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MakeTraceDeclTarget::Expr(target) => {
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let compiled_value = self.compile_expr(instantiated_module, target);
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let compiled_value = self.compiled_expr_to_value(compiled_value, source_location);
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TraceLocation::Scalar(self.new_sim_trace(match compiled_value.range.len().as_single() {
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$(Some(TypeLenSingle::$type_singular_variant) => {
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$type_singular_field(compiled_value.range.$type_plural_field.start)
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})*
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None => unreachable!(),
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}))
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if compiled_value.range.is_empty() {
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TraceLocation::Scalar(self.new_sim_trace(empty_kind()))
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} else {
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TraceLocation::Scalar(self.new_sim_trace(match compiled_value.range.len().as_single() {
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$(Some(TypeLenSingle::$type_singular_variant) => {
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$type_singular_field(compiled_value.range.$type_plural_field.start)
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})*
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None => unreachable!(),
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}))
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}
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}
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MakeTraceDeclTarget::Memory {
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id,
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@ -1723,9 +1726,10 @@ macro_rules! impl_compiler {
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instantiated_module,
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target,
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source_location,
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|| unreachable!(),
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|index| SimTraceKind::SmallUInt { index, ty },
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|index| SimTraceKind::BigUInt { index, ty },
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|_| unreachable!(""),
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|_| unreachable!(),
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),
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name,
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ty,
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|
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@ -1737,9 +1741,10 @@ macro_rules! impl_compiler {
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instantiated_module,
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target,
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source_location,
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|| unreachable!(),
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|index| SimTraceKind::SmallSInt { index, ty },
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|index| SimTraceKind::BigSInt { index, ty },
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|_| unreachable!(""),
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|_| unreachable!(),
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),
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name,
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ty,
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|
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@ -1751,9 +1756,10 @@ macro_rules! impl_compiler {
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instantiated_module,
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target,
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source_location,
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|| unreachable!(),
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|index| SimTraceKind::SmallBool { index },
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|index| SimTraceKind::BigBool { index },
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|_| unreachable!(""),
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|_| unreachable!(),
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),
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name,
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flow,
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@ -1798,15 +1804,16 @@ macro_rules! impl_compiler {
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}
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.into()
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}
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CanonicalType::Bundle(_) | CanonicalType::PhantomConst(_) => unreachable!(),
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CanonicalType::Bundle(_) => unreachable!(),
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CanonicalType::AsyncReset(_) => TraceAsyncReset {
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location: self.make_trace_scalar_helper(
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instantiated_module,
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target,
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source_location,
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|| unreachable!(),
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|index| SimTraceKind::SmallAsyncReset { index },
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|index| SimTraceKind::BigAsyncReset { index },
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|_| unreachable!(""),
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|_| unreachable!(),
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),
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name,
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flow,
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|
|
@ -1817,9 +1824,10 @@ macro_rules! impl_compiler {
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instantiated_module,
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target,
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source_location,
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|| unreachable!(),
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|index| SimTraceKind::SmallSyncReset { index },
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|index| SimTraceKind::BigSyncReset { index },
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|_| unreachable!(""),
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|_| unreachable!(),
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),
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name,
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flow,
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|
|
@ -1831,21 +1839,38 @@ macro_rules! impl_compiler {
|
|||
instantiated_module,
|
||||
target,
|
||||
source_location,
|
||||
|| unreachable!(),
|
||||
|index| SimTraceKind::SmallClock { index },
|
||||
|index| SimTraceKind::BigClock { index },
|
||||
|_| unreachable!(""),
|
||||
|_| unreachable!(),
|
||||
),
|
||||
name,
|
||||
flow,
|
||||
}
|
||||
.into(),
|
||||
CanonicalType::PhantomConst(ty) => TracePhantomConst {
|
||||
location: self.make_trace_scalar_helper(
|
||||
instantiated_module,
|
||||
target,
|
||||
source_location,
|
||||
|| SimTraceKind::PhantomConst { ty },
|
||||
|_| unreachable!(),
|
||||
|_| unreachable!(),
|
||||
|_| unreachable!(),
|
||||
),
|
||||
name,
|
||||
ty,
|
||||
flow,
|
||||
}
|
||||
.into(),
|
||||
CanonicalType::DynSimOnly(ty) => TraceSimOnly {
|
||||
location: self.make_trace_scalar_helper(
|
||||
instantiated_module,
|
||||
target,
|
||||
source_location,
|
||||
|_| unreachable!(""),
|
||||
|_| unreachable!(""),
|
||||
|| unreachable!(),
|
||||
|_| unreachable!(),
|
||||
|_| unreachable!(),
|
||||
|index| SimTraceKind::SimOnly { index, ty },
|
||||
),
|
||||
name,
|
||||
|
|
@ -2295,16 +2320,10 @@ impl Compiler {
|
|||
| CanonicalType::SyncReset(_)
|
||||
| CanonicalType::Reset(_)
|
||||
| CanonicalType::Clock(_)
|
||||
| CanonicalType::DynSimOnly(_) => {
|
||||
| CanonicalType::DynSimOnly(_)
|
||||
| CanonicalType::PhantomConst(_) => {
|
||||
self.make_trace_scalar(instantiated_module, target, name, source_location)
|
||||
}
|
||||
CanonicalType::PhantomConst(_) => TraceBundle {
|
||||
name,
|
||||
fields: Interned::default(),
|
||||
ty: Bundle::new(Interned::default()),
|
||||
flow: target.flow(),
|
||||
}
|
||||
.into(),
|
||||
}
|
||||
}
|
||||
fn make_trace_decl(
|
||||
|
|
@ -4293,6 +4312,7 @@ impl Compiler {
|
|||
start += element_bit_width;
|
||||
}
|
||||
}
|
||||
CompiledTypeLayoutBody::PhantomConst => {}
|
||||
CompiledTypeLayoutBody::Bundle { fields } => {
|
||||
let CompiledTypeLayoutBody::Bundle {
|
||||
fields: mask_fields,
|
||||
|
|
|
|||
|
|
@ -6,12 +6,14 @@ use crate::{
|
|||
expr::Flow,
|
||||
int::UInt,
|
||||
intern::{Intern, Interned},
|
||||
prelude::PhantomConst,
|
||||
sim::{
|
||||
TraceArray, TraceAsyncReset, TraceBool, TraceBundle, TraceClock, TraceDecl,
|
||||
TraceEnumDiscriminant, TraceEnumWithFields, TraceFieldlessEnum, TraceInstance,
|
||||
TraceLocation, TraceMem, TraceMemPort, TraceMemoryId, TraceMemoryLocation, TraceModule,
|
||||
TraceModuleIO, TraceReg, TraceSInt, TraceScalar, TraceScalarId, TraceScope, TraceSimOnly,
|
||||
TraceSyncReset, TraceUInt, TraceWire, TraceWriter, TraceWriterDecls,
|
||||
TraceModuleIO, TracePhantomConst, TraceReg, TraceSInt, TraceScalar, TraceScalarId,
|
||||
TraceScope, TraceSimOnly, TraceSyncReset, TraceUInt, TraceWire, TraceWriter,
|
||||
TraceWriterDecls,
|
||||
time::{SimDuration, SimInstant},
|
||||
value::DynSimOnlyValue,
|
||||
},
|
||||
|
|
@ -283,6 +285,7 @@ impl WriteTrace for TraceScalar {
|
|||
Self::Clock(v) => v.write_trace(writer, arg),
|
||||
Self::SyncReset(v) => v.write_trace(writer, arg),
|
||||
Self::AsyncReset(v) => v.write_trace(writer, arg),
|
||||
Self::PhantomConst(v) => v.write_trace(writer, arg),
|
||||
Self::SimOnly(v) => v.write_trace(writer, arg),
|
||||
}
|
||||
}
|
||||
|
|
@ -549,6 +552,33 @@ impl WriteTrace for TraceAsyncReset {
|
|||
}
|
||||
}
|
||||
|
||||
impl WriteTrace for TracePhantomConst {
|
||||
fn write_trace<W: io::Write, A: Arg>(self, writer: &mut W, mut arg: A) -> io::Result<()> {
|
||||
let ArgInType {
|
||||
source_var_type: _,
|
||||
sink_var_type: _,
|
||||
duplex_var_type: _,
|
||||
properties,
|
||||
scope,
|
||||
} = arg.in_type();
|
||||
let Self {
|
||||
location,
|
||||
name,
|
||||
ty: _,
|
||||
flow: _,
|
||||
} = self;
|
||||
write_vcd_var(
|
||||
properties,
|
||||
MemoryElementPartBody::Scalar,
|
||||
writer,
|
||||
"string",
|
||||
1,
|
||||
location,
|
||||
scope.new_identifier(name),
|
||||
)
|
||||
}
|
||||
}
|
||||
|
||||
impl WriteTrace for TraceSimOnly {
|
||||
fn write_trace<W: io::Write, A: Arg>(self, writer: &mut W, mut arg: A) -> io::Result<()> {
|
||||
let ArgInType {
|
||||
|
|
@ -1091,6 +1121,16 @@ impl<W: io::Write> TraceWriter for VcdWriter<W> {
|
|||
write_enum_discriminant_value_change(&mut self.writer, variant_index, ty, id.as_usize())
|
||||
}
|
||||
|
||||
fn set_signal_phantom_const(
|
||||
&mut self,
|
||||
id: TraceScalarId,
|
||||
ty: PhantomConst,
|
||||
) -> Result<(), Self::Error> {
|
||||
// avoid multi-line strings because GTKWave can't display them properly:
|
||||
// https://github.com/gtkwave/gtkwave/issues/460
|
||||
write_string_value_change(&mut self.writer, format_args!("{ty:?}"), id.as_usize())
|
||||
}
|
||||
|
||||
fn set_signal_sim_only_value(
|
||||
&mut self,
|
||||
id: TraceScalarId,
|
||||
|
|
|
|||
|
|
@ -127,7 +127,7 @@ impl From<SerdeCanonicalType> for CanonicalType {
|
|||
SerdeCanonicalType::Reset => Self::Reset(Reset),
|
||||
SerdeCanonicalType::Clock => Self::Clock(Clock),
|
||||
SerdeCanonicalType::PhantomConst(value) => {
|
||||
Self::PhantomConst(PhantomConst::new(value.0))
|
||||
Self::PhantomConst(PhantomConst::new_interned(value.0))
|
||||
}
|
||||
SerdeCanonicalType::DynSimOnly(value) => Self::DynSimOnly(value),
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2244,3 +2244,41 @@ fn test_sim_resettable_counter_async_immediate_reset() {
|
|||
panic!();
|
||||
}
|
||||
}
|
||||
|
||||
#[hdl_module(outline_generated)]
|
||||
pub fn phantom_const() {
|
||||
#[hdl]
|
||||
let out: Array<PhantomConst<Vec<String>>, 2> =
|
||||
m.output(Array::new_static(PhantomConst::new_sized(vec![
|
||||
"a".into(),
|
||||
"b".into(),
|
||||
])));
|
||||
let _ = out;
|
||||
#[hdl]
|
||||
let mut mem = memory(PhantomConst::new("mem_element"));
|
||||
mem.depth(1);
|
||||
let port = mem.new_read_port();
|
||||
connect_any(port.addr, 0u8);
|
||||
connect(port.clk, false.to_clock());
|
||||
connect(port.en, false);
|
||||
}
|
||||
|
||||
#[test]
|
||||
fn test_phantom_const() {
|
||||
let _n = SourceLocation::normalize_files_for_tests();
|
||||
let mut sim = Simulation::new(phantom_const());
|
||||
let mut writer = RcWriter::default();
|
||||
sim.add_trace_writer(VcdWriterDecls::new(writer.clone()));
|
||||
sim.advance_time(SimDuration::from_micros(1));
|
||||
sim.flush_traces().unwrap();
|
||||
let vcd = String::from_utf8(writer.take()).unwrap();
|
||||
println!("####### VCD:\n{vcd}\n#######");
|
||||
if vcd != include_str!("sim/expected/phantom_const.vcd") {
|
||||
panic!();
|
||||
}
|
||||
let sim_debug = format!("{sim:#?}");
|
||||
println!("#######\n{sim_debug}\n#######");
|
||||
if sim_debug != include_str!("sim/expected/phantom_const.txt") {
|
||||
panic!();
|
||||
}
|
||||
}
|
||||
|
|
|
|||
514
crates/fayalite/tests/sim/expected/phantom_const.txt
Normal file
514
crates/fayalite/tests/sim/expected/phantom_const.txt
Normal file
|
|
@ -0,0 +1,514 @@
|
|||
Simulation {
|
||||
state: State {
|
||||
insns: Insns {
|
||||
state_layout: StateLayout {
|
||||
ty: TypeLayout {
|
||||
small_slots: StatePartLayout<SmallSlots> {
|
||||
len: 5,
|
||||
debug_data: [
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: Bool,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: Bool,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: Bool,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: Bool,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: UInt<0>,
|
||||
},
|
||||
],
|
||||
..
|
||||
},
|
||||
big_slots: StatePartLayout<BigSlots> {
|
||||
len: 7,
|
||||
debug_data: [
|
||||
SlotDebugData {
|
||||
name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.addr",
|
||||
ty: UInt<0>,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.en",
|
||||
ty: Bool,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.clk",
|
||||
ty: Clock,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: UInt<8>,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: UInt<0>,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: Bool,
|
||||
},
|
||||
SlotDebugData {
|
||||
name: "",
|
||||
ty: Clock,
|
||||
},
|
||||
],
|
||||
..
|
||||
},
|
||||
sim_only_slots: StatePartLayout<SimOnlySlots> {
|
||||
len: 0,
|
||||
debug_data: [],
|
||||
layout_data: [],
|
||||
..
|
||||
},
|
||||
},
|
||||
memories: StatePartLayout<Memories> {
|
||||
len: 1,
|
||||
debug_data: [
|
||||
(),
|
||||
],
|
||||
layout_data: [
|
||||
MemoryData {
|
||||
array_type: Array<PhantomConst("mem_element"), 1>,
|
||||
data: [
|
||||
// len = 0x1
|
||||
[0x0]: 0x0,
|
||||
],
|
||||
},
|
||||
],
|
||||
..
|
||||
},
|
||||
},
|
||||
insns: [
|
||||
// at: module-XXXXXXXXXX.rs:1:1
|
||||
0: Const {
|
||||
dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "", ty: Bool },
|
||||
value: 0x0,
|
||||
},
|
||||
1: Copy {
|
||||
dest: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Clock },
|
||||
src: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "", ty: Bool },
|
||||
},
|
||||
// at: module-XXXXXXXXXX.rs:6:1
|
||||
2: Copy {
|
||||
dest: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.clk", ty: Clock },
|
||||
src: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "", ty: Clock },
|
||||
},
|
||||
// at: module-XXXXXXXXXX.rs:7:1
|
||||
3: Copy {
|
||||
dest: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.en", ty: Bool },
|
||||
src: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "", ty: Bool },
|
||||
},
|
||||
// at: module-XXXXXXXXXX.rs:1:1
|
||||
4: Const {
|
||||
dest: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "", ty: UInt<8> },
|
||||
value: 0x0,
|
||||
},
|
||||
5: CastToUInt {
|
||||
dest: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "", ty: UInt<0> },
|
||||
src: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "", ty: UInt<8> },
|
||||
dest_width: 0,
|
||||
},
|
||||
// at: module-XXXXXXXXXX.rs:5:1
|
||||
6: Copy {
|
||||
dest: StatePartIndex<BigSlots>(0), // (0x0) SlotDebugData { name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.addr", ty: UInt<0> },
|
||||
src: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "", ty: UInt<0> },
|
||||
},
|
||||
// at: module-XXXXXXXXXX.rs:3:1
|
||||
7: CastBigToArrayIndex {
|
||||
dest: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<0> },
|
||||
src: StatePartIndex<BigSlots>(0), // (0x0) SlotDebugData { name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.addr", ty: UInt<0> },
|
||||
},
|
||||
8: IsNonZeroDestIsSmall {
|
||||
dest: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
src: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.en", ty: Bool },
|
||||
},
|
||||
9: BranchIfSmallZero {
|
||||
target: 11,
|
||||
value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
},
|
||||
10: Branch {
|
||||
target: 11,
|
||||
},
|
||||
11: IsNonZeroDestIsSmall {
|
||||
dest: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
src: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(phantom_const: phantom_const).phantom_const::mem::r0.clk", ty: Clock },
|
||||
},
|
||||
12: AndSmall {
|
||||
dest: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
lhs: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
rhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
||||
},
|
||||
13: BranchIfSmallZero {
|
||||
target: 14,
|
||||
value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
},
|
||||
14: XorSmallImmediate {
|
||||
dest: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Bool },
|
||||
lhs: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
|
||||
rhs: 0x1,
|
||||
},
|
||||
// at: module-XXXXXXXXXX.rs:1:1
|
||||
15: Return,
|
||||
],
|
||||
..
|
||||
},
|
||||
pc: 15,
|
||||
memory_write_log: [],
|
||||
memories: StatePart {
|
||||
value: [
|
||||
MemoryData {
|
||||
array_type: Array<PhantomConst("mem_element"), 1>,
|
||||
data: [
|
||||
// len = 0x1
|
||||
[0x0]: 0x0,
|
||||
],
|
||||
},
|
||||
],
|
||||
},
|
||||
small_slots: StatePart {
|
||||
value: [
|
||||
1,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
],
|
||||
},
|
||||
big_slots: StatePart {
|
||||
value: [
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
0,
|
||||
],
|
||||
},
|
||||
sim_only_slots: StatePart {
|
||||
value: [],
|
||||
},
|
||||
},
|
||||
io: Instance {
|
||||
name: <simulator>::phantom_const,
|
||||
instantiated: Module {
|
||||
name: phantom_const,
|
||||
..
|
||||
},
|
||||
},
|
||||
main_module: SimulationModuleState {
|
||||
base_targets: [
|
||||
Instance {
|
||||
name: <simulator>::phantom_const,
|
||||
instantiated: Module {
|
||||
name: phantom_const,
|
||||
..
|
||||
},
|
||||
}.out,
|
||||
],
|
||||
uninitialized_ios: {},
|
||||
io_targets: {
|
||||
Instance {
|
||||
name: <simulator>::phantom_const,
|
||||
instantiated: Module {
|
||||
name: phantom_const,
|
||||
..
|
||||
},
|
||||
}.out,
|
||||
Instance {
|
||||
name: <simulator>::phantom_const,
|
||||
instantiated: Module {
|
||||
name: phantom_const,
|
||||
..
|
||||
},
|
||||
}.out[0],
|
||||
Instance {
|
||||
name: <simulator>::phantom_const,
|
||||
instantiated: Module {
|
||||
name: phantom_const,
|
||||
..
|
||||
},
|
||||
}.out[1],
|
||||
},
|
||||
did_initial_settle: true,
|
||||
},
|
||||
extern_modules: [],
|
||||
trace_decls: TraceModule {
|
||||
name: "phantom_const",
|
||||
children: [
|
||||
TraceModuleIO {
|
||||
name: "out",
|
||||
child: TraceArray {
|
||||
name: "out",
|
||||
elements: [
|
||||
TracePhantomConst {
|
||||
location: TraceScalarId(0),
|
||||
name: "[0]",
|
||||
ty: PhantomConst(
|
||||
["a","b"],
|
||||
),
|
||||
flow: Sink,
|
||||
},
|
||||
TracePhantomConst {
|
||||
location: TraceScalarId(1),
|
||||
name: "[1]",
|
||||
ty: PhantomConst(
|
||||
["a","b"],
|
||||
),
|
||||
flow: Sink,
|
||||
},
|
||||
],
|
||||
ty: Array<PhantomConst(["a","b"]), 2>,
|
||||
flow: Sink,
|
||||
},
|
||||
ty: Array<PhantomConst(["a","b"]), 2>,
|
||||
flow: Sink,
|
||||
},
|
||||
TraceMem {
|
||||
id: TraceMemoryId(0),
|
||||
name: "mem",
|
||||
stride: 0,
|
||||
element_type: TracePhantomConst {
|
||||
location: TraceMemoryLocation {
|
||||
id: TraceMemoryId(0),
|
||||
depth: 1,
|
||||
stride: 0,
|
||||
start: 0,
|
||||
len: 0,
|
||||
},
|
||||
name: "mem",
|
||||
ty: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
flow: Duplex,
|
||||
},
|
||||
ports: [
|
||||
TraceMemPort {
|
||||
name: "r0",
|
||||
bundle: TraceBundle {
|
||||
name: "r0",
|
||||
fields: [
|
||||
TraceUInt {
|
||||
location: TraceScalarId(2),
|
||||
name: "addr",
|
||||
ty: UInt<0>,
|
||||
flow: Sink,
|
||||
},
|
||||
TraceBool {
|
||||
location: TraceScalarId(3),
|
||||
name: "en",
|
||||
flow: Sink,
|
||||
},
|
||||
TraceClock {
|
||||
location: TraceScalarId(4),
|
||||
name: "clk",
|
||||
flow: Sink,
|
||||
},
|
||||
TracePhantomConst {
|
||||
location: TraceScalarId(5),
|
||||
name: "data",
|
||||
ty: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
flow: Source,
|
||||
},
|
||||
],
|
||||
ty: Bundle {
|
||||
/* offset = 0 */
|
||||
addr: UInt<0>,
|
||||
/* offset = 0 */
|
||||
en: Bool,
|
||||
/* offset = 1 */
|
||||
clk: Clock,
|
||||
#[hdl(flip)] /* offset = 2 */
|
||||
data: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
},
|
||||
flow: Sink,
|
||||
},
|
||||
ty: Bundle {
|
||||
/* offset = 0 */
|
||||
addr: UInt<0>,
|
||||
/* offset = 0 */
|
||||
en: Bool,
|
||||
/* offset = 1 */
|
||||
clk: Clock,
|
||||
#[hdl(flip)] /* offset = 2 */
|
||||
data: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
},
|
||||
},
|
||||
],
|
||||
array_type: Array<PhantomConst("mem_element"), 1>,
|
||||
},
|
||||
],
|
||||
},
|
||||
traces: [
|
||||
SimTrace {
|
||||
id: TraceScalarId(0),
|
||||
kind: PhantomConst {
|
||||
ty: PhantomConst(
|
||||
["a","b"],
|
||||
),
|
||||
},
|
||||
state: PhantomConst,
|
||||
last_state: PhantomConst,
|
||||
},
|
||||
SimTrace {
|
||||
id: TraceScalarId(1),
|
||||
kind: PhantomConst {
|
||||
ty: PhantomConst(
|
||||
["a","b"],
|
||||
),
|
||||
},
|
||||
state: PhantomConst,
|
||||
last_state: PhantomConst,
|
||||
},
|
||||
SimTrace {
|
||||
id: TraceScalarId(2),
|
||||
kind: BigUInt {
|
||||
index: StatePartIndex<BigSlots>(0),
|
||||
ty: UInt<0>,
|
||||
},
|
||||
state: 0x0,
|
||||
last_state: 0x0,
|
||||
},
|
||||
SimTrace {
|
||||
id: TraceScalarId(3),
|
||||
kind: BigBool {
|
||||
index: StatePartIndex<BigSlots>(1),
|
||||
},
|
||||
state: 0x0,
|
||||
last_state: 0x0,
|
||||
},
|
||||
SimTrace {
|
||||
id: TraceScalarId(4),
|
||||
kind: BigClock {
|
||||
index: StatePartIndex<BigSlots>(2),
|
||||
},
|
||||
state: 0x0,
|
||||
last_state: 0x0,
|
||||
},
|
||||
SimTrace {
|
||||
id: TraceScalarId(5),
|
||||
kind: PhantomConst {
|
||||
ty: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
},
|
||||
state: PhantomConst,
|
||||
last_state: PhantomConst,
|
||||
},
|
||||
],
|
||||
trace_memories: {
|
||||
StatePartIndex<Memories>(0): TraceMem {
|
||||
id: TraceMemoryId(0),
|
||||
name: "mem",
|
||||
stride: 0,
|
||||
element_type: TracePhantomConst {
|
||||
location: TraceMemoryLocation {
|
||||
id: TraceMemoryId(0),
|
||||
depth: 1,
|
||||
stride: 0,
|
||||
start: 0,
|
||||
len: 0,
|
||||
},
|
||||
name: "mem",
|
||||
ty: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
flow: Duplex,
|
||||
},
|
||||
ports: [
|
||||
TraceMemPort {
|
||||
name: "r0",
|
||||
bundle: TraceBundle {
|
||||
name: "r0",
|
||||
fields: [
|
||||
TraceUInt {
|
||||
location: TraceScalarId(2),
|
||||
name: "addr",
|
||||
ty: UInt<0>,
|
||||
flow: Sink,
|
||||
},
|
||||
TraceBool {
|
||||
location: TraceScalarId(3),
|
||||
name: "en",
|
||||
flow: Sink,
|
||||
},
|
||||
TraceClock {
|
||||
location: TraceScalarId(4),
|
||||
name: "clk",
|
||||
flow: Sink,
|
||||
},
|
||||
TracePhantomConst {
|
||||
location: TraceScalarId(5),
|
||||
name: "data",
|
||||
ty: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
flow: Source,
|
||||
},
|
||||
],
|
||||
ty: Bundle {
|
||||
/* offset = 0 */
|
||||
addr: UInt<0>,
|
||||
/* offset = 0 */
|
||||
en: Bool,
|
||||
/* offset = 1 */
|
||||
clk: Clock,
|
||||
#[hdl(flip)] /* offset = 2 */
|
||||
data: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
},
|
||||
flow: Sink,
|
||||
},
|
||||
ty: Bundle {
|
||||
/* offset = 0 */
|
||||
addr: UInt<0>,
|
||||
/* offset = 0 */
|
||||
en: Bool,
|
||||
/* offset = 1 */
|
||||
clk: Clock,
|
||||
#[hdl(flip)] /* offset = 2 */
|
||||
data: PhantomConst(
|
||||
"mem_element",
|
||||
),
|
||||
},
|
||||
},
|
||||
],
|
||||
array_type: Array<PhantomConst("mem_element"), 1>,
|
||||
},
|
||||
},
|
||||
trace_writers: [
|
||||
Running(
|
||||
VcdWriter {
|
||||
finished_init: true,
|
||||
timescale: 1 ps,
|
||||
..
|
||||
},
|
||||
),
|
||||
],
|
||||
clocks_triggered: [
|
||||
StatePartIndex<SmallSlots>(1),
|
||||
],
|
||||
event_queue: EventQueue(EventQueueData {
|
||||
instant: 1 μs,
|
||||
events: {},
|
||||
}),
|
||||
waiting_sensitivity_sets_by_address: {},
|
||||
waiting_sensitivity_sets_by_compiled_value: {},
|
||||
..
|
||||
}
|
||||
31
crates/fayalite/tests/sim/expected/phantom_const.vcd
Normal file
31
crates/fayalite/tests/sim/expected/phantom_const.vcd
Normal file
|
|
@ -0,0 +1,31 @@
|
|||
$timescale 1 ps $end
|
||||
$scope module phantom_const $end
|
||||
$scope struct out $end
|
||||
$var string 1 ! \[0] $end
|
||||
$var string 1 " \[1] $end
|
||||
$upscope $end
|
||||
$scope struct mem $end
|
||||
$scope struct contents $end
|
||||
$scope struct \[0] $end
|
||||
$var string 1 ' mem $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$scope struct r0 $end
|
||||
$var string 0 # addr $end
|
||||
$var wire 1 $ en $end
|
||||
$var wire 1 % clk $end
|
||||
$var string 1 & data $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$upscope $end
|
||||
$enddefinitions $end
|
||||
$dumpvars
|
||||
s0 '
|
||||
sPhantomConst([\"a\",\"b\"]) !
|
||||
sPhantomConst([\"a\",\"b\"]) "
|
||||
s0 #
|
||||
0$
|
||||
0%
|
||||
sPhantomConst(\"mem_element\") &
|
||||
$end
|
||||
#1000000
|
||||
Loading…
Add table
Add a link
Reference in a new issue