fayalite

add #[hdl] let destructuring and, while at it, tuple patterns

test.yml #228 -Commit 86a1bb46be pushed by programmerjake

#17

2025-02-11 07:07:24 +00:00

15m18s

sim: fix "label address not set" bug when the last Assignment is conditional

test.yml #227 -Commit d4ea826051 pushed by programmerjake

master

2025-01-16 03:16:23 +00:00

4m17s

sim: fix "label address not set" bug when the last Assignment is conditional

test.yml #226 -Commit d4ea826051 pushed by programmerjake

#16

2025-01-16 03:11:52 +00:00

3m59s

tests/sim: add test_array_rw

test.yml #225 -Commit 404a2ee043 pushed by programmerjake

master

2025-01-13 06:06:41 +00:00

4m21s

tests/sim: add test_array_rw

test.yml #224 -Commit 404a2ee043 pushed by programmerjake

#15

2025-01-13 05:44:14 +00:00

3m57s

properly handle duplicate names in vcd

test.yml #223 -Commit e3a2ccd41c pushed by programmerjake

master

2025-01-10 07:16:13 +00:00

4m27s

properly handle duplicate names in vcd

test.yml #222 -Commit e3a2ccd41c pushed by programmerjake

#14

2025-01-10 07:10:57 +00:00

15m8s

Gather the FIFO debug ports in a bundle

test.yml #221 -Commit 3771cea78e pushed by programmerjake

master

2024-12-29 21:09:46 +00:00

4m18s

fix #[hdl]/#[hdl_module] attributes getting the wrong hygiene when processing #[cfg]s

test.yml #218 -Commit c16726cee6 pushed by programmerjake

master

2024-12-29 09:13:04 +00:00

6m1s

fix #[hdl]/#[hdl_module] attributes getting the wrong hygiene when processing #[cfg]s

test.yml #217 -Commit c16726cee6 pushed by programmerjake

#13

2024-12-29 09:06:57 +00:00

5m33s

add test for cfgs

test.yml #216 -Commit b63676d0ca pushed by programmerjake

master

2024-12-29 07:56:31 +00:00

6m22s

add test for cfgs

test.yml #215 -Commit b63676d0ca pushed by programmerjake

#12

2024-12-29 07:48:35 +00:00

5m45s

WIP implementing handling #[cfg] and #[cfg_attr] in proc macro inputs

test.yml #214 -Commit b7ec623bfa pushed by programmerjake

#12

2024-12-28 00:08:06 +00:00

1m43s

WIP implementing handling #[cfg] and #[cfg_attr] in proc macro inputs

test.yml #213 -Commit 9dc16bc73b pushed by programmerjake

#12

2024-12-27 12:10:18 +00:00

35s

make sim::Compiler not print things to stdout unless you ask for it

test.yml #208 -Commit 9b06019bf5 pushed by programmerjake

master

2024-12-19 05:34:28 +00:00

5m36s

make sim::Compiler not print things to stdout unless you ask for it

test.yml #207 -Commit 9b06019bf5 pushed by programmerjake

#10

2024-12-19 05:23:17 +00:00

5m31s

sim: fix sim.write to struct

test.yml #206 -Commit 36bad52978 pushed by programmerjake

master

2024-12-19 05:09:52 +00:00

5m32s

sim: fix sim.write to struct

test.yml #205 -Commit 36bad52978 pushed by programmerjake

#9

2024-12-19 05:04:15 +00:00

5m32s

sim: fix sim.write to struct

test.yml #204 -Commit 36bad52978 pushed by programmerjake

fix-sim-write-struct

2024-12-19 04:58:37 +00:00

5m17s

sim: add SimValue and reading/writing more than just a scalar

test.yml #203 -Commit 21c73051ec pushed by programmerjake

master

2024-12-18 10:09:08 +00:00

5m30s

sim: add SimValue and reading/writing more than just a scalar

test.yml #202 -Commit 21c73051ec pushed by programmerjake

#8

2024-12-18 09:52:00 +00:00

5m32s

sim: add SimValue and reading/writing more than just a scalar

test.yml #201 -Commit 21c73051ec pushed by programmerjake

adding-simulator

2024-12-18 09:46:28 +00:00

5m33s

Merge remote-tracking branch 'origin/master' into adding-simulator

test.yml #200 -Commit 304d8da0e8 pushed by programmerjake

master

2024-12-16 04:12:56 +00:00

6m5s

Merge remote-tracking branch 'origin/master' into adding-simulator

test.yml #199 -Commit 304d8da0e8 pushed by programmerjake

#3

2024-12-13 23:24:14 +00:00

11m2s

Merge remote-tracking branch 'origin/master' into adding-simulator

test.yml #198 -Commit 304d8da0e8 pushed by programmerjake

adding-simulator

2024-12-13 23:18:50 +00:00

5m57s

add more memory tests

test.yml #197 -Commit 2af38de900 pushed by programmerjake

#3

2024-12-13 23:12:53 +00:00

7m9s

add more memory tests

test.yml #196 -Commit 2af38de900 pushed by programmerjake

adding-simulator

2024-12-13 23:07:26 +00:00

2m2s

tests/sim: add test for memory rw port

test.yml #195 -Commit c756aeec70 pushed by programmerjake

#3

2024-12-13 05:03:40 +00:00

12m9s

tests/sim: add test for memory rw port

test.yml #194 -Commit c756aeec70 pushed by programmerjake

adding-simulator

2024-12-13 04:57:06 +00:00

5m54s

sim: simple memory test works!

test.yml #193 -Commit 903ca1bf30 pushed by programmerjake

#3

2024-12-13 03:59:40 +00:00

11m1s