fayalite

switch ready_valid::queue formal proofs to use formal_global_clock

test.yml #393 -Commit e7ee1e862e pushed by programmerjake

#77

2026-06-05 07:52:09 +00:00

3m10s

non-working build on TLII (using QEMU for x86 binaries)

test.yml #390 -Commit fd2c635343 pushed by HaeckseAlex

tp/rebase2

2026-05-24 18:56:09 +00:00

20s

Add .to_trace_as_string() and clean up code

test.yml #387 -Commit cefccab47c pushed by programmerjake

#75

2026-05-15 05:08:21 +00:00

1m1s

add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

test.yml #384 -Commit 299cbfa348 pushed by programmerjake

#74

2026-05-14 02:42:58 +00:00

1m42s

add TraceAsString<T> -- sim traces it as a string rather than all its internal fields

test.yml #383 -Commit 36c348e01c pushed by programmerjake

#74

2026-05-14 02:38:36 +00:00

3m11s

change VCD id generation to be based on hashing the path, making them better for git diff

test.yml #364 -Commit dbed947408 pushed by programmerjake

master

2026-03-18 03:28:55 +00:00

10m23s

Run Rocq tests.

test.yml #361 -Commit 845813d4bb pushed by cesar

#64

2026-02-14 22:06:30 +00:00

35s

speed up LazyInterned by redoing caching using RwLock and add a thread-local cache

test.yml #356 -Commit f236c9f404 pushed by programmerjake

#62

2026-02-04 01:44:35 +00:00

1m55s

speed up LazyInterned by redoing caching using RwLock and add a thread-local cache

test.yml #355 -Commit 8da430f4c9 pushed by programmerjake

#62

2026-02-04 01:35:33 +00:00

1m57s

simplify SimValue Debug format, making complex structures much easier to read

test.yml #346 -Commit 0f94dc6dcd pushed by programmerjake

#58

2025-12-15 04:44:15 +00:00

1m22s

Demonstrates state with multiple variables and hidden state.

test.yml #340 -Commit e54558d848 pushed by cesar

#56

2025-12-09 01:12:08 +00:00

24s

Add peripherals and Arty A7 platforms -- blinky works correctly now on arty-a7-100t!

test.yml #299 -Commit 917a603b34 pushed by programmerjake

#38

2025-10-20 05:30:03 +00:00

4m27s

WIP adding peripherals

test.yml #298 -Commit d2efb94686 pushed by programmerjake

#38

2025-10-19 06:25:40 +00:00

1m6s

WIP adding peripherals

test.yml #297 -Commit 2848f3dee4 pushed by programmerjake

#38

2025-10-18 01:01:18 +00:00

50s

try building .bit file

test.yml #287 -Commit 97878e100a pushed by programmerjake

#38

2025-10-11 01:01:42 +00:00

2m59s

WIP adding yosys-nextpnr-xray xilinx fpga toolchain -- blinky works on arty a7 100t (except for inverted reset)

test.yml #285 -Commit 74ad0e104e pushed by programmerjake

#38

2025-10-10 08:21:24 +00:00

1m1s

add simulator support for sim-only values

test.yml #278 -Commit 9334dff776 pushed by programmerjake

#35

2025-09-09 05:07:29 +00:00

3m16s

add simulator support for sim-only values -- still needs tests

test.yml #277 -Commit 9dd3b7e7e4 pushed by programmerjake

#35

2025-09-06 02:42:41 +00:00

1m23s

add support for #[hdl(sim)] enum_ty.Variant(value) and #[hdl(sim)] EnumTy::Variant(value) and non-sim variants too

test.yml #255 -Commit 43c29bf221 pushed by programmerjake

#27

2025-04-02 05:07:51 +00:00

33s

add ripple counter test to test simulating alternating circuits and extern modules

test.yml #250 -Commit 1b220b73e7 pushed by programmerjake

#26

2025-03-26 01:57:14 +00:00

2m40s

add Expr<ArrayType<T, Len>>: IntoIterator and Expr<Array<T>>: FromIterator<T>

test.yml #234 -Commit 25ddc837c1 pushed by programmerjake

#20

2025-03-03 00:15:36 +00:00

17s

WIP implementing handling #[cfg] and #[cfg_attr] in proc macro inputs

test.yml #214 -Commit b7ec623bfa pushed by programmerjake

#12

2024-12-28 00:08:06 +00:00

1m43s

WIP implementing handling #[cfg] and #[cfg_attr] in proc macro inputs

test.yml #213 -Commit 9dc16bc73b pushed by programmerjake

#12

2024-12-27 12:10:18 +00:00

35s

sim: fix sim.write to struct

test.yml #204 -Commit 36bad52978 pushed by programmerjake

fix-sim-write-struct

2024-12-19 04:58:37 +00:00

5m17s

add more memory tests

test.yml #196 -Commit 2af38de900 pushed by programmerjake

adding-simulator

2024-12-13 23:07:26 +00:00

2m2s

sim: implement enums (except for connecting unequal enum types)

test.yml #168 -Commit 42afd2da0e pushed by programmerjake

adding-simulator

2024-12-05 05:04:47 +00:00

5m20s

working on deduce_resets

test.yml #152 -Commit 546010739a pushed by programmerjake

adding-simulator

2024-11-27 05:28:50 +00:00

1m34s

increase rust version to support omitting match arms with uninhabited types

test.yml #140 -Commit 52ab134673 pushed by programmerjake

#3

2024-11-24 22:46:42 +00:00

2m51s

increase rust version to support omitting match arms with uninhabited types

test.yml #139 -Commit 52ab134673 pushed by programmerjake

adding-simulator

2024-11-24 22:45:24 +00:00

1m51s

working on deduce_resets pass

test.yml #138 -Commit 698b8adc23 pushed by programmerjake

#3

2024-11-24 22:43:33 +00:00

3m18s