diff --git a/crates/cpu/src/reg_alloc.rs b/crates/cpu/src/reg_alloc.rs index de23e45..9f059a9 100644 --- a/crates/cpu/src/reg_alloc.rs +++ b/crates/cpu/src/reg_alloc.rs @@ -155,9 +155,20 @@ pub fn reg_alloc(config: &CpuConfig) { unit_free_regs_tracker.free_in[0].data, HdlOption[UInt[config.out_reg_num_width]].uninit(), // FIXME: just for debugging ); - connect( - unit_free_regs_tracker.alloc_out[0].ready, - Bool.uninit(), // FIXME: just for debugging - ); + connect(unit_free_regs_tracker.alloc_out[0].ready, false); + for fetch_index in 0..config.fetch_width.get() { + #[hdl] + if let HdlNone = unit_free_regs_tracker.alloc_out[0].data { + // must come after to override connects in loops above + connect(available_units[fetch_index][unit_index], false); + } + #[hdl] + if let HdlSome(unit_num) = selected_unit_nums[fetch_index] { + #[hdl] + if unit_num.value.cmp_eq(unit_index) { + connect(unit_free_regs_tracker.alloc_out[0].ready, true); + } + } + } } } diff --git a/crates/cpu/tests/expected/reg_alloc.txt b/crates/cpu/tests/expected/reg_alloc.txt index 0c3c3f8..7eb2c09 100644 --- a/crates/cpu/tests/expected/reg_alloc.txt +++ b/crates/cpu/tests/expected/reg_alloc.txt @@ -3248,7 +3248,7 @@ Simulation { }, SlotDebugData { name: "", - ty: UInt<1>, + ty: Bool, }, SlotDebugData { name: "", @@ -3266,4000 +3266,4057 @@ Simulation { }, }, insns: [ - // at: reg_alloc.rs:41:1 - 0: Const { - dest: StatePartIndex(683), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - value: 0x0, - }, - 1: Copy { - dest: StatePartIndex(684), // (0x0) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(683), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - }, - // at: reg_alloc.rs:158:9 - 2: Copy { - dest: StatePartIndex(332), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].ready", ty: Bool }, - src: StatePartIndex(684), // (0x0) SlotDebugData { name: "", ty: Bool }, - }, // at: reg_alloc.rs:152:9 - 3: Copy { + 0: Copy { dest: StatePartIndex(327), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.cd.clk", ty: Clock }, src: StatePartIndex(0), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::cd.clk", ty: Clock }, }, - 4: Copy { + 1: Copy { dest: StatePartIndex(328), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.cd.rst", ty: SyncReset }, src: StatePartIndex(1), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::cd.rst", ty: SyncReset }, }, // at: reg_alloc.rs:150:13 - 5: Copy { - dest: StatePartIndex(340), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].ready", ty: Bool }, - src: StatePartIndex(332), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].ready", ty: Bool }, - }, - 6: Copy { + 2: Copy { dest: StatePartIndex(333), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::cd.clk", ty: Clock }, src: StatePartIndex(327), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.cd.clk", ty: Clock }, }, - 7: Copy { + 3: Copy { dest: StatePartIndex(334), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::cd.rst", ty: SyncReset }, src: StatePartIndex(328), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.cd.rst", ty: SyncReset }, }, // at: unit_free_regs_tracker.rs:7:1 - 8: Const { + 4: Const { dest: StatePartIndex(665), // (0x8) SlotDebugData { name: "", ty: UInt<64> }, value: 0x8, }, - 9: NotU { - dest: StatePartIndex(606), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(358), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[15]", ty: Bool }, + 5: NotU { + dest: StatePartIndex(606), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(358), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[15]", ty: Bool }, width: 1, }, - 10: Copy { - dest: StatePartIndex(607), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(606), // (0x1) SlotDebugData { name: "", ty: Bool }, + 6: Copy { + dest: StatePartIndex(607), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(606), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 11: CastToUInt { - dest: StatePartIndex(608), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(607), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 7: CastToUInt { + dest: StatePartIndex(608), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(607), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 12: NotU { - dest: StatePartIndex(603), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(357), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[14]", ty: Bool }, + 8: NotU { + dest: StatePartIndex(603), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(357), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[14]", ty: Bool }, width: 1, }, - 13: Copy { - dest: StatePartIndex(604), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(603), // (0x1) SlotDebugData { name: "", ty: Bool }, + 9: Copy { + dest: StatePartIndex(604), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(603), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 14: CastToUInt { - dest: StatePartIndex(605), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(604), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 10: CastToUInt { + dest: StatePartIndex(605), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(604), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 15: Add { - dest: StatePartIndex(609), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(605), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(608), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 11: Add { + dest: StatePartIndex(609), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(605), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(608), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 16: CastToUInt { + 12: CastToUInt { dest: StatePartIndex(610), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(609), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(609), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 17: Copy { + 13: Copy { dest: StatePartIndex(602), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_14_16", ty: UInt<1> }, src: StatePartIndex(610), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 18: CmpNe { - dest: StatePartIndex(612), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(609), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 14: CmpNe { + dest: StatePartIndex(612), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(609), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(602), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_14_16", ty: UInt<1> }, }, - 19: NotU { - dest: StatePartIndex(586), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(356), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[13]", ty: Bool }, + 15: NotU { + dest: StatePartIndex(586), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(356), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[13]", ty: Bool }, width: 1, }, - 20: Copy { - dest: StatePartIndex(587), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(586), // (0x1) SlotDebugData { name: "", ty: Bool }, + 16: Copy { + dest: StatePartIndex(587), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(586), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 21: CastToUInt { - dest: StatePartIndex(588), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(587), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 17: CastToUInt { + dest: StatePartIndex(588), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(587), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 22: NotU { - dest: StatePartIndex(583), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(355), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[12]", ty: Bool }, + 18: NotU { + dest: StatePartIndex(583), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(355), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[12]", ty: Bool }, width: 1, }, - 23: Copy { - dest: StatePartIndex(584), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(583), // (0x1) SlotDebugData { name: "", ty: Bool }, + 19: Copy { + dest: StatePartIndex(584), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(583), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 24: CastToUInt { - dest: StatePartIndex(585), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(584), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 20: CastToUInt { + dest: StatePartIndex(585), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(584), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 25: Add { - dest: StatePartIndex(589), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(585), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(588), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 21: Add { + dest: StatePartIndex(589), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(585), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(588), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 26: CastToUInt { + 22: CastToUInt { dest: StatePartIndex(590), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(589), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(589), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 27: Copy { + 23: Copy { dest: StatePartIndex(582), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_14", ty: UInt<1> }, src: StatePartIndex(590), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 28: Add { + 24: Add { dest: StatePartIndex(623), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(582), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_14", ty: UInt<1> }, rhs: StatePartIndex(602), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_14_16", ty: UInt<1> }, }, - 29: CastToUInt { + 25: CastToUInt { dest: StatePartIndex(624), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(623), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 30: Copy { + 26: Copy { dest: StatePartIndex(622), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_16", ty: UInt<1> }, src: StatePartIndex(624), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 31: CmpNe { + 27: CmpNe { dest: StatePartIndex(626), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(623), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(622), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_16", ty: UInt<1> }, }, - 32: CmpNe { - dest: StatePartIndex(592), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(589), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 28: CmpNe { + dest: StatePartIndex(592), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(589), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(582), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_14", ty: UInt<1> }, }, - 33: NotU { - dest: StatePartIndex(551), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(354), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[11]", ty: Bool }, + 29: NotU { + dest: StatePartIndex(551), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(354), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[11]", ty: Bool }, width: 1, }, - 34: Copy { - dest: StatePartIndex(552), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(551), // (0x1) SlotDebugData { name: "", ty: Bool }, + 30: Copy { + dest: StatePartIndex(552), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(551), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 35: CastToUInt { - dest: StatePartIndex(553), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(552), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 31: CastToUInt { + dest: StatePartIndex(553), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(552), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 36: NotU { - dest: StatePartIndex(548), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(353), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[10]", ty: Bool }, + 32: NotU { + dest: StatePartIndex(548), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(353), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[10]", ty: Bool }, width: 1, }, - 37: Copy { - dest: StatePartIndex(549), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(548), // (0x1) SlotDebugData { name: "", ty: Bool }, + 33: Copy { + dest: StatePartIndex(549), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(548), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 38: CastToUInt { - dest: StatePartIndex(550), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(549), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 34: CastToUInt { + dest: StatePartIndex(550), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(549), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 39: Add { - dest: StatePartIndex(554), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(550), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(553), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 35: Add { + dest: StatePartIndex(554), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(550), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(553), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 40: CastToUInt { + 36: CastToUInt { dest: StatePartIndex(555), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(554), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(554), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 41: Copy { + 37: Copy { dest: StatePartIndex(547), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_10_12", ty: UInt<1> }, src: StatePartIndex(555), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 42: CmpNe { - dest: StatePartIndex(557), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(554), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 38: CmpNe { + dest: StatePartIndex(557), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(554), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(547), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_10_12", ty: UInt<1> }, }, - 43: NotU { - dest: StatePartIndex(531), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(352), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[9]", ty: Bool }, + 39: NotU { + dest: StatePartIndex(531), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(352), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[9]", ty: Bool }, width: 1, }, - 44: Copy { - dest: StatePartIndex(532), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(531), // (0x1) SlotDebugData { name: "", ty: Bool }, + 40: Copy { + dest: StatePartIndex(532), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(531), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 45: CastToUInt { - dest: StatePartIndex(533), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(532), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 41: CastToUInt { + dest: StatePartIndex(533), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(532), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 46: NotU { - dest: StatePartIndex(528), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(351), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[8]", ty: Bool }, + 42: NotU { + dest: StatePartIndex(528), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(351), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[8]", ty: Bool }, width: 1, }, - 47: Copy { - dest: StatePartIndex(529), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(528), // (0x1) SlotDebugData { name: "", ty: Bool }, + 43: Copy { + dest: StatePartIndex(529), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(528), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 48: CastToUInt { - dest: StatePartIndex(530), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(529), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 44: CastToUInt { + dest: StatePartIndex(530), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(529), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 49: Add { - dest: StatePartIndex(534), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(530), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(533), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 45: Add { + dest: StatePartIndex(534), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(530), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(533), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 50: CastToUInt { + 46: CastToUInt { dest: StatePartIndex(535), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(534), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(534), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 51: Copy { + 47: Copy { dest: StatePartIndex(527), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_10", ty: UInt<1> }, src: StatePartIndex(535), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 52: Add { + 48: Add { dest: StatePartIndex(568), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(527), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_10", ty: UInt<1> }, rhs: StatePartIndex(547), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_10_12", ty: UInt<1> }, }, - 53: CastToUInt { + 49: CastToUInt { dest: StatePartIndex(569), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(568), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 54: Copy { + 50: Copy { dest: StatePartIndex(567), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_12", ty: UInt<1> }, src: StatePartIndex(569), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 55: Add { + 51: Add { dest: StatePartIndex(638), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(567), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_12", ty: UInt<1> }, rhs: StatePartIndex(622), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_16", ty: UInt<1> }, }, - 56: CastToUInt { + 52: CastToUInt { dest: StatePartIndex(639), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(638), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 57: Copy { + 53: Copy { dest: StatePartIndex(637), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_16", ty: UInt<1> }, src: StatePartIndex(639), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 58: CmpNe { + 54: CmpNe { dest: StatePartIndex(641), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(638), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(637), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_16", ty: UInt<1> }, }, - 59: CmpNe { + 55: CmpNe { dest: StatePartIndex(571), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(568), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(567), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_12", ty: UInt<1> }, }, - 60: CmpNe { - dest: StatePartIndex(537), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(534), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 56: CmpNe { + dest: StatePartIndex(537), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(534), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(527), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_10", ty: UInt<1> }, }, - 61: Const { + 57: Const { dest: StatePartIndex(524), // (0x4) SlotDebugData { name: "", ty: UInt<64> }, value: 0x4, }, - 62: NotU { - dest: StatePartIndex(480), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(350), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[7]", ty: Bool }, + 58: NotU { + dest: StatePartIndex(480), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(350), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[7]", ty: Bool }, width: 1, }, - 63: Copy { - dest: StatePartIndex(481), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(480), // (0x1) SlotDebugData { name: "", ty: Bool }, + 59: Copy { + dest: StatePartIndex(481), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(480), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 64: CastToUInt { - dest: StatePartIndex(482), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(481), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 60: CastToUInt { + dest: StatePartIndex(482), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(481), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 65: NotU { - dest: StatePartIndex(477), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(349), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[6]", ty: Bool }, + 61: NotU { + dest: StatePartIndex(477), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(349), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[6]", ty: Bool }, width: 1, }, - 66: Copy { - dest: StatePartIndex(478), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(477), // (0x1) SlotDebugData { name: "", ty: Bool }, + 62: Copy { + dest: StatePartIndex(478), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(477), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 67: CastToUInt { - dest: StatePartIndex(479), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(478), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 63: CastToUInt { + dest: StatePartIndex(479), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(478), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 68: Add { - dest: StatePartIndex(483), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(479), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(482), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 64: Add { + dest: StatePartIndex(483), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(479), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(482), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 69: CastToUInt { + 65: CastToUInt { dest: StatePartIndex(484), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(483), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(483), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 70: Copy { + 66: Copy { dest: StatePartIndex(476), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_6_8", ty: UInt<1> }, src: StatePartIndex(484), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 71: CmpNe { - dest: StatePartIndex(486), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(483), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 67: CmpNe { + dest: StatePartIndex(486), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(483), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(476), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_6_8", ty: UInt<1> }, }, - 72: NotU { - dest: StatePartIndex(460), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(348), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[5]", ty: Bool }, + 68: NotU { + dest: StatePartIndex(460), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(348), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[5]", ty: Bool }, width: 1, }, - 73: Copy { - dest: StatePartIndex(461), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(460), // (0x1) SlotDebugData { name: "", ty: Bool }, + 69: Copy { + dest: StatePartIndex(461), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(460), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 74: CastToUInt { - dest: StatePartIndex(462), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(461), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 70: CastToUInt { + dest: StatePartIndex(462), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(461), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 75: NotU { - dest: StatePartIndex(457), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(347), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[4]", ty: Bool }, + 71: NotU { + dest: StatePartIndex(457), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(347), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[4]", ty: Bool }, width: 1, }, - 76: Copy { - dest: StatePartIndex(458), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(457), // (0x1) SlotDebugData { name: "", ty: Bool }, + 72: Copy { + dest: StatePartIndex(458), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(457), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 77: CastToUInt { - dest: StatePartIndex(459), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(458), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 73: CastToUInt { + dest: StatePartIndex(459), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(458), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 78: Add { - dest: StatePartIndex(463), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(459), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(462), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 74: Add { + dest: StatePartIndex(463), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(459), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(462), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 79: CastToUInt { + 75: CastToUInt { dest: StatePartIndex(464), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(463), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(463), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 80: Copy { + 76: Copy { dest: StatePartIndex(456), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_6", ty: UInt<1> }, src: StatePartIndex(464), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 81: Add { + 77: Add { dest: StatePartIndex(497), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(456), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_6", ty: UInt<1> }, rhs: StatePartIndex(476), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_6_8", ty: UInt<1> }, }, - 82: CastToUInt { + 78: CastToUInt { dest: StatePartIndex(498), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(497), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 83: Copy { + 79: Copy { dest: StatePartIndex(496), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_8", ty: UInt<1> }, src: StatePartIndex(498), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 84: CmpNe { + 80: CmpNe { dest: StatePartIndex(500), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(497), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(496), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_8", ty: UInt<1> }, }, - 85: CmpNe { - dest: StatePartIndex(466), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(463), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 81: CmpNe { + dest: StatePartIndex(466), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(463), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(456), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_6", ty: UInt<1> }, }, - 86: Const { + 82: Const { dest: StatePartIndex(453), // (0x2) SlotDebugData { name: "", ty: UInt<64> }, value: 0x2, }, - 87: NotU { - dest: StatePartIndex(424), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(346), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[3]", ty: Bool }, + 83: NotU { + dest: StatePartIndex(424), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(346), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[3]", ty: Bool }, width: 1, }, - 88: Copy { - dest: StatePartIndex(425), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(424), // (0x1) SlotDebugData { name: "", ty: Bool }, + 84: Copy { + dest: StatePartIndex(425), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(424), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 89: CastToUInt { - dest: StatePartIndex(426), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(425), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 85: CastToUInt { + dest: StatePartIndex(426), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(425), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 90: NotU { - dest: StatePartIndex(421), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(345), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[2]", ty: Bool }, + 86: NotU { + dest: StatePartIndex(421), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(345), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[2]", ty: Bool }, width: 1, }, - 91: Copy { - dest: StatePartIndex(422), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(421), // (0x1) SlotDebugData { name: "", ty: Bool }, + 87: Copy { + dest: StatePartIndex(422), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(421), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 92: CastToUInt { - dest: StatePartIndex(423), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(422), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 88: CastToUInt { + dest: StatePartIndex(423), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(422), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 93: Add { - dest: StatePartIndex(427), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(423), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(426), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 89: Add { + dest: StatePartIndex(427), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(423), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(426), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 94: CastToUInt { + 90: CastToUInt { dest: StatePartIndex(428), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(427), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(427), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 95: Copy { + 91: Copy { dest: StatePartIndex(420), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_2_4", ty: UInt<1> }, src: StatePartIndex(428), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 96: CmpNe { - dest: StatePartIndex(430), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(427), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 92: CmpNe { + dest: StatePartIndex(430), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(427), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(420), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_2_4", ty: UInt<1> }, }, - 97: Const { + 93: Const { dest: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, value: 0x1, }, - 98: Const { + 94: Const { dest: StatePartIndex(413), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, value: 0x0, }, - 99: Copy { + 95: Copy { dest: StatePartIndex(412), // (0x0) SlotDebugData { name: "[0]", ty: UInt<0> }, src: StatePartIndex(413), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, }, - 100: CastToUInt { + 96: CastToUInt { dest: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(412), // (0x0) SlotDebugData { name: "[0]", ty: UInt<0> }, dest_width: 1, }, - 101: NotU { - dest: StatePartIndex(400), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(344), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[1]", ty: Bool }, + 97: NotU { + dest: StatePartIndex(400), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(344), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[1]", ty: Bool }, width: 1, }, - 102: Copy { - dest: StatePartIndex(401), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(400), // (0x1) SlotDebugData { name: "", ty: Bool }, + 98: Copy { + dest: StatePartIndex(401), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(400), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 103: CastToUInt { - dest: StatePartIndex(402), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(401), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 99: CastToUInt { + dest: StatePartIndex(402), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(401), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 104: NotU { - dest: StatePartIndex(397), // (0x1) SlotDebugData { name: "", ty: Bool }, - src: StatePartIndex(343), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[0]", ty: Bool }, + 100: NotU { + dest: StatePartIndex(397), // (0x0) SlotDebugData { name: "", ty: Bool }, + src: StatePartIndex(343), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[0]", ty: Bool }, width: 1, }, - 105: Copy { - dest: StatePartIndex(398), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(397), // (0x1) SlotDebugData { name: "", ty: Bool }, + 101: Copy { + dest: StatePartIndex(398), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(397), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 106: CastToUInt { - dest: StatePartIndex(399), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(398), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 102: CastToUInt { + dest: StatePartIndex(399), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(398), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 107: Add { - dest: StatePartIndex(403), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - lhs: StatePartIndex(399), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, - rhs: StatePartIndex(402), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + 103: Add { + dest: StatePartIndex(403), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + lhs: StatePartIndex(399), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(402), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 108: CastToUInt { + 104: CastToUInt { dest: StatePartIndex(404), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(403), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(403), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 109: Copy { + 105: Copy { dest: StatePartIndex(396), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_2", ty: UInt<1> }, src: StatePartIndex(404), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 110: Add { + 106: Add { dest: StatePartIndex(441), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(396), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_2", ty: UInt<1> }, rhs: StatePartIndex(420), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_2_4", ty: UInt<1> }, }, - 111: CastToUInt { + 107: CastToUInt { dest: StatePartIndex(442), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(441), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 112: Copy { + 108: Copy { dest: StatePartIndex(440), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_4", ty: UInt<1> }, src: StatePartIndex(442), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 113: Add { + 109: Add { dest: StatePartIndex(512), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(440), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_4", ty: UInt<1> }, rhs: StatePartIndex(496), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_8", ty: UInt<1> }, }, - 114: CastToUInt { + 110: CastToUInt { dest: StatePartIndex(513), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(512), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 115: Copy { + 111: Copy { dest: StatePartIndex(511), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_8", ty: UInt<1> }, src: StatePartIndex(513), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 116: Add { + 112: Add { dest: StatePartIndex(653), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(511), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_8", ty: UInt<1> }, rhs: StatePartIndex(637), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_16", ty: UInt<1> }, }, - 117: CastToUInt { + 113: CastToUInt { dest: StatePartIndex(654), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(653), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 1, }, // at: unit_free_regs_tracker.rs:63:13 - 118: Copy { + 114: Copy { dest: StatePartIndex(652), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_16", ty: UInt<1> }, src: StatePartIndex(654), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 119: CmpNe { + 115: CmpNe { dest: StatePartIndex(656), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(653), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(652), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_16", ty: UInt<1> }, }, - 120: CmpNe { + 116: CmpNe { dest: StatePartIndex(515), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(512), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(511), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_8", ty: UInt<1> }, }, - 121: CmpNe { + 117: CmpNe { dest: StatePartIndex(444), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(441), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(440), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_4", ty: UInt<1> }, }, - 122: CmpNe { - dest: StatePartIndex(406), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(403), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 118: CmpNe { + dest: StatePartIndex(406), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(403), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(396), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_2", ty: UInt<1> }, }, - 123: Const { + 119: Const { dest: StatePartIndex(394), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, value: 0x0, }, - 124: Copy { + 120: Copy { dest: StatePartIndex(395), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(394), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, }, // at: ready_valid.rs:31:9 - 125: Copy { + 121: Copy { dest: StatePartIndex(391), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(395), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 126: Copy { + 122: Copy { dest: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(395), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, // at: reg_alloc.rs:154:9 - 127: Copy { + 123: Copy { dest: StatePartIndex(329), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(395), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, // at: reg_alloc.rs:150:13 - 128: Copy { + 124: Copy { dest: StatePartIndex(335), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(329), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 129: AndBigWithSmallImmediate { + 125: AndBigWithSmallImmediate { dest: StatePartIndex(48), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(329), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 130: Copy { + 126: Copy { dest: StatePartIndex(679), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, src: StatePartIndex(329), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 131: SliceInt { + 127: SliceInt { dest: StatePartIndex(680), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, src: StatePartIndex(679), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, start: 1, len: 4, }, // at: unit_free_regs_tracker.rs:27:25 - 132: IsNonZeroDestIsSmall { + 128: IsNonZeroDestIsSmall { dest: StatePartIndex(28), // (0x0 0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(334), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::cd.rst", ty: SyncReset }, }, - 133: IsNonZeroDestIsSmall { + 129: IsNonZeroDestIsSmall { dest: StatePartIndex(27), // (0x1 1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(333), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::cd.clk", ty: Clock }, }, - 134: AndSmall { + 130: AndSmall { dest: StatePartIndex(26), // (0x0 0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(27), // (0x1 1) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(25), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 - 135: Copy { + 131: Copy { dest: StatePartIndex(337), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, src: StatePartIndex(335), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 136: SliceInt { + 132: SliceInt { dest: StatePartIndex(338), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, src: StatePartIndex(337), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, start: 1, len: 4, }, // at: unit_free_regs_tracker.rs:17:11 - 137: AndBigWithSmallImmediate { + 133: AndBigWithSmallImmediate { dest: StatePartIndex(23), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(335), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, rhs: 0x1, }, // at: reg_alloc.rs:138:9 - 138: Copy { + 134: Copy { dest: StatePartIndex(323), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0.cd.clk", ty: Clock }, src: StatePartIndex(0), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::cd.clk", ty: Clock }, }, - 139: Copy { + 135: Copy { dest: StatePartIndex(324), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0.cd.rst", ty: SyncReset }, src: StatePartIndex(1), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::cd.rst", ty: SyncReset }, }, // at: reg_alloc.rs:136:13 - 140: Copy { + 136: Copy { dest: StatePartIndex(325), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0: alu_branch).alu_branch::cd.clk", ty: Clock }, src: StatePartIndex(323), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0.cd.clk", ty: Clock }, }, - 141: Copy { + 137: Copy { dest: StatePartIndex(326), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0: alu_branch).alu_branch::cd.rst", ty: SyncReset }, src: StatePartIndex(324), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0.cd.rst", ty: SyncReset }, }, // at: reg_alloc.rs:41:1 - 142: Const { + 138: Const { dest: StatePartIndex(304), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, value: 0x1, }, - 143: Const { + 139: Const { dest: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, value: 0x0, }, - 144: CastToUInt { + 140: CastToUInt { dest: StatePartIndex(301), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, dest_width: 1, }, // at: reg_alloc.rs:93:21 - 145: Copy { + 141: Copy { dest: StatePartIndex(299), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_num_0_0.value", ty: UInt<1> }, src: StatePartIndex(301), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: reg_alloc.rs:41:1 - 146: Copy { + 142: Copy { dest: StatePartIndex(302), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, src: StatePartIndex(304), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 147: Copy { + 143: Copy { dest: StatePartIndex(303), // (0x0) SlotDebugData { name: ".1.value", ty: UInt<1> }, src: StatePartIndex(299), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_num_0_0.value", ty: UInt<1> }, }, - 148: Shl { + 144: Shl { dest: StatePartIndex(305), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(303), // (0x0) SlotDebugData { name: ".1.value", ty: UInt<1> }, rhs: 1, }, - 149: Or { + 145: Or { dest: StatePartIndex(306), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(302), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, rhs: StatePartIndex(305), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, - 150: CastToUInt { + 146: CastToUInt { dest: StatePartIndex(307), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(306), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 2, }, - 151: Copy { + 147: Copy { dest: StatePartIndex(308), // (0x1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(307), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, // at: reg_alloc.rs:93:21 - 152: Copy { + 148: Copy { dest: StatePartIndex(316), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_num_1_0.value", ty: UInt<1> }, src: StatePartIndex(301), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: reg_alloc.rs:41:1 - 153: Copy { + 149: Copy { dest: StatePartIndex(317), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, src: StatePartIndex(304), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 154: Copy { + 150: Copy { dest: StatePartIndex(318), // (0x0) SlotDebugData { name: ".1.value", ty: UInt<1> }, src: StatePartIndex(316), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_num_1_0.value", ty: UInt<1> }, }, - 155: Shl { + 151: Shl { dest: StatePartIndex(319), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(318), // (0x0) SlotDebugData { name: ".1.value", ty: UInt<1> }, rhs: 1, }, - 156: Or { + 152: Or { dest: StatePartIndex(320), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, lhs: StatePartIndex(317), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, rhs: StatePartIndex(319), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, - 157: CastToUInt { + 153: CastToUInt { dest: StatePartIndex(321), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(320), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, dest_width: 2, }, - 158: Copy { + 154: Copy { dest: StatePartIndex(322), // (0x1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(321), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 159: CmpLt { - dest: StatePartIndex(410), // (0x1) SlotDebugData { name: "", ty: Bool }, + 155: CmpLt { + dest: StatePartIndex(410), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(399), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(399), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 160: SubU { - dest: StatePartIndex(415), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 156: SubU { + dest: StatePartIndex(415), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(399), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(399), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 161: CastBigToArrayIndex { - dest: StatePartIndex(31), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(415), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 157: CastBigToArrayIndex { + dest: StatePartIndex(31), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(415), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 162: ReadIndexed { + 158: ReadIndexed { dest: StatePartIndex(416), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(31) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(31) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 163: Add { + 159: Add { dest: StatePartIndex(418), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(416), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 164: CastToUInt { + 160: CastToUInt { dest: StatePartIndex(419), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(418), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 165: CmpLt { - dest: StatePartIndex(434), // (0x1) SlotDebugData { name: "", ty: Bool }, + 161: CmpLt { + dest: StatePartIndex(434), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(423), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(423), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 166: SubU { - dest: StatePartIndex(436), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 162: SubU { + dest: StatePartIndex(436), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(423), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(423), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 167: CastBigToArrayIndex { - dest: StatePartIndex(32), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(436), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 163: CastBigToArrayIndex { + dest: StatePartIndex(32), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(436), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 168: ReadIndexed { + 164: ReadIndexed { dest: StatePartIndex(437), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(32) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(32) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 169: Add { + 165: Add { dest: StatePartIndex(438), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(437), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 170: CastToUInt { + 166: CastToUInt { dest: StatePartIndex(439), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(438), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 171: CmpLt { + 167: CmpLt { dest: StatePartIndex(448), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(396), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_2", ty: UInt<1> }, }, - 172: SubU { + 168: SubU { dest: StatePartIndex(451), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(396), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_2", ty: UInt<1> }, dest_width: 65, }, - 173: CastBigToArrayIndex { + 169: CastBigToArrayIndex { dest: StatePartIndex(33), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(451), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 174: CmpLt { - dest: StatePartIndex(470), // (0x1) SlotDebugData { name: "", ty: Bool }, + 170: CmpLt { + dest: StatePartIndex(470), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(459), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(459), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 175: SubU { - dest: StatePartIndex(472), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 171: SubU { + dest: StatePartIndex(472), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(459), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(459), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 176: CastBigToArrayIndex { - dest: StatePartIndex(34), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(472), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 172: CastBigToArrayIndex { + dest: StatePartIndex(34), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(472), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 177: ReadIndexed { + 173: ReadIndexed { dest: StatePartIndex(473), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(34) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(34) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 178: Add { + 174: Add { dest: StatePartIndex(474), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(473), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 179: CastToUInt { + 175: CastToUInt { dest: StatePartIndex(475), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(474), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 180: CmpLt { - dest: StatePartIndex(490), // (0x1) SlotDebugData { name: "", ty: Bool }, + 176: CmpLt { + dest: StatePartIndex(490), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(479), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(479), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 181: SubU { - dest: StatePartIndex(492), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 177: SubU { + dest: StatePartIndex(492), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(479), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(479), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 182: CastBigToArrayIndex { - dest: StatePartIndex(35), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(492), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 178: CastBigToArrayIndex { + dest: StatePartIndex(35), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(492), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 183: ReadIndexed { + 179: ReadIndexed { dest: StatePartIndex(493), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(35) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(35) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 184: Add { + 180: Add { dest: StatePartIndex(494), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(493), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 185: CastToUInt { + 181: CastToUInt { dest: StatePartIndex(495), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(494), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 186: CmpLt { + 182: CmpLt { dest: StatePartIndex(504), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(456), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_6", ty: UInt<1> }, }, - 187: SubU { + 183: SubU { dest: StatePartIndex(507), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(456), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_4_6", ty: UInt<1> }, dest_width: 65, }, - 188: CastBigToArrayIndex { + 184: CastBigToArrayIndex { dest: StatePartIndex(36), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(507), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 189: CmpLt { + 185: CmpLt { dest: StatePartIndex(519), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(440), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_4", ty: UInt<1> }, }, - 190: SubU { + 186: SubU { dest: StatePartIndex(522), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(440), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_4", ty: UInt<1> }, dest_width: 65, }, - 191: CastBigToArrayIndex { + 187: CastBigToArrayIndex { dest: StatePartIndex(37), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(522), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 192: CmpLt { - dest: StatePartIndex(541), // (0x1) SlotDebugData { name: "", ty: Bool }, + 188: CmpLt { + dest: StatePartIndex(541), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(530), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(530), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 193: SubU { - dest: StatePartIndex(543), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 189: SubU { + dest: StatePartIndex(543), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(530), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(530), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 194: CastBigToArrayIndex { - dest: StatePartIndex(38), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(543), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 190: CastBigToArrayIndex { + dest: StatePartIndex(38), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(543), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 195: ReadIndexed { + 191: ReadIndexed { dest: StatePartIndex(544), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(38) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(38) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 196: Add { + 192: Add { dest: StatePartIndex(545), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(544), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 197: CastToUInt { + 193: CastToUInt { dest: StatePartIndex(546), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(545), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 198: CmpLt { - dest: StatePartIndex(561), // (0x1) SlotDebugData { name: "", ty: Bool }, + 194: CmpLt { + dest: StatePartIndex(561), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(550), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(550), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 199: SubU { - dest: StatePartIndex(563), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 195: SubU { + dest: StatePartIndex(563), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(550), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(550), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 200: CastBigToArrayIndex { - dest: StatePartIndex(39), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(563), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 196: CastBigToArrayIndex { + dest: StatePartIndex(39), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(563), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 201: ReadIndexed { + 197: ReadIndexed { dest: StatePartIndex(564), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(39) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(39) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 202: Add { + 198: Add { dest: StatePartIndex(565), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(564), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 203: CastToUInt { + 199: CastToUInt { dest: StatePartIndex(566), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(565), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 204: CmpLt { + 200: CmpLt { dest: StatePartIndex(575), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(527), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_10", ty: UInt<1> }, }, - 205: SubU { + 201: SubU { dest: StatePartIndex(578), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(527), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_10", ty: UInt<1> }, dest_width: 65, }, - 206: CastBigToArrayIndex { + 202: CastBigToArrayIndex { dest: StatePartIndex(40), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(578), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 207: CmpLt { - dest: StatePartIndex(596), // (0x1) SlotDebugData { name: "", ty: Bool }, + 203: CmpLt { + dest: StatePartIndex(596), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(585), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(585), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 208: SubU { - dest: StatePartIndex(598), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 204: SubU { + dest: StatePartIndex(598), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(585), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(585), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 209: CastBigToArrayIndex { - dest: StatePartIndex(41), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(598), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 205: CastBigToArrayIndex { + dest: StatePartIndex(41), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(598), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 210: ReadIndexed { + 206: ReadIndexed { dest: StatePartIndex(599), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(41) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(41) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 211: Add { + 207: Add { dest: StatePartIndex(600), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(599), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 212: CastToUInt { + 208: CastToUInt { dest: StatePartIndex(601), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(600), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 213: CmpLt { - dest: StatePartIndex(616), // (0x1) SlotDebugData { name: "", ty: Bool }, + 209: CmpLt { + dest: StatePartIndex(616), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(605), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(605), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 214: SubU { - dest: StatePartIndex(618), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 210: SubU { + dest: StatePartIndex(618), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, - rhs: StatePartIndex(605), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + rhs: StatePartIndex(605), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 65, }, - 215: CastBigToArrayIndex { - dest: StatePartIndex(42), // (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> }, - src: StatePartIndex(618), // (0x1ffffffffffffffff) SlotDebugData { name: "", ty: UInt<65> }, + 211: CastBigToArrayIndex { + dest: StatePartIndex(42), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, + src: StatePartIndex(618), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 216: ReadIndexed { + 212: ReadIndexed { dest: StatePartIndex(619), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, - src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(42) /* (0xffffffffffffffff -1) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + src: StatePartIndex(412) /* (0x0) SlotDebugData { name: "[0]", ty: UInt<0> } */ [StatePartIndex(42) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 217: Add { + 213: Add { dest: StatePartIndex(620), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(619), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, rhs: StatePartIndex(417), // (0x1) SlotDebugData { name: "", ty: UInt<64> }, }, - 218: CastToUInt { + 214: CastToUInt { dest: StatePartIndex(621), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(620), // (0x1) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 1, }, - 219: CmpLt { + 215: CmpLt { dest: StatePartIndex(630), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(582), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_14", ty: UInt<1> }, }, - 220: SubU { + 216: SubU { dest: StatePartIndex(633), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(582), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_12_14", ty: UInt<1> }, dest_width: 65, }, - 221: CastBigToArrayIndex { + 217: CastBigToArrayIndex { dest: StatePartIndex(43), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(633), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 222: CmpLt { + 218: CmpLt { dest: StatePartIndex(645), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(567), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_12", ty: UInt<1> }, }, - 223: SubU { + 219: SubU { dest: StatePartIndex(648), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(567), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_8_12", ty: UInt<1> }, dest_width: 65, }, - 224: CastBigToArrayIndex { + 220: CastBigToArrayIndex { dest: StatePartIndex(44), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(648), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 225: CmpLt { + 221: CmpLt { dest: StatePartIndex(660), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(511), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_8", ty: UInt<1> }, }, - 226: SubU { + 222: SubU { dest: StatePartIndex(663), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(511), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_8", ty: UInt<1> }, dest_width: 65, }, - 227: CastBigToArrayIndex { + 223: CastBigToArrayIndex { dest: StatePartIndex(45), // (0x0 0) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(663), // (0x0) SlotDebugData { name: "", ty: UInt<65> }, }, - 228: CmpLt { + 224: CmpLt { dest: StatePartIndex(671), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, rhs: StatePartIndex(652), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_0_16", ty: UInt<1> }, }, // at: reg_alloc.rs:41:1 - 229: Const { + 225: Const { dest: StatePartIndex(290), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, value: 0x2, }, - 230: Copy { + 226: Copy { dest: StatePartIndex(291), // (0x2) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(290), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, }, - 231: Const { + 227: Const { dest: StatePartIndex(288), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, value: 0x1, }, - 232: Copy { + 228: Copy { dest: StatePartIndex(289), // (0x1) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(288), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, - 233: Const { + 229: Const { dest: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, value: 0x0, }, - 234: Copy { + 230: Copy { dest: StatePartIndex(284), // (0x0) SlotDebugData { name: "[0]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: reg_alloc.rs:65:9 - 235: Copy { - dest: StatePartIndex(271), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, + 231: Copy { + dest: StatePartIndex(271), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, src: StatePartIndex(284), // (0x0) SlotDebugData { name: "[0]", ty: Bool }, }, - 236: Copy { + 232: Copy { dest: StatePartIndex(272), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[1][0]", ty: Bool }, src: StatePartIndex(284), // (0x0) SlotDebugData { name: "[0]", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 - 237: Copy { + 233: Copy { dest: StatePartIndex(375), // (0x0) SlotDebugData { name: "[0]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 238: Copy { + 234: Copy { dest: StatePartIndex(376), // (0x0) SlotDebugData { name: "[1]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 239: Copy { + 235: Copy { dest: StatePartIndex(377), // (0x0) SlotDebugData { name: "[2]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 240: Copy { + 236: Copy { dest: StatePartIndex(378), // (0x0) SlotDebugData { name: "[3]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 241: Copy { + 237: Copy { dest: StatePartIndex(379), // (0x0) SlotDebugData { name: "[4]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 242: Copy { + 238: Copy { dest: StatePartIndex(380), // (0x0) SlotDebugData { name: "[5]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 243: Copy { + 239: Copy { dest: StatePartIndex(381), // (0x0) SlotDebugData { name: "[6]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 244: Copy { + 240: Copy { dest: StatePartIndex(382), // (0x0) SlotDebugData { name: "[7]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 245: Copy { + 241: Copy { dest: StatePartIndex(383), // (0x0) SlotDebugData { name: "[8]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 246: Copy { + 242: Copy { dest: StatePartIndex(384), // (0x0) SlotDebugData { name: "[9]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 247: Copy { + 243: Copy { dest: StatePartIndex(385), // (0x0) SlotDebugData { name: "[10]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 248: Copy { + 244: Copy { dest: StatePartIndex(386), // (0x0) SlotDebugData { name: "[11]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 249: Copy { + 245: Copy { dest: StatePartIndex(387), // (0x0) SlotDebugData { name: "[12]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 250: Copy { + 246: Copy { dest: StatePartIndex(388), // (0x0) SlotDebugData { name: "[13]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 251: Copy { + 247: Copy { dest: StatePartIndex(389), // (0x0) SlotDebugData { name: "[14]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 252: Copy { + 248: Copy { dest: StatePartIndex(390), // (0x0) SlotDebugData { name: "[15]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 253: Or { - dest: StatePartIndex(407), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(406), // (0x1) SlotDebugData { name: "", ty: Bool }, + 249: Or { + dest: StatePartIndex(407), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(406), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 254: Or { - dest: StatePartIndex(408), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(407), // (0x1) SlotDebugData { name: "", ty: Bool }, + 250: Or { + dest: StatePartIndex(408), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(407), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 - 255: Copy { - dest: StatePartIndex(405), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_2", ty: Bool }, - src: StatePartIndex(408), // (0x1) SlotDebugData { name: "", ty: Bool }, + 251: Copy { + dest: StatePartIndex(405), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_2", ty: Bool }, + src: StatePartIndex(408), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 - 256: Or { - dest: StatePartIndex(445), // (0x1) SlotDebugData { name: "", ty: Bool }, + 252: Or { + dest: StatePartIndex(445), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(444), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(405), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_2", ty: Bool }, + rhs: StatePartIndex(405), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_2", ty: Bool }, }, - 257: Or { - dest: StatePartIndex(449), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(405), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_2", ty: Bool }, + 253: Or { + dest: StatePartIndex(449), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(405), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_2", ty: Bool }, rhs: StatePartIndex(448), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 258: Or { - dest: StatePartIndex(411), // (0x1) SlotDebugData { name: "", ty: Bool }, + 254: Or { + dest: StatePartIndex(411), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(410), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(410), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 259: BranchIfZero { - target: 261, - value: StatePartIndex(411), // (0x1) SlotDebugData { name: "", ty: Bool }, + 255: BranchIfZero { + target: 257, + value: StatePartIndex(411), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 260: Copy { - dest: StatePartIndex(409), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_2[0]", ty: UInt<1> }, + 256: Copy { + dest: StatePartIndex(409), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_2[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 261: BranchIfNonZero { - target: 263, - value: StatePartIndex(411), // (0x1) SlotDebugData { name: "", ty: Bool }, + 257: BranchIfNonZero { + target: 259, + value: StatePartIndex(411), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 262: Copy { - dest: StatePartIndex(409), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_2[0]", ty: UInt<1> }, + 258: Copy { + dest: StatePartIndex(409), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_2[0]", ty: UInt<1> }, src: StatePartIndex(419), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 263: CastToUInt { - dest: StatePartIndex(450), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(409), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_2[0]", ty: UInt<1> }, + 259: CastToUInt { + dest: StatePartIndex(450), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(409), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_2[0]", ty: UInt<1> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 264: BranchIfZero { - target: 266, - value: StatePartIndex(449), // (0x1) SlotDebugData { name: "", ty: Bool }, + 260: BranchIfZero { + target: 262, + value: StatePartIndex(449), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 265: Copy { - dest: StatePartIndex(447), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_4[0]", ty: UInt<2> }, - src: StatePartIndex(450), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + 261: Copy { + dest: StatePartIndex(447), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_4[0]", ty: UInt<2> }, + src: StatePartIndex(450), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 266: Or { - dest: StatePartIndex(431), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(430), // (0x1) SlotDebugData { name: "", ty: Bool }, + 262: Or { + dest: StatePartIndex(431), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(430), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, + 263: Or { + dest: StatePartIndex(432), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(431), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 + 264: Copy { + dest: StatePartIndex(429), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_2_4", ty: Bool }, + src: StatePartIndex(432), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 + 265: Or { + dest: StatePartIndex(446), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(445), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(429), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_2_4", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 + 266: Copy { + dest: StatePartIndex(443), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_4", ty: Bool }, + src: StatePartIndex(446), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 267: Or { - dest: StatePartIndex(432), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(431), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 268: Copy { - dest: StatePartIndex(429), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_2_4", ty: Bool }, - src: StatePartIndex(432), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 269: Or { - dest: StatePartIndex(446), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(445), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(429), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_2_4", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 270: Copy { - dest: StatePartIndex(443), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_4", ty: Bool }, - src: StatePartIndex(446), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 271: Or { - dest: StatePartIndex(516), // (0x1) SlotDebugData { name: "", ty: Bool }, + dest: StatePartIndex(516), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(515), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(443), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_4", ty: Bool }, + rhs: StatePartIndex(443), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_4", ty: Bool }, }, - 272: Or { - dest: StatePartIndex(520), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(443), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_4", ty: Bool }, + 268: Or { + dest: StatePartIndex(520), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(443), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_4", ty: Bool }, rhs: StatePartIndex(519), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 273: Or { - dest: StatePartIndex(435), // (0x1) SlotDebugData { name: "", ty: Bool }, + 269: Or { + dest: StatePartIndex(435), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(434), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(434), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 274: BranchIfZero { - target: 276, - value: StatePartIndex(435), // (0x1) SlotDebugData { name: "", ty: Bool }, + 270: BranchIfZero { + target: 272, + value: StatePartIndex(435), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 275: Copy { - dest: StatePartIndex(433), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_2_4[0]", ty: UInt<1> }, + 271: Copy { + dest: StatePartIndex(433), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_2_4[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 276: BranchIfNonZero { - target: 278, - value: StatePartIndex(435), // (0x1) SlotDebugData { name: "", ty: Bool }, + 272: BranchIfNonZero { + target: 274, + value: StatePartIndex(435), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 277: Copy { - dest: StatePartIndex(433), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_2_4[0]", ty: UInt<1> }, + 273: Copy { + dest: StatePartIndex(433), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_2_4[0]", ty: UInt<1> }, src: StatePartIndex(439), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 278: ReadIndexed { - dest: StatePartIndex(452), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(433) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_2_4[0]", ty: UInt<1> } */ [StatePartIndex(33) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 274: ReadIndexed { + dest: StatePartIndex(452), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(433) /* (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_2_4[0]", ty: UInt<1> } */ [StatePartIndex(33) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 279: Add { - dest: StatePartIndex(454), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(452), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + 275: Add { + dest: StatePartIndex(454), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(452), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, rhs: StatePartIndex(453), // (0x2) SlotDebugData { name: "", ty: UInt<64> }, }, - 280: CastToUInt { - dest: StatePartIndex(455), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(454), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, + 276: CastToUInt { + dest: StatePartIndex(455), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(454), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 281: BranchIfNonZero { - target: 283, - value: StatePartIndex(449), // (0x1) SlotDebugData { name: "", ty: Bool }, + 277: BranchIfNonZero { + target: 279, + value: StatePartIndex(449), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 282: Copy { - dest: StatePartIndex(447), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_4[0]", ty: UInt<2> }, - src: StatePartIndex(455), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 278: Copy { + dest: StatePartIndex(447), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_4[0]", ty: UInt<2> }, + src: StatePartIndex(455), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 283: CastToUInt { - dest: StatePartIndex(521), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - src: StatePartIndex(447), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_4[0]", ty: UInt<2> }, + 279: CastToUInt { + dest: StatePartIndex(521), // (0x3) SlotDebugData { name: "", ty: UInt<3> }, + src: StatePartIndex(447), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_4[0]", ty: UInt<2> }, dest_width: 3, }, // at: unit_free_regs_tracker.rs:80:17 - 284: BranchIfZero { - target: 286, - value: StatePartIndex(520), // (0x1) SlotDebugData { name: "", ty: Bool }, + 280: BranchIfZero { + target: 282, + value: StatePartIndex(520), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 285: Copy { - dest: StatePartIndex(518), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_8[0]", ty: UInt<3> }, - src: StatePartIndex(521), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, + 281: Copy { + dest: StatePartIndex(518), // (0x7) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_8[0]", ty: UInt<3> }, + src: StatePartIndex(521), // (0x3) SlotDebugData { name: "", ty: UInt<3> }, }, // at: unit_free_regs_tracker.rs:7:1 - 286: Or { - dest: StatePartIndex(467), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(466), // (0x1) SlotDebugData { name: "", ty: Bool }, + 282: Or { + dest: StatePartIndex(467), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(466), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 287: Or { - dest: StatePartIndex(468), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(467), // (0x1) SlotDebugData { name: "", ty: Bool }, + 283: Or { + dest: StatePartIndex(468), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(467), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 - 288: Copy { - dest: StatePartIndex(465), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_6", ty: Bool }, - src: StatePartIndex(468), // (0x1) SlotDebugData { name: "", ty: Bool }, + 284: Copy { + dest: StatePartIndex(465), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_6", ty: Bool }, + src: StatePartIndex(468), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 - 289: Or { - dest: StatePartIndex(501), // (0x1) SlotDebugData { name: "", ty: Bool }, + 285: Or { + dest: StatePartIndex(501), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(500), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(465), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_6", ty: Bool }, + rhs: StatePartIndex(465), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_6", ty: Bool }, }, - 290: Or { - dest: StatePartIndex(505), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(465), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_6", ty: Bool }, + 286: Or { + dest: StatePartIndex(505), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(465), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_6", ty: Bool }, rhs: StatePartIndex(504), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 291: Or { - dest: StatePartIndex(471), // (0x1) SlotDebugData { name: "", ty: Bool }, + 287: Or { + dest: StatePartIndex(471), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(470), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(470), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 292: BranchIfZero { - target: 294, - value: StatePartIndex(471), // (0x1) SlotDebugData { name: "", ty: Bool }, + 288: BranchIfZero { + target: 290, + value: StatePartIndex(471), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 293: Copy { - dest: StatePartIndex(469), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_6[0]", ty: UInt<1> }, + 289: Copy { + dest: StatePartIndex(469), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_6[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 294: BranchIfNonZero { - target: 296, - value: StatePartIndex(471), // (0x1) SlotDebugData { name: "", ty: Bool }, + 290: BranchIfNonZero { + target: 292, + value: StatePartIndex(471), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 295: Copy { - dest: StatePartIndex(469), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_6[0]", ty: UInt<1> }, + 291: Copy { + dest: StatePartIndex(469), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_6[0]", ty: UInt<1> }, src: StatePartIndex(475), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 296: CastToUInt { - dest: StatePartIndex(506), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(469), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_6[0]", ty: UInt<1> }, + 292: CastToUInt { + dest: StatePartIndex(506), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(469), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_6[0]", ty: UInt<1> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 297: BranchIfZero { - target: 299, - value: StatePartIndex(505), // (0x1) SlotDebugData { name: "", ty: Bool }, + 293: BranchIfZero { + target: 295, + value: StatePartIndex(505), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 298: Copy { - dest: StatePartIndex(503), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_8[0]", ty: UInt<2> }, - src: StatePartIndex(506), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + 294: Copy { + dest: StatePartIndex(503), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_8[0]", ty: UInt<2> }, + src: StatePartIndex(506), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 299: Or { - dest: StatePartIndex(487), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(486), // (0x1) SlotDebugData { name: "", ty: Bool }, + 295: Or { + dest: StatePartIndex(487), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(486), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 300: Or { - dest: StatePartIndex(488), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(487), // (0x1) SlotDebugData { name: "", ty: Bool }, + 296: Or { + dest: StatePartIndex(488), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(487), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 + 297: Copy { + dest: StatePartIndex(485), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_6_8", ty: Bool }, + src: StatePartIndex(488), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 + 298: Or { + dest: StatePartIndex(502), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(501), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(485), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_6_8", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 + 299: Copy { + dest: StatePartIndex(499), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_8", ty: Bool }, + src: StatePartIndex(502), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 + 300: Or { + dest: StatePartIndex(517), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(516), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(499), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_8", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 301: Copy { - dest: StatePartIndex(485), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_6_8", ty: Bool }, - src: StatePartIndex(488), // (0x1) SlotDebugData { name: "", ty: Bool }, + dest: StatePartIndex(514), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_8", ty: Bool }, + src: StatePartIndex(517), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 302: Or { - dest: StatePartIndex(502), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(501), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(485), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_6_8", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 303: Copy { - dest: StatePartIndex(499), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_8", ty: Bool }, - src: StatePartIndex(502), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 304: Or { - dest: StatePartIndex(517), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(516), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(499), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_4_8", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 305: Copy { - dest: StatePartIndex(514), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_8", ty: Bool }, - src: StatePartIndex(517), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 306: Or { - dest: StatePartIndex(657), // (0x1) SlotDebugData { name: "", ty: Bool }, + dest: StatePartIndex(657), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(656), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(514), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_8", ty: Bool }, + rhs: StatePartIndex(514), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_8", ty: Bool }, }, - 307: Or { - dest: StatePartIndex(661), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(514), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_8", ty: Bool }, + 303: Or { + dest: StatePartIndex(661), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(514), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_8", ty: Bool }, rhs: StatePartIndex(660), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 308: Or { - dest: StatePartIndex(491), // (0x1) SlotDebugData { name: "", ty: Bool }, + 304: Or { + dest: StatePartIndex(491), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(490), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(490), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 309: BranchIfZero { - target: 311, - value: StatePartIndex(491), // (0x1) SlotDebugData { name: "", ty: Bool }, + 305: BranchIfZero { + target: 307, + value: StatePartIndex(491), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 310: Copy { - dest: StatePartIndex(489), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_6_8[0]", ty: UInt<1> }, + 306: Copy { + dest: StatePartIndex(489), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_6_8[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 311: BranchIfNonZero { - target: 313, - value: StatePartIndex(491), // (0x1) SlotDebugData { name: "", ty: Bool }, + 307: BranchIfNonZero { + target: 309, + value: StatePartIndex(491), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 312: Copy { - dest: StatePartIndex(489), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_6_8[0]", ty: UInt<1> }, + 308: Copy { + dest: StatePartIndex(489), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_6_8[0]", ty: UInt<1> }, src: StatePartIndex(495), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 313: ReadIndexed { - dest: StatePartIndex(508), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(489) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_6_8[0]", ty: UInt<1> } */ [StatePartIndex(36) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 309: ReadIndexed { + dest: StatePartIndex(508), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(489) /* (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_6_8[0]", ty: UInt<1> } */ [StatePartIndex(36) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 314: Add { - dest: StatePartIndex(509), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(508), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + 310: Add { + dest: StatePartIndex(509), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(508), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, rhs: StatePartIndex(453), // (0x2) SlotDebugData { name: "", ty: UInt<64> }, }, - 315: CastToUInt { - dest: StatePartIndex(510), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(509), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, + 311: CastToUInt { + dest: StatePartIndex(510), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(509), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 316: BranchIfNonZero { - target: 318, - value: StatePartIndex(505), // (0x1) SlotDebugData { name: "", ty: Bool }, + 312: BranchIfNonZero { + target: 314, + value: StatePartIndex(505), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 317: Copy { - dest: StatePartIndex(503), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_8[0]", ty: UInt<2> }, - src: StatePartIndex(510), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 313: Copy { + dest: StatePartIndex(503), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_8[0]", ty: UInt<2> }, + src: StatePartIndex(510), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 318: ReadIndexed { - dest: StatePartIndex(523), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(503) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_8[0]", ty: UInt<2> } */ [StatePartIndex(37) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 314: ReadIndexed { + dest: StatePartIndex(523), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(503) /* (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_4_8[0]", ty: UInt<2> } */ [StatePartIndex(37) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 319: Add { - dest: StatePartIndex(525), // (0x4) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(523), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + 315: Add { + dest: StatePartIndex(525), // (0x7) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(523), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(524), // (0x4) SlotDebugData { name: "", ty: UInt<64> }, }, - 320: CastToUInt { - dest: StatePartIndex(526), // (0x4) SlotDebugData { name: "", ty: UInt<3> }, - src: StatePartIndex(525), // (0x4) SlotDebugData { name: "", ty: UInt<65> }, + 316: CastToUInt { + dest: StatePartIndex(526), // (0x7) SlotDebugData { name: "", ty: UInt<3> }, + src: StatePartIndex(525), // (0x7) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 3, }, // at: unit_free_regs_tracker.rs:80:17 - 321: BranchIfNonZero { - target: 323, - value: StatePartIndex(520), // (0x1) SlotDebugData { name: "", ty: Bool }, + 317: BranchIfNonZero { + target: 319, + value: StatePartIndex(520), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 322: Copy { - dest: StatePartIndex(518), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_8[0]", ty: UInt<3> }, - src: StatePartIndex(526), // (0x4) SlotDebugData { name: "", ty: UInt<3> }, + 318: Copy { + dest: StatePartIndex(518), // (0x7) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_8[0]", ty: UInt<3> }, + src: StatePartIndex(526), // (0x7) SlotDebugData { name: "", ty: UInt<3> }, }, // at: unit_free_regs_tracker.rs:7:1 - 323: CastToUInt { - dest: StatePartIndex(662), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - src: StatePartIndex(518), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_8[0]", ty: UInt<3> }, + 319: CastToUInt { + dest: StatePartIndex(662), // (0x7) SlotDebugData { name: "", ty: UInt<4> }, + src: StatePartIndex(518), // (0x7) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_8[0]", ty: UInt<3> }, dest_width: 4, }, // at: unit_free_regs_tracker.rs:80:17 - 324: BranchIfZero { - target: 326, - value: StatePartIndex(661), // (0x1) SlotDebugData { name: "", ty: Bool }, + 320: BranchIfZero { + target: 322, + value: StatePartIndex(661), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 325: Copy { - dest: StatePartIndex(659), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_16[0]", ty: UInt<4> }, - src: StatePartIndex(662), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, + 321: Copy { + dest: StatePartIndex(659), // (0xf) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_16[0]", ty: UInt<4> }, + src: StatePartIndex(662), // (0x7) SlotDebugData { name: "", ty: UInt<4> }, }, // at: unit_free_regs_tracker.rs:7:1 - 326: Or { - dest: StatePartIndex(538), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(537), // (0x1) SlotDebugData { name: "", ty: Bool }, + 322: Or { + dest: StatePartIndex(538), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(537), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 327: Or { - dest: StatePartIndex(539), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(538), // (0x1) SlotDebugData { name: "", ty: Bool }, + 323: Or { + dest: StatePartIndex(539), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(538), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 - 328: Copy { - dest: StatePartIndex(536), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_10", ty: Bool }, - src: StatePartIndex(539), // (0x1) SlotDebugData { name: "", ty: Bool }, + 324: Copy { + dest: StatePartIndex(536), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_10", ty: Bool }, + src: StatePartIndex(539), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 - 329: Or { - dest: StatePartIndex(572), // (0x1) SlotDebugData { name: "", ty: Bool }, + 325: Or { + dest: StatePartIndex(572), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(571), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(536), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_10", ty: Bool }, + rhs: StatePartIndex(536), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_10", ty: Bool }, }, - 330: Or { - dest: StatePartIndex(576), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(536), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_10", ty: Bool }, + 326: Or { + dest: StatePartIndex(576), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(536), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_10", ty: Bool }, rhs: StatePartIndex(575), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 331: Or { - dest: StatePartIndex(542), // (0x1) SlotDebugData { name: "", ty: Bool }, + 327: Or { + dest: StatePartIndex(542), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(541), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(541), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 332: BranchIfZero { - target: 334, - value: StatePartIndex(542), // (0x1) SlotDebugData { name: "", ty: Bool }, + 328: BranchIfZero { + target: 330, + value: StatePartIndex(542), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 333: Copy { - dest: StatePartIndex(540), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_10[0]", ty: UInt<1> }, + 329: Copy { + dest: StatePartIndex(540), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_10[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 334: BranchIfNonZero { - target: 336, - value: StatePartIndex(542), // (0x1) SlotDebugData { name: "", ty: Bool }, + 330: BranchIfNonZero { + target: 332, + value: StatePartIndex(542), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 335: Copy { - dest: StatePartIndex(540), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_10[0]", ty: UInt<1> }, + 331: Copy { + dest: StatePartIndex(540), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_10[0]", ty: UInt<1> }, src: StatePartIndex(546), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 336: CastToUInt { - dest: StatePartIndex(577), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(540), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_10[0]", ty: UInt<1> }, + 332: CastToUInt { + dest: StatePartIndex(577), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(540), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_10[0]", ty: UInt<1> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 337: BranchIfZero { - target: 339, - value: StatePartIndex(576), // (0x1) SlotDebugData { name: "", ty: Bool }, + 333: BranchIfZero { + target: 335, + value: StatePartIndex(576), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 338: Copy { - dest: StatePartIndex(574), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_12[0]", ty: UInt<2> }, - src: StatePartIndex(577), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + 334: Copy { + dest: StatePartIndex(574), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_12[0]", ty: UInt<2> }, + src: StatePartIndex(577), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 339: Or { - dest: StatePartIndex(558), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(557), // (0x1) SlotDebugData { name: "", ty: Bool }, + 335: Or { + dest: StatePartIndex(558), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(557), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, + 336: Or { + dest: StatePartIndex(559), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(558), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 + 337: Copy { + dest: StatePartIndex(556), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_10_12", ty: Bool }, + src: StatePartIndex(559), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 + 338: Or { + dest: StatePartIndex(573), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(572), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(556), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_10_12", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 + 339: Copy { + dest: StatePartIndex(570), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_12", ty: Bool }, + src: StatePartIndex(573), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 340: Or { - dest: StatePartIndex(559), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(558), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 341: Copy { - dest: StatePartIndex(556), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_10_12", ty: Bool }, - src: StatePartIndex(559), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 342: Or { - dest: StatePartIndex(573), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(572), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(556), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_10_12", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 343: Copy { - dest: StatePartIndex(570), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_12", ty: Bool }, - src: StatePartIndex(573), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 344: Or { - dest: StatePartIndex(642), // (0x1) SlotDebugData { name: "", ty: Bool }, + dest: StatePartIndex(642), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(641), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(570), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_12", ty: Bool }, + rhs: StatePartIndex(570), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_12", ty: Bool }, }, - 345: Or { - dest: StatePartIndex(646), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(570), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_12", ty: Bool }, + 341: Or { + dest: StatePartIndex(646), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(570), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_12", ty: Bool }, rhs: StatePartIndex(645), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 346: Or { - dest: StatePartIndex(562), // (0x1) SlotDebugData { name: "", ty: Bool }, + 342: Or { + dest: StatePartIndex(562), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(561), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(561), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 347: BranchIfZero { - target: 349, - value: StatePartIndex(562), // (0x1) SlotDebugData { name: "", ty: Bool }, + 343: BranchIfZero { + target: 345, + value: StatePartIndex(562), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 348: Copy { - dest: StatePartIndex(560), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_10_12[0]", ty: UInt<1> }, + 344: Copy { + dest: StatePartIndex(560), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_10_12[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 349: BranchIfNonZero { - target: 351, - value: StatePartIndex(562), // (0x1) SlotDebugData { name: "", ty: Bool }, + 345: BranchIfNonZero { + target: 347, + value: StatePartIndex(562), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 350: Copy { - dest: StatePartIndex(560), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_10_12[0]", ty: UInt<1> }, + 346: Copy { + dest: StatePartIndex(560), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_10_12[0]", ty: UInt<1> }, src: StatePartIndex(566), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 351: ReadIndexed { - dest: StatePartIndex(579), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(560) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_10_12[0]", ty: UInt<1> } */ [StatePartIndex(40) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 347: ReadIndexed { + dest: StatePartIndex(579), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(560) /* (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_10_12[0]", ty: UInt<1> } */ [StatePartIndex(40) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 352: Add { - dest: StatePartIndex(580), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(579), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + 348: Add { + dest: StatePartIndex(580), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(579), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, rhs: StatePartIndex(453), // (0x2) SlotDebugData { name: "", ty: UInt<64> }, }, - 353: CastToUInt { - dest: StatePartIndex(581), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(580), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, + 349: CastToUInt { + dest: StatePartIndex(581), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(580), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 354: BranchIfNonZero { - target: 356, - value: StatePartIndex(576), // (0x1) SlotDebugData { name: "", ty: Bool }, + 350: BranchIfNonZero { + target: 352, + value: StatePartIndex(576), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 355: Copy { - dest: StatePartIndex(574), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_12[0]", ty: UInt<2> }, - src: StatePartIndex(581), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 351: Copy { + dest: StatePartIndex(574), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_12[0]", ty: UInt<2> }, + src: StatePartIndex(581), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 356: CastToUInt { - dest: StatePartIndex(647), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - src: StatePartIndex(574), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_12[0]", ty: UInt<2> }, + 352: CastToUInt { + dest: StatePartIndex(647), // (0x3) SlotDebugData { name: "", ty: UInt<3> }, + src: StatePartIndex(574), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_12[0]", ty: UInt<2> }, dest_width: 3, }, // at: unit_free_regs_tracker.rs:80:17 - 357: BranchIfZero { - target: 359, - value: StatePartIndex(646), // (0x1) SlotDebugData { name: "", ty: Bool }, + 353: BranchIfZero { + target: 355, + value: StatePartIndex(646), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 358: Copy { - dest: StatePartIndex(644), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_16[0]", ty: UInt<3> }, - src: StatePartIndex(647), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, + 354: Copy { + dest: StatePartIndex(644), // (0x7) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_16[0]", ty: UInt<3> }, + src: StatePartIndex(647), // (0x3) SlotDebugData { name: "", ty: UInt<3> }, }, // at: unit_free_regs_tracker.rs:7:1 - 359: Or { - dest: StatePartIndex(593), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(592), // (0x1) SlotDebugData { name: "", ty: Bool }, + 355: Or { + dest: StatePartIndex(593), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(592), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 360: Or { - dest: StatePartIndex(594), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(593), // (0x1) SlotDebugData { name: "", ty: Bool }, + 356: Or { + dest: StatePartIndex(594), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(593), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 - 361: Copy { - dest: StatePartIndex(591), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_14", ty: Bool }, - src: StatePartIndex(594), // (0x1) SlotDebugData { name: "", ty: Bool }, + 357: Copy { + dest: StatePartIndex(591), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_14", ty: Bool }, + src: StatePartIndex(594), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 - 362: Or { - dest: StatePartIndex(627), // (0x1) SlotDebugData { name: "", ty: Bool }, + 358: Or { + dest: StatePartIndex(627), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(626), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(591), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_14", ty: Bool }, + rhs: StatePartIndex(591), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_14", ty: Bool }, }, - 363: Or { - dest: StatePartIndex(631), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(591), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_14", ty: Bool }, + 359: Or { + dest: StatePartIndex(631), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(591), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_14", ty: Bool }, rhs: StatePartIndex(630), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 364: Or { - dest: StatePartIndex(597), // (0x1) SlotDebugData { name: "", ty: Bool }, + 360: Or { + dest: StatePartIndex(597), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(596), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(596), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 365: BranchIfZero { - target: 367, - value: StatePartIndex(597), // (0x1) SlotDebugData { name: "", ty: Bool }, + 361: BranchIfZero { + target: 363, + value: StatePartIndex(597), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 366: Copy { - dest: StatePartIndex(595), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_14[0]", ty: UInt<1> }, + 362: Copy { + dest: StatePartIndex(595), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_14[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 367: BranchIfNonZero { - target: 369, - value: StatePartIndex(597), // (0x1) SlotDebugData { name: "", ty: Bool }, + 363: BranchIfNonZero { + target: 365, + value: StatePartIndex(597), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 368: Copy { - dest: StatePartIndex(595), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_14[0]", ty: UInt<1> }, + 364: Copy { + dest: StatePartIndex(595), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_14[0]", ty: UInt<1> }, src: StatePartIndex(601), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 369: CastToUInt { - dest: StatePartIndex(632), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(595), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_14[0]", ty: UInt<1> }, + 365: CastToUInt { + dest: StatePartIndex(632), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(595), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_14[0]", ty: UInt<1> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 370: BranchIfZero { - target: 372, - value: StatePartIndex(631), // (0x1) SlotDebugData { name: "", ty: Bool }, + 366: BranchIfZero { + target: 368, + value: StatePartIndex(631), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 371: Copy { - dest: StatePartIndex(629), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_16[0]", ty: UInt<2> }, - src: StatePartIndex(632), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + 367: Copy { + dest: StatePartIndex(629), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_16[0]", ty: UInt<2> }, + src: StatePartIndex(632), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 372: Or { - dest: StatePartIndex(613), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(612), // (0x1) SlotDebugData { name: "", ty: Bool }, + 368: Or { + dest: StatePartIndex(613), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(612), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 373: Or { - dest: StatePartIndex(614), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(613), // (0x1) SlotDebugData { name: "", ty: Bool }, + 369: Or { + dest: StatePartIndex(614), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(613), // (0x0) SlotDebugData { name: "", ty: Bool }, rhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 + 370: Copy { + dest: StatePartIndex(611), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_14_16", ty: Bool }, + src: StatePartIndex(614), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 + 371: Or { + dest: StatePartIndex(628), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(627), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(611), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_14_16", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 + 372: Copy { + dest: StatePartIndex(625), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_16", ty: Bool }, + src: StatePartIndex(628), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:7:1 + 373: Or { + dest: StatePartIndex(643), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(642), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(625), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_16", ty: Bool }, + }, + // at: unit_free_regs_tracker.rs:69:13 374: Copy { - dest: StatePartIndex(611), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_14_16", ty: Bool }, - src: StatePartIndex(614), // (0x1) SlotDebugData { name: "", ty: Bool }, + dest: StatePartIndex(640), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_16", ty: Bool }, + src: StatePartIndex(643), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 375: Or { - dest: StatePartIndex(628), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(627), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(611), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_14_16", ty: Bool }, + dest: StatePartIndex(658), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(657), // (0x0) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(640), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_16", ty: Bool }, }, // at: unit_free_regs_tracker.rs:69:13 376: Copy { - dest: StatePartIndex(625), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_16", ty: Bool }, - src: StatePartIndex(628), // (0x1) SlotDebugData { name: "", ty: Bool }, + dest: StatePartIndex(655), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_16", ty: Bool }, + src: StatePartIndex(658), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:7:1 377: Or { - dest: StatePartIndex(643), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(642), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(625), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_12_16", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 378: Copy { - dest: StatePartIndex(640), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_16", ty: Bool }, - src: StatePartIndex(643), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 379: Or { - dest: StatePartIndex(658), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(657), // (0x1) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(640), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_8_16", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:69:13 - 380: Copy { - dest: StatePartIndex(655), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_16", ty: Bool }, - src: StatePartIndex(658), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, - // at: unit_free_regs_tracker.rs:7:1 - 381: Or { - dest: StatePartIndex(672), // (0x1) SlotDebugData { name: "", ty: Bool }, - lhs: StatePartIndex(655), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_16", ty: Bool }, + dest: StatePartIndex(672), // (0x0) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(655), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_count_overflowed_0_16", ty: Bool }, rhs: StatePartIndex(671), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 382: Or { - dest: StatePartIndex(617), // (0x1) SlotDebugData { name: "", ty: Bool }, + 378: Or { + dest: StatePartIndex(617), // (0x0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, - rhs: StatePartIndex(616), // (0x1) SlotDebugData { name: "", ty: Bool }, + rhs: StatePartIndex(616), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:80:17 - 383: BranchIfZero { - target: 385, - value: StatePartIndex(617), // (0x1) SlotDebugData { name: "", ty: Bool }, + 379: BranchIfZero { + target: 381, + value: StatePartIndex(617), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:81:21 - 384: Copy { - dest: StatePartIndex(615), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_14_16[0]", ty: UInt<1> }, + 380: Copy { + dest: StatePartIndex(615), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_14_16[0]", ty: UInt<1> }, src: StatePartIndex(414), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:80:17 - 385: BranchIfNonZero { - target: 387, - value: StatePartIndex(617), // (0x1) SlotDebugData { name: "", ty: Bool }, + 381: BranchIfNonZero { + target: 383, + value: StatePartIndex(617), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 386: Copy { - dest: StatePartIndex(615), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_14_16[0]", ty: UInt<1> }, + 382: Copy { + dest: StatePartIndex(615), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_14_16[0]", ty: UInt<1> }, src: StatePartIndex(621), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, // at: unit_free_regs_tracker.rs:7:1 - 387: ReadIndexed { - dest: StatePartIndex(634), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(615) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_14_16[0]", ty: UInt<1> } */ [StatePartIndex(43) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 383: ReadIndexed { + dest: StatePartIndex(634), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, + src: StatePartIndex(615) /* (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_14_16[0]", ty: UInt<1> } */ [StatePartIndex(43) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 388: Add { - dest: StatePartIndex(635), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(634), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, + 384: Add { + dest: StatePartIndex(635), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(634), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, rhs: StatePartIndex(453), // (0x2) SlotDebugData { name: "", ty: UInt<64> }, }, - 389: CastToUInt { - dest: StatePartIndex(636), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(635), // (0x2) SlotDebugData { name: "", ty: UInt<65> }, + 385: CastToUInt { + dest: StatePartIndex(636), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(635), // (0x3) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 2, }, // at: unit_free_regs_tracker.rs:80:17 - 390: BranchIfNonZero { - target: 392, - value: StatePartIndex(631), // (0x1) SlotDebugData { name: "", ty: Bool }, + 386: BranchIfNonZero { + target: 388, + value: StatePartIndex(631), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 391: Copy { - dest: StatePartIndex(629), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_16[0]", ty: UInt<2> }, - src: StatePartIndex(636), // (0x2) SlotDebugData { name: "", ty: UInt<2> }, + 387: Copy { + dest: StatePartIndex(629), // (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_16[0]", ty: UInt<2> }, + src: StatePartIndex(636), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, }, // at: unit_free_regs_tracker.rs:7:1 - 392: ReadIndexed { - dest: StatePartIndex(649), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(629) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_16[0]", ty: UInt<2> } */ [StatePartIndex(44) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 388: ReadIndexed { + dest: StatePartIndex(649), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(629) /* (0x3) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_12_16[0]", ty: UInt<2> } */ [StatePartIndex(44) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 393: Add { - dest: StatePartIndex(650), // (0x4) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(649), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + 389: Add { + dest: StatePartIndex(650), // (0x7) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(649), // (0x3) SlotDebugData { name: "", ty: UInt<2> }, rhs: StatePartIndex(524), // (0x4) SlotDebugData { name: "", ty: UInt<64> }, }, - 394: CastToUInt { - dest: StatePartIndex(651), // (0x4) SlotDebugData { name: "", ty: UInt<3> }, - src: StatePartIndex(650), // (0x4) SlotDebugData { name: "", ty: UInt<65> }, + 390: CastToUInt { + dest: StatePartIndex(651), // (0x7) SlotDebugData { name: "", ty: UInt<3> }, + src: StatePartIndex(650), // (0x7) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 3, }, // at: unit_free_regs_tracker.rs:80:17 - 395: BranchIfNonZero { - target: 397, - value: StatePartIndex(646), // (0x1) SlotDebugData { name: "", ty: Bool }, + 391: BranchIfNonZero { + target: 393, + value: StatePartIndex(646), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 396: Copy { - dest: StatePartIndex(644), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_16[0]", ty: UInt<3> }, - src: StatePartIndex(651), // (0x4) SlotDebugData { name: "", ty: UInt<3> }, + 392: Copy { + dest: StatePartIndex(644), // (0x7) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_16[0]", ty: UInt<3> }, + src: StatePartIndex(651), // (0x7) SlotDebugData { name: "", ty: UInt<3> }, }, // at: unit_free_regs_tracker.rs:7:1 - 397: ReadIndexed { - dest: StatePartIndex(664), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, - src: StatePartIndex(644) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_16[0]", ty: UInt<3> } */ [StatePartIndex(45) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, + 393: ReadIndexed { + dest: StatePartIndex(664), // (0x7) SlotDebugData { name: "", ty: UInt<3> }, + src: StatePartIndex(644) /* (0x7) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_8_16[0]", ty: UInt<3> } */ [StatePartIndex(45) /* (0x0 0) SlotDebugData { name: "", ty: UInt<64> } */ , len=1, stride=1],, }, - 398: Add { - dest: StatePartIndex(666), // (0x8) SlotDebugData { name: "", ty: UInt<65> }, - lhs: StatePartIndex(664), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, + 394: Add { + dest: StatePartIndex(666), // (0xf) SlotDebugData { name: "", ty: UInt<65> }, + lhs: StatePartIndex(664), // (0x7) SlotDebugData { name: "", ty: UInt<3> }, rhs: StatePartIndex(665), // (0x8) SlotDebugData { name: "", ty: UInt<64> }, }, - 399: CastToUInt { - dest: StatePartIndex(667), // (0x8) SlotDebugData { name: "", ty: UInt<4> }, - src: StatePartIndex(666), // (0x8) SlotDebugData { name: "", ty: UInt<65> }, + 395: CastToUInt { + dest: StatePartIndex(667), // (0xf) SlotDebugData { name: "", ty: UInt<4> }, + src: StatePartIndex(666), // (0xf) SlotDebugData { name: "", ty: UInt<65> }, dest_width: 4, }, // at: unit_free_regs_tracker.rs:80:17 - 400: BranchIfNonZero { - target: 402, - value: StatePartIndex(661), // (0x1) SlotDebugData { name: "", ty: Bool }, + 396: BranchIfNonZero { + target: 398, + value: StatePartIndex(661), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:83:21 - 401: Copy { - dest: StatePartIndex(659), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_16[0]", ty: UInt<4> }, - src: StatePartIndex(667), // (0x8) SlotDebugData { name: "", ty: UInt<4> }, + 397: Copy { + dest: StatePartIndex(659), // (0xf) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_16[0]", ty: UInt<4> }, + src: StatePartIndex(667), // (0xf) SlotDebugData { name: "", ty: UInt<4> }, }, // at: unit_free_regs_tracker.rs:7:1 - 402: Copy { + 398: Copy { dest: StatePartIndex(673), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, src: StatePartIndex(304), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 403: Copy { - dest: StatePartIndex(674), // (0x0) SlotDebugData { name: ".1", ty: UInt<4> }, - src: StatePartIndex(659), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_16[0]", ty: UInt<4> }, + 399: Copy { + dest: StatePartIndex(674), // (0xf) SlotDebugData { name: ".1", ty: UInt<4> }, + src: StatePartIndex(659), // (0xf) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::reduced_alloc_nums_0_16[0]", ty: UInt<4> }, }, - 404: Shl { - dest: StatePartIndex(675), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - lhs: StatePartIndex(674), // (0x0) SlotDebugData { name: ".1", ty: UInt<4> }, + 400: Shl { + dest: StatePartIndex(675), // (0x1e) SlotDebugData { name: "", ty: UInt<5> }, + lhs: StatePartIndex(674), // (0xf) SlotDebugData { name: ".1", ty: UInt<4> }, rhs: 1, }, - 405: Or { - dest: StatePartIndex(676), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, + 401: Or { + dest: StatePartIndex(676), // (0x1f) SlotDebugData { name: "", ty: UInt<5> }, lhs: StatePartIndex(673), // (0x1) SlotDebugData { name: ".0", ty: UInt<1> }, - rhs: StatePartIndex(675), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, + rhs: StatePartIndex(675), // (0x1e) SlotDebugData { name: "", ty: UInt<5> }, }, - 406: CastToUInt { - dest: StatePartIndex(677), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, - src: StatePartIndex(676), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, + 402: CastToUInt { + dest: StatePartIndex(677), // (0x1f) SlotDebugData { name: "", ty: UInt<5> }, + src: StatePartIndex(676), // (0x1f) SlotDebugData { name: "", ty: UInt<5> }, dest_width: 5, }, - 407: Copy { - dest: StatePartIndex(678), // (0x1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - src: StatePartIndex(677), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, + 403: Copy { + dest: StatePartIndex(678), // (0x1f) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + src: StatePartIndex(677), // (0x1f) SlotDebugData { name: "", ty: UInt<5> }, }, // at: unit_free_regs_tracker.rs:106:9 - 408: BranchIfZero { - target: 410, - value: StatePartIndex(672), // (0x1) SlotDebugData { name: "", ty: Bool }, + 404: BranchIfZero { + target: 406, + value: StatePartIndex(672), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:107:13 - 409: Copy { - dest: StatePartIndex(339), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - src: StatePartIndex(678), // (0x1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 405: Copy { + dest: StatePartIndex(339), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + src: StatePartIndex(678), // (0x1f) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, // at: unit_free_regs_tracker.rs:106:9 - 410: BranchIfNonZero { - target: 412, - value: StatePartIndex(672), // (0x1) SlotDebugData { name: "", ty: Bool }, + 406: BranchIfNonZero { + target: 408, + value: StatePartIndex(672), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:112:13 - 411: Copy { - dest: StatePartIndex(339), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 407: Copy { + dest: StatePartIndex(339), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(395), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, // at: unit_free_regs_tracker.rs:20:11 - 412: AndBigWithSmallImmediate { - dest: StatePartIndex(24), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, - lhs: StatePartIndex(339), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 408: AndBigWithSmallImmediate { + dest: StatePartIndex(24), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + lhs: StatePartIndex(339), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, rhs: 0x1, }, // at: unit_free_regs_tracker.rs:7:1 - 413: Copy { - dest: StatePartIndex(341), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, - src: StatePartIndex(339), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 409: Copy { + dest: StatePartIndex(341), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, + src: StatePartIndex(339), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 414: SliceInt { + 410: SliceInt { dest: StatePartIndex(342), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - src: StatePartIndex(341), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, + src: StatePartIndex(341), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, start: 1, len: 4, }, - // at: ready_valid.rs:33:9 - 415: BranchIfZero { - target: 417, - value: StatePartIndex(340), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].ready", ty: Bool }, - }, - // at: ready_valid.rs:34:13 - 416: Copy { - dest: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - src: StatePartIndex(339), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - }, - // at: ready_valid.rs:30:27 - 417: AndBigWithSmallImmediate { - dest: StatePartIndex(46), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, - lhs: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - rhs: 0x1, - }, - // at: unit_free_regs_tracker.rs:7:1 - 418: Copy { - dest: StatePartIndex(669), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - src: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - }, - 419: SliceInt { - dest: StatePartIndex(670), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - src: StatePartIndex(669), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, - start: 1, - len: 4, - }, - 420: CastBigToArrayIndex { - dest: StatePartIndex(47), // (0x0 0) SlotDebugData { name: "", ty: UInt<4> }, - src: StatePartIndex(670), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - }, // at: reg_alloc.rs:150:13 - 421: Copy { - dest: StatePartIndex(331), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, - src: StatePartIndex(339), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 411: Copy { + dest: StatePartIndex(331), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + src: StatePartIndex(339), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 422: AndBigWithSmallImmediate { - dest: StatePartIndex(49), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, - lhs: StatePartIndex(331), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 412: AndBigWithSmallImmediate { + dest: StatePartIndex(49), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + lhs: StatePartIndex(331), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 423: Copy { - dest: StatePartIndex(681), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, - src: StatePartIndex(331), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + 413: Copy { + dest: StatePartIndex(681), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, + src: StatePartIndex(331), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 424: SliceInt { + 414: SliceInt { dest: StatePartIndex(682), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, - src: StatePartIndex(681), // (0x1) SlotDebugData { name: "", ty: UInt<5> }, + src: StatePartIndex(681), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, start: 1, len: 4, }, - 425: Const { + // at: reg_alloc.rs:158:9 + 415: Copy { + dest: StatePartIndex(332), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].ready", ty: Bool }, + src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, + // at: reg_alloc.rs:41:1 + 416: Const { dest: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, value: 0x1, }, // at: reg_alloc.rs:61:9 - 426: Copy { + 417: Copy { dest: StatePartIndex(3), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.decoded_insns[0].ready", ty: Bool }, src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 427: Copy { + 418: Copy { dest: StatePartIndex(5), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.decoded_insns[1].ready", ty: Bool }, src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: unit_free_regs_tracker.rs:29:9 - 428: Copy { + 419: Copy { dest: StatePartIndex(336), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].ready", ty: Bool }, src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: ready_valid.rs:33:9 - 429: BranchIfZero { - target: 431, + 420: BranchIfZero { + target: 422, value: StatePartIndex(336), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].ready", ty: Bool }, }, // at: ready_valid.rs:34:13 - 430: Copy { + 421: Copy { dest: StatePartIndex(391), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, src: StatePartIndex(335), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, // at: ready_valid.rs:30:27 - 431: AndBigWithSmallImmediate { + 422: AndBigWithSmallImmediate { dest: StatePartIndex(29), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(391), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, rhs: 0x1, }, // at: unit_free_regs_tracker.rs:7:1 - 432: Copy { + 423: Copy { dest: StatePartIndex(392), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, src: StatePartIndex(391), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, }, - 433: SliceInt { + 424: SliceInt { dest: StatePartIndex(393), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, src: StatePartIndex(392), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, start: 1, len: 4, }, - 434: CastBigToArrayIndex { + 425: CastBigToArrayIndex { dest: StatePartIndex(30), // (0x0 0) SlotDebugData { name: "", ty: UInt<4> }, src: StatePartIndex(393), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, }, // at: unit_free_regs_tracker.rs:31:9 - 435: BranchIfSmallNeImmediate { - target: 437, + 426: BranchIfSmallNeImmediate { + target: 428, lhs: StatePartIndex(29), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, // at: unit_free_regs_tracker.rs:32:13 - 436: WriteIndexed { - dest: StatePartIndex(359) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[0]", ty: Bool } */ [StatePartIndex(30) /* (0x0 0) SlotDebugData { name: "", ty: UInt<4> } */ , len=16, stride=1],, + 427: WriteIndexed { + dest: StatePartIndex(359) /* (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[0]", ty: Bool } */ [StatePartIndex(30) /* (0x0 0) SlotDebugData { name: "", ty: UInt<4> } */ , len=16, stride=1],, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: reg_alloc.rs:150:13 - 437: Copy { + 428: Copy { dest: StatePartIndex(330), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.free_in[0].ready", ty: Bool }, src: StatePartIndex(336), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::free_in[0].ready", ty: Bool }, }, - // at: unit_free_regs_tracker.rs:102:9 - 438: BranchIfSmallNeImmediate { - target: 440, - lhs: StatePartIndex(46), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, - rhs: 0x1, - }, - // at: unit_free_regs_tracker.rs:103:13 - 439: WriteIndexed { - dest: StatePartIndex(359) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[0]", ty: Bool } */ [StatePartIndex(47) /* (0x0 0) SlotDebugData { name: "", ty: UInt<4> } */ , len=16, stride=1],, - src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, - }, // at: reg_alloc.rs:41:1 - 440: Const { + 429: Const { dest: StatePartIndex(269), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, value: 0x0, }, - 441: Copy { + 430: Copy { dest: StatePartIndex(270), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Enum {Trap(Bundle {}), ICacheFlush})} }, src: StatePartIndex(269), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: reg_alloc.rs:50:5 - 442: Copy { + 431: Copy { dest: StatePartIndex(6), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.fetch_decode_special_op.data", ty: Enum {HdlNone, HdlSome(Enum {Trap(Bundle {}), ICacheFlush})} }, src: StatePartIndex(270), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Enum {Trap(Bundle {}), ICacheFlush})} }, }, // at: reg_alloc.rs:41:1 - 443: Copy { + 432: Copy { dest: StatePartIndex(287), // (0x0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(269), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, - 444: Copy { + 433: Copy { dest: StatePartIndex(298), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(269), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, }, // at: reg_alloc.rs:87:21 - 445: Copy { - dest: StatePartIndex(293), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 434: Copy { + dest: StatePartIndex(293), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(298), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, - 446: Copy { + 435: Copy { dest: StatePartIndex(311), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_1_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(298), // (0x0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, // at: reg_alloc.rs:41:1 - 447: Copy { + 436: Copy { dest: StatePartIndex(266), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(6), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.fetch_decode_special_op.data", ty: Enum {HdlNone, HdlSome(Enum {Trap(Bundle {}), ICacheFlush})} }, }, - 448: SliceInt { + 437: SliceInt { dest: StatePartIndex(267), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(266), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, start: 1, len: 1, }, - 449: Copy { + 438: Copy { dest: StatePartIndex(268), // (0x0) SlotDebugData { name: "", ty: Enum {Trap(Bundle {}), ICacheFlush} }, src: StatePartIndex(267), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: reg_alloc.rs:48:11 - 450: AndBigWithSmallImmediate { + 439: AndBigWithSmallImmediate { dest: StatePartIndex(15), // (0x0 0) SlotDebugData { name: "", ty: Enum {Trap, ICacheFlush} }, lhs: StatePartIndex(268), // (0x0) SlotDebugData { name: "", ty: Enum {Trap(Bundle {}), ICacheFlush} }, rhs: 0x1, }, - 451: AndBigWithSmallImmediate { + 440: AndBigWithSmallImmediate { dest: StatePartIndex(14), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(6), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.fetch_decode_special_op.data", ty: Enum {HdlNone, HdlSome(Enum {Trap(Bundle {}), ICacheFlush})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 452: Copy { + 441: Copy { dest: StatePartIndex(140), // (0x802180000000000806051) SlotDebugData { name: "", ty: UInt<135> }, src: StatePartIndex(4), // (0x802180000000000806051) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.decoded_insns[1].data", ty: Enum {HdlNone, HdlSome(Bundle {uop: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})}, is_unrelated_pc: Bool, pc: UInt<64>})} }, }, - 453: SliceInt { + 442: SliceInt { dest: StatePartIndex(141), // (0x4010c0000000000403028) SlotDebugData { name: "", ty: UInt<134> }, src: StatePartIndex(140), // (0x802180000000000806051) SlotDebugData { name: "", ty: UInt<135> }, start: 1, len: 134, }, - 454: SliceInt { + 443: SliceInt { dest: StatePartIndex(142), // (0xc0000000000403028) SlotDebugData { name: "", ty: UInt<69> }, src: StatePartIndex(141), // (0x4010c0000000000403028) SlotDebugData { name: "", ty: UInt<134> }, start: 0, len: 69, }, - 455: Copy { + 444: Copy { dest: StatePartIndex(143), // (0xc0000000000403028) SlotDebugData { name: "", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, src: StatePartIndex(142), // (0xc0000000000403028) SlotDebugData { name: "", ty: UInt<69> }, }, - 456: SliceInt { + 445: SliceInt { dest: StatePartIndex(144), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(141), // (0x4010c0000000000403028) SlotDebugData { name: "", ty: UInt<134> }, start: 69, len: 1, }, - 457: Copy { + 446: Copy { dest: StatePartIndex(145), // (0x0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(144), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 458: SliceInt { + 447: SliceInt { dest: StatePartIndex(146), // (0x1004) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(141), // (0x4010c0000000000403028) SlotDebugData { name: "", ty: UInt<134> }, start: 70, len: 64, }, - 459: Copy { + 448: Copy { dest: StatePartIndex(137), // (0xc0000000000403028) SlotDebugData { name: ".uop", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, src: StatePartIndex(143), // (0xc0000000000403028) SlotDebugData { name: "", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, }, - 460: Copy { + 449: Copy { dest: StatePartIndex(138), // (0x0) SlotDebugData { name: ".is_unrelated_pc", ty: Bool }, src: StatePartIndex(145), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 461: Copy { + 450: Copy { dest: StatePartIndex(139), // (0x1004) SlotDebugData { name: ".pc", ty: UInt<64> }, src: StatePartIndex(146), // (0x1004) SlotDebugData { name: "", ty: UInt<64> }, }, // at: reg_alloc.rs:48:11 - 462: AndBigWithSmallImmediate { + 451: AndBigWithSmallImmediate { dest: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, lhs: StatePartIndex(137), // (0xc0000000000403028) SlotDebugData { name: ".uop", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, rhs: 0x3, }, // at: unit.rs:107:1 - 463: BranchIfSmallNeImmediate { - target: 465, + 452: BranchIfSmallNeImmediate { + target: 454, lhs: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x0, }, - 464: Copy { + 453: Copy { dest: StatePartIndex(309), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(287), // (0x0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, }, - 465: BranchIfSmallNeImmediate { - target: 467, + 454: BranchIfSmallNeImmediate { + target: 456, lhs: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x1, }, - 466: Copy { + 455: Copy { dest: StatePartIndex(309), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(289), // (0x1) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, }, - 467: BranchIfSmallNeImmediate { - target: 469, + 456: BranchIfSmallNeImmediate { + target: 458, lhs: StatePartIndex(8), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x2, }, - 468: Copy { + 457: Copy { dest: StatePartIndex(309), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(291), // (0x2) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, }, - 469: AndBigWithSmallImmediate { + 458: AndBigWithSmallImmediate { dest: StatePartIndex(20), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, lhs: StatePartIndex(309), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x3, }, - 470: BranchIfSmallNeImmediate { - target: 472, + 459: BranchIfSmallNeImmediate { + target: 461, lhs: StatePartIndex(20), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x0, }, - 471: Copy { + 460: Copy { dest: StatePartIndex(310), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 472: BranchIfSmallNeImmediate { - target: 474, + 461: BranchIfSmallNeImmediate { + target: 463, lhs: StatePartIndex(20), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x1, }, - 473: Copy { + 462: Copy { dest: StatePartIndex(310), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 474: BranchIfSmallNeImmediate { - target: 476, + 463: BranchIfSmallNeImmediate { + target: 465, lhs: StatePartIndex(20), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x2, }, - 475: Copy { + 464: Copy { dest: StatePartIndex(310), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: reg_alloc.rs:41:1 - 476: Copy { + 465: Copy { dest: StatePartIndex(147), // (0xc0000000000403028) SlotDebugData { name: "", ty: UInt<69> }, src: StatePartIndex(137), // (0xc0000000000403028) SlotDebugData { name: ".uop", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, }, - 477: SliceInt { + 466: SliceInt { dest: StatePartIndex(148), // (0x30000000000100c0a) SlotDebugData { name: "", ty: UInt<67> }, src: StatePartIndex(147), // (0xc0000000000403028) SlotDebugData { name: "", ty: UInt<69> }, start: 2, len: 67, }, - 478: Copy { + 467: Copy { dest: StatePartIndex(149), // (0x30000000000100c0a) SlotDebugData { name: "", ty: Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})} }, src: StatePartIndex(148), // (0x30000000000100c0a) SlotDebugData { name: "", ty: UInt<67> }, }, // at: reg_alloc.rs:48:11 - 479: AndBigWithSmallImmediate { + 468: AndBigWithSmallImmediate { dest: StatePartIndex(9), // (0x2 2) SlotDebugData { name: "", ty: Enum {AddSub, AddSubI, Logical} }, lhs: StatePartIndex(149), // (0x30000000000100c0a) SlotDebugData { name: "", ty: Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})} }, rhs: 0x3, }, // at: reg_alloc.rs:41:1 - 480: Copy { + 469: Copy { dest: StatePartIndex(177), // (0x30000000000100c0a) SlotDebugData { name: "", ty: UInt<67> }, src: StatePartIndex(149), // (0x30000000000100c0a) SlotDebugData { name: "", ty: Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})} }, }, - 481: SliceInt { + 470: SliceInt { dest: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, src: StatePartIndex(177), // (0x30000000000100c0a) SlotDebugData { name: "", ty: UInt<67> }, start: 2, len: 65, }, - 482: SliceInt { + 471: SliceInt { dest: StatePartIndex(179), // (0x40302) SlotDebugData { name: "", ty: UInt<61> }, src: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, start: 0, len: 61, }, - 483: SliceInt { + 472: SliceInt { dest: StatePartIndex(180), // (0x40302) SlotDebugData { name: "", ty: UInt<58> }, src: StatePartIndex(179), // (0x40302) SlotDebugData { name: "", ty: UInt<61> }, start: 0, len: 58, }, - 484: SliceInt { + 473: SliceInt { dest: StatePartIndex(181), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, src: StatePartIndex(180), // (0x40302) SlotDebugData { name: "", ty: UInt<58> }, start: 0, len: 0, }, - 485: SliceInt { + 474: SliceInt { dest: StatePartIndex(182), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(180), // (0x40302) SlotDebugData { name: "", ty: UInt<58> }, start: 0, len: 8, }, - 486: SliceInt { + 475: SliceInt { dest: StatePartIndex(186), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, src: StatePartIndex(180), // (0x40302) SlotDebugData { name: "", ty: UInt<58> }, start: 8, len: 24, }, - 487: SliceInt { + 476: SliceInt { dest: StatePartIndex(187), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(186), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 0, len: 8, }, - 488: SliceInt { + 477: SliceInt { dest: StatePartIndex(188), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(186), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 8, len: 8, }, - 489: SliceInt { + 478: SliceInt { dest: StatePartIndex(189), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(186), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 16, len: 8, }, - 490: Copy { + 479: Copy { dest: StatePartIndex(183), // (0x3) SlotDebugData { name: "[0]", ty: UInt<8> }, src: StatePartIndex(187), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, }, - 491: Copy { + 480: Copy { dest: StatePartIndex(184), // (0x4) SlotDebugData { name: "[1]", ty: UInt<8> }, src: StatePartIndex(188), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, }, - 492: Copy { + 481: Copy { dest: StatePartIndex(185), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> }, src: StatePartIndex(189), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, }, - 493: SliceInt { + 482: SliceInt { dest: StatePartIndex(190), // (0x0) SlotDebugData { name: "", ty: UInt<25> }, src: StatePartIndex(180), // (0x40302) SlotDebugData { name: "", ty: UInt<58> }, start: 32, len: 25, }, - 494: SliceInt { + 483: SliceInt { dest: StatePartIndex(191), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(180), // (0x40302) SlotDebugData { name: "", ty: UInt<58> }, start: 57, len: 1, }, - 495: CastToSInt { + 484: CastToSInt { dest: StatePartIndex(192), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, src: StatePartIndex(191), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 496: Copy { + 485: Copy { dest: StatePartIndex(170), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<0> }, src: StatePartIndex(181), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, }, - 497: Copy { + 486: Copy { dest: StatePartIndex(171), // (0x2) SlotDebugData { name: ".dest", ty: UInt<8> }, src: StatePartIndex(182), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, }, - 498: Copy { + 487: Copy { dest: StatePartIndex(172), // (0x3) SlotDebugData { name: ".src[0]", ty: UInt<8> }, src: StatePartIndex(183), // (0x3) SlotDebugData { name: "[0]", ty: UInt<8> }, }, - 499: Copy { + 488: Copy { dest: StatePartIndex(173), // (0x4) SlotDebugData { name: ".src[1]", ty: UInt<8> }, src: StatePartIndex(184), // (0x4) SlotDebugData { name: "[1]", ty: UInt<8> }, }, - 500: Copy { + 489: Copy { dest: StatePartIndex(174), // (0x0) SlotDebugData { name: ".src[2]", ty: UInt<8> }, src: StatePartIndex(185), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> }, }, - 501: Copy { + 490: Copy { dest: StatePartIndex(175), // (0x0) SlotDebugData { name: ".imm_low", ty: UInt<25> }, src: StatePartIndex(190), // (0x0) SlotDebugData { name: "", ty: UInt<25> }, }, - 502: Copy { + 491: Copy { dest: StatePartIndex(176), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, src: StatePartIndex(192), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, }, - 503: SliceInt { + 492: SliceInt { dest: StatePartIndex(193), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, src: StatePartIndex(179), // (0x40302) SlotDebugData { name: "", ty: UInt<61> }, start: 58, len: 3, }, - 504: Copy { + 493: Copy { dest: StatePartIndex(194), // (0x0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(193), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, }, - 505: Copy { + 494: Copy { dest: StatePartIndex(162), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<0> }, src: StatePartIndex(170), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<0> }, }, - 506: Copy { + 495: Copy { dest: StatePartIndex(163), // (0x2) SlotDebugData { name: ".common.dest", ty: UInt<8> }, src: StatePartIndex(171), // (0x2) SlotDebugData { name: ".dest", ty: UInt<8> }, }, - 507: Copy { + 496: Copy { dest: StatePartIndex(164), // (0x3) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, src: StatePartIndex(172), // (0x3) SlotDebugData { name: ".src[0]", ty: UInt<8> }, }, - 508: Copy { + 497: Copy { dest: StatePartIndex(165), // (0x4) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, src: StatePartIndex(173), // (0x4) SlotDebugData { name: ".src[1]", ty: UInt<8> }, }, - 509: Copy { + 498: Copy { dest: StatePartIndex(166), // (0x0) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, src: StatePartIndex(174), // (0x0) SlotDebugData { name: ".src[2]", ty: UInt<8> }, }, - 510: Copy { + 499: Copy { dest: StatePartIndex(167), // (0x0) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, src: StatePartIndex(175), // (0x0) SlotDebugData { name: ".imm_low", ty: UInt<25> }, }, - 511: Copy { + 500: Copy { dest: StatePartIndex(168), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, src: StatePartIndex(176), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, }, - 512: Copy { + 501: Copy { dest: StatePartIndex(169), // (0x0) SlotDebugData { name: ".output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(194), // (0x0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, }, - 513: SliceInt { + 502: SliceInt { dest: StatePartIndex(195), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, start: 61, len: 1, }, - 514: Copy { + 503: Copy { dest: StatePartIndex(196), // (0x0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(195), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 515: SliceInt { + 504: SliceInt { dest: StatePartIndex(197), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, start: 62, len: 1, }, - 516: Copy { + 505: Copy { dest: StatePartIndex(198), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(197), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 517: SliceInt { + 506: SliceInt { dest: StatePartIndex(199), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, start: 63, len: 1, }, - 518: Copy { + 507: Copy { dest: StatePartIndex(200), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(199), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 519: SliceInt { + 508: SliceInt { dest: StatePartIndex(201), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, start: 64, len: 1, }, - 520: Copy { + 509: Copy { dest: StatePartIndex(202), // (0x0) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(201), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 521: Copy { + 510: Copy { dest: StatePartIndex(150), // (0x0) SlotDebugData { name: ".alu_common.common.prefix_pad", ty: UInt<0> }, src: StatePartIndex(162), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<0> }, }, - 522: Copy { + 511: Copy { dest: StatePartIndex(151), // (0x2) SlotDebugData { name: ".alu_common.common.dest", ty: UInt<8> }, src: StatePartIndex(163), // (0x2) SlotDebugData { name: ".common.dest", ty: UInt<8> }, }, - 523: Copy { + 512: Copy { dest: StatePartIndex(152), // (0x3) SlotDebugData { name: ".alu_common.common.src[0]", ty: UInt<8> }, src: StatePartIndex(164), // (0x3) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, }, - 524: Copy { + 513: Copy { dest: StatePartIndex(153), // (0x4) SlotDebugData { name: ".alu_common.common.src[1]", ty: UInt<8> }, src: StatePartIndex(165), // (0x4) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, }, - 525: Copy { + 514: Copy { dest: StatePartIndex(154), // (0x0) SlotDebugData { name: ".alu_common.common.src[2]", ty: UInt<8> }, src: StatePartIndex(166), // (0x0) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, }, - 526: Copy { + 515: Copy { dest: StatePartIndex(155), // (0x0) SlotDebugData { name: ".alu_common.common.imm_low", ty: UInt<25> }, src: StatePartIndex(167), // (0x0) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, }, - 527: Copy { + 516: Copy { dest: StatePartIndex(156), // (0x0) SlotDebugData { name: ".alu_common.common.imm_sign", ty: SInt<1> }, src: StatePartIndex(168), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, }, - 528: Copy { + 517: Copy { dest: StatePartIndex(157), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(169), // (0x0) SlotDebugData { name: ".output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, }, - 529: Copy { + 518: Copy { dest: StatePartIndex(158), // (0x0) SlotDebugData { name: ".invert_src0", ty: Bool }, src: StatePartIndex(196), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 530: Copy { + 519: Copy { dest: StatePartIndex(159), // (0x1) SlotDebugData { name: ".invert_carry_in", ty: Bool }, src: StatePartIndex(198), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 531: Copy { + 520: Copy { dest: StatePartIndex(160), // (0x1) SlotDebugData { name: ".invert_carry_out", ty: Bool }, src: StatePartIndex(200), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 532: Copy { + 521: Copy { dest: StatePartIndex(161), // (0x0) SlotDebugData { name: ".add_pc", ty: Bool }, src: StatePartIndex(202), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: reg_alloc.rs:48:11 - 533: AndBigWithSmallImmediate { + 522: AndBigWithSmallImmediate { dest: StatePartIndex(10), // (0x0 0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, lhs: StatePartIndex(157), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, rhs: 0x7, }, // at: reg_alloc.rs:41:1 - 534: SliceInt { + 523: SliceInt { dest: StatePartIndex(212), // (0x6) SlotDebugData { name: "", ty: UInt<4> }, src: StatePartIndex(178), // (0xc000000000040302) SlotDebugData { name: "", ty: UInt<65> }, start: 61, len: 4, }, - 535: Copy { + 524: Copy { dest: StatePartIndex(203), // (0x0) SlotDebugData { name: ".alu_common.common.prefix_pad", ty: UInt<0> }, src: StatePartIndex(162), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<0> }, }, - 536: Copy { + 525: Copy { dest: StatePartIndex(204), // (0x2) SlotDebugData { name: ".alu_common.common.dest", ty: UInt<8> }, src: StatePartIndex(163), // (0x2) SlotDebugData { name: ".common.dest", ty: UInt<8> }, }, - 537: Copy { + 526: Copy { dest: StatePartIndex(205), // (0x3) SlotDebugData { name: ".alu_common.common.src[0]", ty: UInt<8> }, src: StatePartIndex(164), // (0x3) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, }, - 538: Copy { + 527: Copy { dest: StatePartIndex(206), // (0x4) SlotDebugData { name: ".alu_common.common.src[1]", ty: UInt<8> }, src: StatePartIndex(165), // (0x4) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, }, - 539: Copy { + 528: Copy { dest: StatePartIndex(207), // (0x0) SlotDebugData { name: ".alu_common.common.src[2]", ty: UInt<8> }, src: StatePartIndex(166), // (0x0) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, }, - 540: Copy { + 529: Copy { dest: StatePartIndex(208), // (0x0) SlotDebugData { name: ".alu_common.common.imm_low", ty: UInt<25> }, src: StatePartIndex(167), // (0x0) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, }, - 541: Copy { + 530: Copy { dest: StatePartIndex(209), // (0x0) SlotDebugData { name: ".alu_common.common.imm_sign", ty: SInt<1> }, src: StatePartIndex(168), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, }, - 542: Copy { + 531: Copy { dest: StatePartIndex(210), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(169), // (0x0) SlotDebugData { name: ".output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, }, - 543: Copy { + 532: Copy { dest: StatePartIndex(211), // (0x6) SlotDebugData { name: ".lut", ty: UInt<4> }, src: StatePartIndex(212), // (0x6) SlotDebugData { name: "", ty: UInt<4> }, }, // at: reg_alloc.rs:48:11 - 544: AndBigWithSmallImmediate { + 533: AndBigWithSmallImmediate { dest: StatePartIndex(11), // (0x0 0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, lhs: StatePartIndex(210), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, rhs: 0x7, }, // at: reg_alloc.rs:41:1 - 545: SliceInt { + 534: SliceInt { dest: StatePartIndex(213), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, src: StatePartIndex(147), // (0xc0000000000403028) SlotDebugData { name: "", ty: UInt<69> }, start: 2, len: 60, }, - 546: Copy { + 535: Copy { dest: StatePartIndex(214), // (0x100c0a) SlotDebugData { name: "", ty: Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})} }, src: StatePartIndex(213), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, }, // at: reg_alloc.rs:48:11 - 547: AndBigWithSmallImmediate { + 536: AndBigWithSmallImmediate { dest: StatePartIndex(12), // (0x0 0) SlotDebugData { name: "", ty: Enum {ReadL2Reg, WriteL2Reg} }, lhs: StatePartIndex(214), // (0x100c0a) SlotDebugData { name: "", ty: Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 548: Copy { + 537: Copy { dest: StatePartIndex(229), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, src: StatePartIndex(214), // (0x100c0a) SlotDebugData { name: "", ty: Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})} }, }, - 549: SliceInt { + 538: SliceInt { dest: StatePartIndex(230), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, src: StatePartIndex(229), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, start: 1, len: 59, }, - 550: SliceInt { + 539: SliceInt { dest: StatePartIndex(231), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, src: StatePartIndex(230), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 0, len: 59, }, - 551: SliceInt { + 540: SliceInt { dest: StatePartIndex(232), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(231), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 0, len: 1, }, - 552: SliceInt { + 541: SliceInt { dest: StatePartIndex(233), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(231), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 1, len: 8, }, - 553: SliceInt { + 542: SliceInt { dest: StatePartIndex(237), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, src: StatePartIndex(231), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 9, len: 24, }, - 554: SliceInt { + 543: SliceInt { dest: StatePartIndex(238), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(237), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 0, len: 8, }, - 555: SliceInt { + 544: SliceInt { dest: StatePartIndex(239), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(237), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 8, len: 8, }, - 556: SliceInt { + 545: SliceInt { dest: StatePartIndex(240), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(237), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 16, len: 8, }, - 557: Copy { + 546: Copy { dest: StatePartIndex(234), // (0x3) SlotDebugData { name: "[0]", ty: UInt<8> }, src: StatePartIndex(238), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, }, - 558: Copy { + 547: Copy { dest: StatePartIndex(235), // (0x4) SlotDebugData { name: "[1]", ty: UInt<8> }, src: StatePartIndex(239), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, }, - 559: Copy { + 548: Copy { dest: StatePartIndex(236), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> }, src: StatePartIndex(240), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, }, - 560: SliceInt { + 549: SliceInt { dest: StatePartIndex(241), // (0x0) SlotDebugData { name: "", ty: UInt<25> }, src: StatePartIndex(231), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 33, len: 25, }, - 561: SliceInt { + 550: SliceInt { dest: StatePartIndex(242), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(231), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 58, len: 1, }, - 562: CastToSInt { + 551: CastToSInt { dest: StatePartIndex(243), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, src: StatePartIndex(242), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 563: Copy { + 552: Copy { dest: StatePartIndex(222), // (0x1) SlotDebugData { name: ".prefix_pad", ty: UInt<1> }, src: StatePartIndex(232), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 564: Copy { + 553: Copy { dest: StatePartIndex(223), // (0x2) SlotDebugData { name: ".dest", ty: UInt<8> }, src: StatePartIndex(233), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, }, - 565: Copy { + 554: Copy { dest: StatePartIndex(224), // (0x3) SlotDebugData { name: ".src[0]", ty: UInt<8> }, src: StatePartIndex(234), // (0x3) SlotDebugData { name: "[0]", ty: UInt<8> }, }, - 566: Copy { + 555: Copy { dest: StatePartIndex(225), // (0x4) SlotDebugData { name: ".src[1]", ty: UInt<8> }, src: StatePartIndex(235), // (0x4) SlotDebugData { name: "[1]", ty: UInt<8> }, }, - 567: Copy { + 556: Copy { dest: StatePartIndex(226), // (0x0) SlotDebugData { name: ".src[2]", ty: UInt<8> }, src: StatePartIndex(236), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> }, }, - 568: Copy { + 557: Copy { dest: StatePartIndex(227), // (0x0) SlotDebugData { name: ".imm_low", ty: UInt<25> }, src: StatePartIndex(241), // (0x0) SlotDebugData { name: "", ty: UInt<25> }, }, - 569: Copy { + 558: Copy { dest: StatePartIndex(228), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, src: StatePartIndex(243), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, }, - 570: Copy { + 559: Copy { dest: StatePartIndex(215), // (0x1) SlotDebugData { name: ".common.prefix_pad", ty: UInt<1> }, src: StatePartIndex(222), // (0x1) SlotDebugData { name: ".prefix_pad", ty: UInt<1> }, }, - 571: Copy { + 560: Copy { dest: StatePartIndex(216), // (0x2) SlotDebugData { name: ".common.dest", ty: UInt<8> }, src: StatePartIndex(223), // (0x2) SlotDebugData { name: ".dest", ty: UInt<8> }, }, - 572: Copy { + 561: Copy { dest: StatePartIndex(217), // (0x3) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, src: StatePartIndex(224), // (0x3) SlotDebugData { name: ".src[0]", ty: UInt<8> }, }, - 573: Copy { + 562: Copy { dest: StatePartIndex(218), // (0x4) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, src: StatePartIndex(225), // (0x4) SlotDebugData { name: ".src[1]", ty: UInt<8> }, }, - 574: Copy { + 563: Copy { dest: StatePartIndex(219), // (0x0) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, src: StatePartIndex(226), // (0x0) SlotDebugData { name: ".src[2]", ty: UInt<8> }, }, - 575: Copy { + 564: Copy { dest: StatePartIndex(220), // (0x0) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, src: StatePartIndex(227), // (0x0) SlotDebugData { name: ".imm_low", ty: UInt<25> }, }, - 576: Copy { + 565: Copy { dest: StatePartIndex(221), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, src: StatePartIndex(228), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, }, - 577: Copy { + 566: Copy { dest: StatePartIndex(244), // (0x100c0a) SlotDebugData { name: "", ty: Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})} }, src: StatePartIndex(213), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, }, // at: reg_alloc.rs:48:11 - 578: AndBigWithSmallImmediate { + 567: AndBigWithSmallImmediate { dest: StatePartIndex(13), // (0x0 0) SlotDebugData { name: "", ty: Enum {Load, Store} }, lhs: StatePartIndex(244), // (0x100c0a) SlotDebugData { name: "", ty: Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 579: Copy { + 568: Copy { dest: StatePartIndex(252), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, src: StatePartIndex(244), // (0x100c0a) SlotDebugData { name: "", ty: Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})} }, }, - 580: SliceInt { + 569: SliceInt { dest: StatePartIndex(253), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, src: StatePartIndex(252), // (0x100c0a) SlotDebugData { name: "", ty: UInt<60> }, start: 1, len: 59, }, - 581: SliceInt { + 570: SliceInt { dest: StatePartIndex(254), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(253), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 0, len: 1, }, - 582: SliceInt { + 571: SliceInt { dest: StatePartIndex(255), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(253), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 1, len: 8, }, - 583: SliceInt { + 572: SliceInt { dest: StatePartIndex(259), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, src: StatePartIndex(253), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 9, len: 24, }, - 584: SliceInt { + 573: SliceInt { dest: StatePartIndex(260), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(259), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 0, len: 8, }, - 585: SliceInt { + 574: SliceInt { dest: StatePartIndex(261), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(259), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 8, len: 8, }, - 586: SliceInt { + 575: SliceInt { dest: StatePartIndex(262), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(259), // (0x403) SlotDebugData { name: "", ty: UInt<24> }, start: 16, len: 8, }, - 587: Copy { + 576: Copy { dest: StatePartIndex(256), // (0x3) SlotDebugData { name: "[0]", ty: UInt<8> }, src: StatePartIndex(260), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, }, - 588: Copy { + 577: Copy { dest: StatePartIndex(257), // (0x4) SlotDebugData { name: "[1]", ty: UInt<8> }, src: StatePartIndex(261), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, }, - 589: Copy { + 578: Copy { dest: StatePartIndex(258), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> }, src: StatePartIndex(262), // (0x0) SlotDebugData { name: "", ty: UInt<8> }, }, - 590: SliceInt { + 579: SliceInt { dest: StatePartIndex(263), // (0x0) SlotDebugData { name: "", ty: UInt<25> }, src: StatePartIndex(253), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 33, len: 25, }, - 591: SliceInt { + 580: SliceInt { dest: StatePartIndex(264), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(253), // (0x80605) SlotDebugData { name: "", ty: UInt<59> }, start: 58, len: 1, }, - 592: CastToSInt { + 581: CastToSInt { dest: StatePartIndex(265), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, src: StatePartIndex(264), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 593: Copy { + 582: Copy { dest: StatePartIndex(245), // (0x1) SlotDebugData { name: ".prefix_pad", ty: UInt<1> }, src: StatePartIndex(254), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 594: Copy { + 583: Copy { dest: StatePartIndex(246), // (0x2) SlotDebugData { name: ".dest", ty: UInt<8> }, src: StatePartIndex(255), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, }, - 595: Copy { + 584: Copy { dest: StatePartIndex(247), // (0x3) SlotDebugData { name: ".src[0]", ty: UInt<8> }, src: StatePartIndex(256), // (0x3) SlotDebugData { name: "[0]", ty: UInt<8> }, }, - 596: Copy { + 585: Copy { dest: StatePartIndex(248), // (0x4) SlotDebugData { name: ".src[1]", ty: UInt<8> }, src: StatePartIndex(257), // (0x4) SlotDebugData { name: "[1]", ty: UInt<8> }, }, - 597: Copy { + 586: Copy { dest: StatePartIndex(249), // (0x0) SlotDebugData { name: ".src[2]", ty: UInt<8> }, src: StatePartIndex(258), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> }, }, - 598: Copy { + 587: Copy { dest: StatePartIndex(250), // (0x0) SlotDebugData { name: ".imm_low", ty: UInt<25> }, src: StatePartIndex(263), // (0x0) SlotDebugData { name: "", ty: UInt<25> }, }, - 599: Copy { + 588: Copy { dest: StatePartIndex(251), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, src: StatePartIndex(265), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, }, // at: reg_alloc.rs:48:11 - 600: AndBigWithSmallImmediate { + 589: AndBigWithSmallImmediate { dest: StatePartIndex(7), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(4), // (0x802180000000000806051) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.decoded_insns[1].data", ty: Enum {HdlNone, HdlSome(Bundle {uop: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})}, is_unrelated_pc: Bool, pc: UInt<64>})} }, rhs: 0x1, }, // at: reg_alloc.rs:70:9 - 601: BranchIfSmallNeImmediate { - target: 603, + 590: BranchIfSmallNeImmediate { + target: 592, lhs: StatePartIndex(7), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, // at: reg_alloc.rs:71:13 - 602: Copy { + 591: Copy { dest: StatePartIndex(272), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[1][0]", ty: Bool }, src: StatePartIndex(310), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, }, // at: reg_alloc.rs:41:1 - 603: Copy { + 592: Copy { dest: StatePartIndex(11), // (0x8007c0002468080604021) SlotDebugData { name: "", ty: UInt<135> }, src: StatePartIndex(2), // (0x8007c0002468080604021) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.decoded_insns[0].data", ty: Enum {HdlNone, HdlSome(Bundle {uop: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})}, is_unrelated_pc: Bool, pc: UInt<64>})} }, }, - 604: SliceInt { + 593: SliceInt { dest: StatePartIndex(12), // (0x4003e0001234040302010) SlotDebugData { name: "", ty: UInt<134> }, src: StatePartIndex(11), // (0x8007c0002468080604021) SlotDebugData { name: "", ty: UInt<135> }, start: 1, len: 134, }, - 605: SliceInt { + 594: SliceInt { dest: StatePartIndex(13), // (0x1e0001234040302010) SlotDebugData { name: "", ty: UInt<69> }, src: StatePartIndex(12), // (0x4003e0001234040302010) SlotDebugData { name: "", ty: UInt<134> }, start: 0, len: 69, }, - 606: Copy { + 595: Copy { dest: StatePartIndex(14), // (0x1e0001234040302010) SlotDebugData { name: "", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, src: StatePartIndex(13), // (0x1e0001234040302010) SlotDebugData { name: "", ty: UInt<69> }, }, - 607: SliceInt { + 596: SliceInt { dest: StatePartIndex(15), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(12), // (0x4003e0001234040302010) SlotDebugData { name: "", ty: UInt<134> }, start: 69, len: 1, }, - 608: Copy { + 597: Copy { dest: StatePartIndex(16), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(15), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 609: SliceInt { + 598: SliceInt { dest: StatePartIndex(17), // (0x1000) SlotDebugData { name: "", ty: UInt<64> }, src: StatePartIndex(12), // (0x4003e0001234040302010) SlotDebugData { name: "", ty: UInt<134> }, start: 70, len: 64, }, - 610: Copy { + 599: Copy { dest: StatePartIndex(8), // (0x1e0001234040302010) SlotDebugData { name: ".uop", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, src: StatePartIndex(14), // (0x1e0001234040302010) SlotDebugData { name: "", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, }, - 611: Copy { + 600: Copy { dest: StatePartIndex(9), // (0x1) SlotDebugData { name: ".is_unrelated_pc", ty: Bool }, src: StatePartIndex(16), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 612: Copy { + 601: Copy { dest: StatePartIndex(10), // (0x1000) SlotDebugData { name: ".pc", ty: UInt<64> }, src: StatePartIndex(17), // (0x1000) SlotDebugData { name: "", ty: UInt<64> }, }, // at: reg_alloc.rs:48:11 - 613: AndBigWithSmallImmediate { + 602: AndBigWithSmallImmediate { dest: StatePartIndex(1), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, lhs: StatePartIndex(8), // (0x1e0001234040302010) SlotDebugData { name: ".uop", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, rhs: 0x3, }, // at: unit.rs:107:1 - 614: BranchIfSmallNeImmediate { - target: 616, + 603: BranchIfSmallNeImmediate { + target: 605, lhs: StatePartIndex(1), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x0, }, - 615: Copy { + 604: Copy { dest: StatePartIndex(286), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(287), // (0x0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, }, - 616: BranchIfSmallNeImmediate { - target: 618, + 605: BranchIfSmallNeImmediate { + target: 607, lhs: StatePartIndex(1), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x1, }, - 617: Copy { + 606: Copy { dest: StatePartIndex(286), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(289), // (0x1) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, }, - 618: BranchIfSmallNeImmediate { - target: 620, + 607: BranchIfSmallNeImmediate { + target: 609, lhs: StatePartIndex(1), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x2, }, - 619: Copy { + 608: Copy { dest: StatePartIndex(286), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, src: StatePartIndex(291), // (0x2) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, }, - 620: AndBigWithSmallImmediate { + 609: AndBigWithSmallImmediate { dest: StatePartIndex(18), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, lhs: StatePartIndex(286), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_kind", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x3, }, - 621: BranchIfSmallNeImmediate { - target: 623, + 610: BranchIfSmallNeImmediate { + target: 612, lhs: StatePartIndex(18), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x0, }, - 622: Copy { + 611: Copy { dest: StatePartIndex(292), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 623: BranchIfSmallNeImmediate { - target: 625, + 612: BranchIfSmallNeImmediate { + target: 614, lhs: StatePartIndex(18), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x1, }, - 624: Copy { + 613: Copy { dest: StatePartIndex(292), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, - 625: BranchIfSmallNeImmediate { - target: 627, + 614: BranchIfSmallNeImmediate { + target: 616, lhs: StatePartIndex(18), // (0x0 0) SlotDebugData { name: "", ty: Enum {AluBranch, L2RegisterFile, LoadStore} }, rhs: 0x2, }, - 626: Copy { + 615: Copy { dest: StatePartIndex(292), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, // at: reg_alloc.rs:41:1 - 627: Copy { + 616: Copy { dest: StatePartIndex(18), // (0x1e0001234040302010) SlotDebugData { name: "", ty: UInt<69> }, src: StatePartIndex(8), // (0x1e0001234040302010) SlotDebugData { name: ".uop", ty: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})} }, }, - 628: SliceInt { + 617: SliceInt { dest: StatePartIndex(19), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: UInt<67> }, src: StatePartIndex(18), // (0x1e0001234040302010) SlotDebugData { name: "", ty: UInt<69> }, start: 2, len: 67, }, - 629: Copy { + 618: Copy { dest: StatePartIndex(20), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})} }, src: StatePartIndex(19), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: UInt<67> }, }, // at: reg_alloc.rs:48:11 - 630: AndBigWithSmallImmediate { + 619: AndBigWithSmallImmediate { dest: StatePartIndex(2), // (0x0 0) SlotDebugData { name: "", ty: Enum {AddSub, AddSubI, Logical} }, lhs: StatePartIndex(20), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})} }, rhs: 0x3, }, // at: reg_alloc.rs:41:1 - 631: Copy { + 620: Copy { dest: StatePartIndex(48), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: UInt<67> }, src: StatePartIndex(20), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})} }, }, - 632: SliceInt { + 621: SliceInt { dest: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, src: StatePartIndex(48), // (0x7800048d0100c0804) SlotDebugData { name: "", ty: UInt<67> }, start: 2, len: 65, }, - 633: SliceInt { + 622: SliceInt { dest: StatePartIndex(50), // (0x123404030201) SlotDebugData { name: "", ty: UInt<61> }, src: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, start: 0, len: 61, }, - 634: SliceInt { + 623: SliceInt { dest: StatePartIndex(51), // (0x123404030201) SlotDebugData { name: "", ty: UInt<58> }, src: StatePartIndex(50), // (0x123404030201) SlotDebugData { name: "", ty: UInt<61> }, start: 0, len: 58, }, - 635: SliceInt { + 624: SliceInt { dest: StatePartIndex(52), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, src: StatePartIndex(51), // (0x123404030201) SlotDebugData { name: "", ty: UInt<58> }, start: 0, len: 0, }, - 636: SliceInt { + 625: SliceInt { dest: StatePartIndex(53), // (0x1) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(51), // (0x123404030201) SlotDebugData { name: "", ty: UInt<58> }, start: 0, len: 8, }, - 637: SliceInt { + 626: SliceInt { dest: StatePartIndex(57), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, src: StatePartIndex(51), // (0x123404030201) SlotDebugData { name: "", ty: UInt<58> }, start: 8, len: 24, }, - 638: SliceInt { + 627: SliceInt { dest: StatePartIndex(58), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(57), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 0, len: 8, }, - 639: SliceInt { + 628: SliceInt { dest: StatePartIndex(59), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(57), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 8, len: 8, }, - 640: SliceInt { + 629: SliceInt { dest: StatePartIndex(60), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(57), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 16, len: 8, }, - 641: Copy { + 630: Copy { dest: StatePartIndex(54), // (0x2) SlotDebugData { name: "[0]", ty: UInt<8> }, src: StatePartIndex(58), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, }, - 642: Copy { + 631: Copy { dest: StatePartIndex(55), // (0x3) SlotDebugData { name: "[1]", ty: UInt<8> }, src: StatePartIndex(59), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, }, - 643: Copy { + 632: Copy { dest: StatePartIndex(56), // (0x4) SlotDebugData { name: "[2]", ty: UInt<8> }, src: StatePartIndex(60), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, }, - 644: SliceInt { + 633: SliceInt { dest: StatePartIndex(61), // (0x1234) SlotDebugData { name: "", ty: UInt<25> }, src: StatePartIndex(51), // (0x123404030201) SlotDebugData { name: "", ty: UInt<58> }, start: 32, len: 25, }, - 645: SliceInt { + 634: SliceInt { dest: StatePartIndex(62), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(51), // (0x123404030201) SlotDebugData { name: "", ty: UInt<58> }, start: 57, len: 1, }, - 646: CastToSInt { + 635: CastToSInt { dest: StatePartIndex(63), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, src: StatePartIndex(62), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 647: Copy { + 636: Copy { dest: StatePartIndex(41), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<0> }, src: StatePartIndex(52), // (0x0) SlotDebugData { name: "", ty: UInt<0> }, }, - 648: Copy { + 637: Copy { dest: StatePartIndex(42), // (0x1) SlotDebugData { name: ".dest", ty: UInt<8> }, src: StatePartIndex(53), // (0x1) SlotDebugData { name: "", ty: UInt<8> }, }, - 649: Copy { + 638: Copy { dest: StatePartIndex(43), // (0x2) SlotDebugData { name: ".src[0]", ty: UInt<8> }, src: StatePartIndex(54), // (0x2) SlotDebugData { name: "[0]", ty: UInt<8> }, }, - 650: Copy { + 639: Copy { dest: StatePartIndex(44), // (0x3) SlotDebugData { name: ".src[1]", ty: UInt<8> }, src: StatePartIndex(55), // (0x3) SlotDebugData { name: "[1]", ty: UInt<8> }, }, - 651: Copy { + 640: Copy { dest: StatePartIndex(45), // (0x4) SlotDebugData { name: ".src[2]", ty: UInt<8> }, src: StatePartIndex(56), // (0x4) SlotDebugData { name: "[2]", ty: UInt<8> }, }, - 652: Copy { + 641: Copy { dest: StatePartIndex(46), // (0x1234) SlotDebugData { name: ".imm_low", ty: UInt<25> }, src: StatePartIndex(61), // (0x1234) SlotDebugData { name: "", ty: UInt<25> }, }, - 653: Copy { + 642: Copy { dest: StatePartIndex(47), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, src: StatePartIndex(63), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, }, - 654: SliceInt { + 643: SliceInt { dest: StatePartIndex(64), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, src: StatePartIndex(50), // (0x123404030201) SlotDebugData { name: "", ty: UInt<61> }, start: 58, len: 3, }, - 655: Copy { + 644: Copy { dest: StatePartIndex(65), // (0x0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(64), // (0x0) SlotDebugData { name: "", ty: UInt<3> }, }, - 656: Copy { + 645: Copy { dest: StatePartIndex(33), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<0> }, src: StatePartIndex(41), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<0> }, }, - 657: Copy { + 646: Copy { dest: StatePartIndex(34), // (0x1) SlotDebugData { name: ".common.dest", ty: UInt<8> }, src: StatePartIndex(42), // (0x1) SlotDebugData { name: ".dest", ty: UInt<8> }, }, - 658: Copy { + 647: Copy { dest: StatePartIndex(35), // (0x2) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, src: StatePartIndex(43), // (0x2) SlotDebugData { name: ".src[0]", ty: UInt<8> }, }, - 659: Copy { + 648: Copy { dest: StatePartIndex(36), // (0x3) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, src: StatePartIndex(44), // (0x3) SlotDebugData { name: ".src[1]", ty: UInt<8> }, }, - 660: Copy { + 649: Copy { dest: StatePartIndex(37), // (0x4) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, src: StatePartIndex(45), // (0x4) SlotDebugData { name: ".src[2]", ty: UInt<8> }, }, - 661: Copy { + 650: Copy { dest: StatePartIndex(38), // (0x1234) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, src: StatePartIndex(46), // (0x1234) SlotDebugData { name: ".imm_low", ty: UInt<25> }, }, - 662: Copy { + 651: Copy { dest: StatePartIndex(39), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, src: StatePartIndex(47), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, }, - 663: Copy { + 652: Copy { dest: StatePartIndex(40), // (0x0) SlotDebugData { name: ".output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(65), // (0x0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, }, - 664: SliceInt { + 653: SliceInt { dest: StatePartIndex(66), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, start: 61, len: 1, }, - 665: Copy { + 654: Copy { dest: StatePartIndex(67), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(66), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 666: SliceInt { + 655: SliceInt { dest: StatePartIndex(68), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, start: 62, len: 1, }, - 667: Copy { + 656: Copy { dest: StatePartIndex(69), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(68), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 668: SliceInt { + 657: SliceInt { dest: StatePartIndex(70), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, start: 63, len: 1, }, - 669: Copy { + 658: Copy { dest: StatePartIndex(71), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(70), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 670: SliceInt { + 659: SliceInt { dest: StatePartIndex(72), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, start: 64, len: 1, }, - 671: Copy { + 660: Copy { dest: StatePartIndex(73), // (0x1) SlotDebugData { name: "", ty: Bool }, src: StatePartIndex(72), // (0x1) SlotDebugData { name: "", ty: UInt<1> }, }, - 672: Copy { + 661: Copy { dest: StatePartIndex(21), // (0x0) SlotDebugData { name: ".alu_common.common.prefix_pad", ty: UInt<0> }, src: StatePartIndex(33), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<0> }, }, - 673: Copy { + 662: Copy { dest: StatePartIndex(22), // (0x1) SlotDebugData { name: ".alu_common.common.dest", ty: UInt<8> }, src: StatePartIndex(34), // (0x1) SlotDebugData { name: ".common.dest", ty: UInt<8> }, }, - 674: Copy { + 663: Copy { dest: StatePartIndex(23), // (0x2) SlotDebugData { name: ".alu_common.common.src[0]", ty: UInt<8> }, src: StatePartIndex(35), // (0x2) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, }, - 675: Copy { + 664: Copy { dest: StatePartIndex(24), // (0x3) SlotDebugData { name: ".alu_common.common.src[1]", ty: UInt<8> }, src: StatePartIndex(36), // (0x3) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, }, - 676: Copy { + 665: Copy { dest: StatePartIndex(25), // (0x4) SlotDebugData { name: ".alu_common.common.src[2]", ty: UInt<8> }, src: StatePartIndex(37), // (0x4) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, }, - 677: Copy { + 666: Copy { dest: StatePartIndex(26), // (0x1234) SlotDebugData { name: ".alu_common.common.imm_low", ty: UInt<25> }, src: StatePartIndex(38), // (0x1234) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, }, - 678: Copy { + 667: Copy { dest: StatePartIndex(27), // (0x0) SlotDebugData { name: ".alu_common.common.imm_sign", ty: SInt<1> }, src: StatePartIndex(39), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, }, - 679: Copy { + 668: Copy { dest: StatePartIndex(28), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(40), // (0x0) SlotDebugData { name: ".output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, }, - 680: Copy { + 669: Copy { dest: StatePartIndex(29), // (0x1) SlotDebugData { name: ".invert_src0", ty: Bool }, src: StatePartIndex(67), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 681: Copy { + 670: Copy { dest: StatePartIndex(30), // (0x1) SlotDebugData { name: ".invert_carry_in", ty: Bool }, src: StatePartIndex(69), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 682: Copy { + 671: Copy { dest: StatePartIndex(31), // (0x1) SlotDebugData { name: ".invert_carry_out", ty: Bool }, src: StatePartIndex(71), // (0x1) SlotDebugData { name: "", ty: Bool }, }, - 683: Copy { + 672: Copy { dest: StatePartIndex(32), // (0x1) SlotDebugData { name: ".add_pc", ty: Bool }, src: StatePartIndex(73), // (0x1) SlotDebugData { name: "", ty: Bool }, }, // at: reg_alloc.rs:48:11 - 684: AndBigWithSmallImmediate { + 673: AndBigWithSmallImmediate { dest: StatePartIndex(3), // (0x0 0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, lhs: StatePartIndex(28), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, rhs: 0x7, }, // at: reg_alloc.rs:41:1 - 685: SliceInt { + 674: SliceInt { dest: StatePartIndex(83), // (0xf) SlotDebugData { name: "", ty: UInt<4> }, src: StatePartIndex(49), // (0x1e000123404030201) SlotDebugData { name: "", ty: UInt<65> }, start: 61, len: 4, }, - 686: Copy { + 675: Copy { dest: StatePartIndex(74), // (0x0) SlotDebugData { name: ".alu_common.common.prefix_pad", ty: UInt<0> }, src: StatePartIndex(33), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<0> }, }, - 687: Copy { + 676: Copy { dest: StatePartIndex(75), // (0x1) SlotDebugData { name: ".alu_common.common.dest", ty: UInt<8> }, src: StatePartIndex(34), // (0x1) SlotDebugData { name: ".common.dest", ty: UInt<8> }, }, - 688: Copy { + 677: Copy { dest: StatePartIndex(76), // (0x2) SlotDebugData { name: ".alu_common.common.src[0]", ty: UInt<8> }, src: StatePartIndex(35), // (0x2) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, }, - 689: Copy { + 678: Copy { dest: StatePartIndex(77), // (0x3) SlotDebugData { name: ".alu_common.common.src[1]", ty: UInt<8> }, src: StatePartIndex(36), // (0x3) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, }, - 690: Copy { + 679: Copy { dest: StatePartIndex(78), // (0x4) SlotDebugData { name: ".alu_common.common.src[2]", ty: UInt<8> }, src: StatePartIndex(37), // (0x4) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, }, - 691: Copy { + 680: Copy { dest: StatePartIndex(79), // (0x1234) SlotDebugData { name: ".alu_common.common.imm_low", ty: UInt<25> }, src: StatePartIndex(38), // (0x1234) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, }, - 692: Copy { + 681: Copy { dest: StatePartIndex(80), // (0x0) SlotDebugData { name: ".alu_common.common.imm_sign", ty: SInt<1> }, src: StatePartIndex(39), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, }, - 693: Copy { + 682: Copy { dest: StatePartIndex(81), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, src: StatePartIndex(40), // (0x0) SlotDebugData { name: ".output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, }, - 694: Copy { + 683: Copy { dest: StatePartIndex(82), // (0xf) SlotDebugData { name: ".lut", ty: UInt<4> }, src: StatePartIndex(83), // (0xf) SlotDebugData { name: "", ty: UInt<4> }, }, // at: reg_alloc.rs:48:11 - 695: AndBigWithSmallImmediate { + 684: AndBigWithSmallImmediate { dest: StatePartIndex(4), // (0x0 0) SlotDebugData { name: "", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, lhs: StatePartIndex(81), // (0x0) SlotDebugData { name: ".alu_common.output_integer_mode", ty: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8} }, rhs: 0x7, }, // at: reg_alloc.rs:41:1 - 696: SliceInt { + 685: SliceInt { dest: StatePartIndex(84), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, src: StatePartIndex(18), // (0x1e0001234040302010) SlotDebugData { name: "", ty: UInt<69> }, start: 2, len: 60, }, - 697: Copy { + 686: Copy { dest: StatePartIndex(85), // (0x48d0100c0804) SlotDebugData { name: "", ty: Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})} }, src: StatePartIndex(84), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, }, // at: reg_alloc.rs:48:11 - 698: AndBigWithSmallImmediate { + 687: AndBigWithSmallImmediate { dest: StatePartIndex(5), // (0x0 0) SlotDebugData { name: "", ty: Enum {ReadL2Reg, WriteL2Reg} }, lhs: StatePartIndex(85), // (0x48d0100c0804) SlotDebugData { name: "", ty: Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 699: Copy { + 688: Copy { dest: StatePartIndex(100), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, src: StatePartIndex(85), // (0x48d0100c0804) SlotDebugData { name: "", ty: Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})} }, }, - 700: SliceInt { + 689: SliceInt { dest: StatePartIndex(101), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, src: StatePartIndex(100), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, start: 1, len: 59, }, - 701: SliceInt { + 690: SliceInt { dest: StatePartIndex(102), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, src: StatePartIndex(101), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 0, len: 59, }, - 702: SliceInt { + 691: SliceInt { dest: StatePartIndex(103), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(102), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 0, len: 1, }, - 703: SliceInt { + 692: SliceInt { dest: StatePartIndex(104), // (0x1) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(102), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 1, len: 8, }, - 704: SliceInt { + 693: SliceInt { dest: StatePartIndex(108), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, src: StatePartIndex(102), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 9, len: 24, }, - 705: SliceInt { + 694: SliceInt { dest: StatePartIndex(109), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(108), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 0, len: 8, }, - 706: SliceInt { + 695: SliceInt { dest: StatePartIndex(110), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(108), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 8, len: 8, }, - 707: SliceInt { + 696: SliceInt { dest: StatePartIndex(111), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(108), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 16, len: 8, }, - 708: Copy { + 697: Copy { dest: StatePartIndex(105), // (0x2) SlotDebugData { name: "[0]", ty: UInt<8> }, src: StatePartIndex(109), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, }, - 709: Copy { + 698: Copy { dest: StatePartIndex(106), // (0x3) SlotDebugData { name: "[1]", ty: UInt<8> }, src: StatePartIndex(110), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, }, - 710: Copy { + 699: Copy { dest: StatePartIndex(107), // (0x4) SlotDebugData { name: "[2]", ty: UInt<8> }, src: StatePartIndex(111), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, }, - 711: SliceInt { + 700: SliceInt { dest: StatePartIndex(112), // (0x1234) SlotDebugData { name: "", ty: UInt<25> }, src: StatePartIndex(102), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 33, len: 25, }, - 712: SliceInt { + 701: SliceInt { dest: StatePartIndex(113), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(102), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 58, len: 1, }, - 713: CastToSInt { + 702: CastToSInt { dest: StatePartIndex(114), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, src: StatePartIndex(113), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 714: Copy { + 703: Copy { dest: StatePartIndex(93), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<1> }, src: StatePartIndex(103), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 715: Copy { + 704: Copy { dest: StatePartIndex(94), // (0x1) SlotDebugData { name: ".dest", ty: UInt<8> }, src: StatePartIndex(104), // (0x1) SlotDebugData { name: "", ty: UInt<8> }, }, - 716: Copy { + 705: Copy { dest: StatePartIndex(95), // (0x2) SlotDebugData { name: ".src[0]", ty: UInt<8> }, src: StatePartIndex(105), // (0x2) SlotDebugData { name: "[0]", ty: UInt<8> }, }, - 717: Copy { + 706: Copy { dest: StatePartIndex(96), // (0x3) SlotDebugData { name: ".src[1]", ty: UInt<8> }, src: StatePartIndex(106), // (0x3) SlotDebugData { name: "[1]", ty: UInt<8> }, }, - 718: Copy { + 707: Copy { dest: StatePartIndex(97), // (0x4) SlotDebugData { name: ".src[2]", ty: UInt<8> }, src: StatePartIndex(107), // (0x4) SlotDebugData { name: "[2]", ty: UInt<8> }, }, - 719: Copy { + 708: Copy { dest: StatePartIndex(98), // (0x1234) SlotDebugData { name: ".imm_low", ty: UInt<25> }, src: StatePartIndex(112), // (0x1234) SlotDebugData { name: "", ty: UInt<25> }, }, - 720: Copy { + 709: Copy { dest: StatePartIndex(99), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, src: StatePartIndex(114), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, }, - 721: Copy { + 710: Copy { dest: StatePartIndex(86), // (0x0) SlotDebugData { name: ".common.prefix_pad", ty: UInt<1> }, src: StatePartIndex(93), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<1> }, }, - 722: Copy { + 711: Copy { dest: StatePartIndex(87), // (0x1) SlotDebugData { name: ".common.dest", ty: UInt<8> }, src: StatePartIndex(94), // (0x1) SlotDebugData { name: ".dest", ty: UInt<8> }, }, - 723: Copy { + 712: Copy { dest: StatePartIndex(88), // (0x2) SlotDebugData { name: ".common.src[0]", ty: UInt<8> }, src: StatePartIndex(95), // (0x2) SlotDebugData { name: ".src[0]", ty: UInt<8> }, }, - 724: Copy { + 713: Copy { dest: StatePartIndex(89), // (0x3) SlotDebugData { name: ".common.src[1]", ty: UInt<8> }, src: StatePartIndex(96), // (0x3) SlotDebugData { name: ".src[1]", ty: UInt<8> }, }, - 725: Copy { + 714: Copy { dest: StatePartIndex(90), // (0x4) SlotDebugData { name: ".common.src[2]", ty: UInt<8> }, src: StatePartIndex(97), // (0x4) SlotDebugData { name: ".src[2]", ty: UInt<8> }, }, - 726: Copy { + 715: Copy { dest: StatePartIndex(91), // (0x1234) SlotDebugData { name: ".common.imm_low", ty: UInt<25> }, src: StatePartIndex(98), // (0x1234) SlotDebugData { name: ".imm_low", ty: UInt<25> }, }, - 727: Copy { + 716: Copy { dest: StatePartIndex(92), // (0x0) SlotDebugData { name: ".common.imm_sign", ty: SInt<1> }, src: StatePartIndex(99), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, }, - 728: Copy { + 717: Copy { dest: StatePartIndex(115), // (0x48d0100c0804) SlotDebugData { name: "", ty: Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})} }, src: StatePartIndex(84), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, }, // at: reg_alloc.rs:48:11 - 729: AndBigWithSmallImmediate { + 718: AndBigWithSmallImmediate { dest: StatePartIndex(6), // (0x0 0) SlotDebugData { name: "", ty: Enum {Load, Store} }, lhs: StatePartIndex(115), // (0x48d0100c0804) SlotDebugData { name: "", ty: Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 730: Copy { + 719: Copy { dest: StatePartIndex(123), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, src: StatePartIndex(115), // (0x48d0100c0804) SlotDebugData { name: "", ty: Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})} }, }, - 731: SliceInt { + 720: SliceInt { dest: StatePartIndex(124), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, src: StatePartIndex(123), // (0x48d0100c0804) SlotDebugData { name: "", ty: UInt<60> }, start: 1, len: 59, }, - 732: SliceInt { + 721: SliceInt { dest: StatePartIndex(125), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(124), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 0, len: 1, }, - 733: SliceInt { + 722: SliceInt { dest: StatePartIndex(126), // (0x1) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(124), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 1, len: 8, }, - 734: SliceInt { + 723: SliceInt { dest: StatePartIndex(130), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, src: StatePartIndex(124), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 9, len: 24, }, - 735: SliceInt { + 724: SliceInt { dest: StatePartIndex(131), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(130), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 0, len: 8, }, - 736: SliceInt { + 725: SliceInt { dest: StatePartIndex(132), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(130), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 8, len: 8, }, - 737: SliceInt { + 726: SliceInt { dest: StatePartIndex(133), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, src: StatePartIndex(130), // (0x40302) SlotDebugData { name: "", ty: UInt<24> }, start: 16, len: 8, }, - 738: Copy { + 727: Copy { dest: StatePartIndex(127), // (0x2) SlotDebugData { name: "[0]", ty: UInt<8> }, src: StatePartIndex(131), // (0x2) SlotDebugData { name: "", ty: UInt<8> }, }, - 739: Copy { + 728: Copy { dest: StatePartIndex(128), // (0x3) SlotDebugData { name: "[1]", ty: UInt<8> }, src: StatePartIndex(132), // (0x3) SlotDebugData { name: "", ty: UInt<8> }, }, - 740: Copy { + 729: Copy { dest: StatePartIndex(129), // (0x4) SlotDebugData { name: "[2]", ty: UInt<8> }, src: StatePartIndex(133), // (0x4) SlotDebugData { name: "", ty: UInt<8> }, }, - 741: SliceInt { + 730: SliceInt { dest: StatePartIndex(134), // (0x1234) SlotDebugData { name: "", ty: UInt<25> }, src: StatePartIndex(124), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 33, len: 25, }, - 742: SliceInt { + 731: SliceInt { dest: StatePartIndex(135), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(124), // (0x246808060402) SlotDebugData { name: "", ty: UInt<59> }, start: 58, len: 1, }, - 743: CastToSInt { + 732: CastToSInt { dest: StatePartIndex(136), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, src: StatePartIndex(135), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, dest_width: 1, }, - 744: Copy { + 733: Copy { dest: StatePartIndex(116), // (0x0) SlotDebugData { name: ".prefix_pad", ty: UInt<1> }, src: StatePartIndex(125), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 745: Copy { + 734: Copy { dest: StatePartIndex(117), // (0x1) SlotDebugData { name: ".dest", ty: UInt<8> }, src: StatePartIndex(126), // (0x1) SlotDebugData { name: "", ty: UInt<8> }, }, - 746: Copy { + 735: Copy { dest: StatePartIndex(118), // (0x2) SlotDebugData { name: ".src[0]", ty: UInt<8> }, src: StatePartIndex(127), // (0x2) SlotDebugData { name: "[0]", ty: UInt<8> }, }, - 747: Copy { + 736: Copy { dest: StatePartIndex(119), // (0x3) SlotDebugData { name: ".src[1]", ty: UInt<8> }, src: StatePartIndex(128), // (0x3) SlotDebugData { name: "[1]", ty: UInt<8> }, }, - 748: Copy { + 737: Copy { dest: StatePartIndex(120), // (0x4) SlotDebugData { name: ".src[2]", ty: UInt<8> }, src: StatePartIndex(129), // (0x4) SlotDebugData { name: "[2]", ty: UInt<8> }, }, - 749: Copy { + 738: Copy { dest: StatePartIndex(121), // (0x1234) SlotDebugData { name: ".imm_low", ty: UInt<25> }, src: StatePartIndex(134), // (0x1234) SlotDebugData { name: "", ty: UInt<25> }, }, - 750: Copy { + 739: Copy { dest: StatePartIndex(122), // (0x0) SlotDebugData { name: ".imm_sign", ty: SInt<1> }, src: StatePartIndex(136), // (0x0) SlotDebugData { name: "", ty: SInt<1> }, }, // at: reg_alloc.rs:48:11 - 751: AndBigWithSmallImmediate { + 740: AndBigWithSmallImmediate { dest: StatePartIndex(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(2), // (0x8007c0002468080604021) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::fetch_decode_interface.decoded_insns[0].data", ty: Enum {HdlNone, HdlSome(Bundle {uop: Enum {AluBranch(Enum {AddSub(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), AddSubI(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, invert_src0: Bool, invert_carry_in: Bool, invert_carry_out: Bool, add_pc: Bool}), Logical(Bundle {alu_common: Bundle {common: Bundle {prefix_pad: UInt<0>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}, output_integer_mode: Enum {Full64, DupLow32, ZeroExt32, SignExt32, ZeroExt16, SignExt16, ZeroExt8, SignExt8}}, lut: UInt<4>})}), L2RegisterFile(Enum {ReadL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}}), WriteL2Reg(Bundle {common: Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}})}), LoadStore(Enum {Load(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}}), Store(Bundle {prefix_pad: UInt<1>, dest: UInt<8>, src: Array, 3>, imm_low: UInt<25>, imm_sign: SInt<1>, _phantom: Bundle {}})})}, is_unrelated_pc: Bool, pc: UInt<64>})} }, rhs: 0x1, }, // at: reg_alloc.rs:70:9 - 752: BranchIfSmallNeImmediate { - target: 754, + 741: BranchIfSmallNeImmediate { + target: 743, lhs: StatePartIndex(0), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, // at: reg_alloc.rs:71:13 - 753: Copy { - dest: StatePartIndex(271), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, + 742: Copy { + dest: StatePartIndex(271), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, src: StatePartIndex(292), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units_for_kind[0]", ty: Bool }, }, + // at: reg_alloc.rs:161:13 + 743: BranchIfSmallNeImmediate { + target: 745, + lhs: StatePartIndex(49), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + rhs: 0x0, + }, + // at: reg_alloc.rs:163:17 + 744: Copy { + dest: StatePartIndex(271), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, + src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, // at: reg_alloc.rs:95:21 - 754: BranchIfZero { - target: 756, - value: StatePartIndex(271), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, + 745: BranchIfZero { + target: 747, + value: StatePartIndex(271), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[0][0]", ty: Bool }, }, // at: reg_alloc.rs:96:25 - 755: Copy { - dest: StatePartIndex(293), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 746: Copy { + dest: StatePartIndex(293), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(308), // (0x1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, // at: reg_alloc.rs:84:25 - 756: AndBigWithSmallImmediate { - dest: StatePartIndex(19), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, - lhs: StatePartIndex(293), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 747: AndBigWithSmallImmediate { + dest: StatePartIndex(19), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + lhs: StatePartIndex(293), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 757: Copy { - dest: StatePartIndex(295), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(293), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 748: Copy { + dest: StatePartIndex(295), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(293), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, - 758: SliceInt { + 749: SliceInt { dest: StatePartIndex(296), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(295), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(295), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, start: 1, len: 1, }, - 759: SliceInt { + 750: SliceInt { dest: StatePartIndex(297), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(296), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, start: 0, len: 1, }, - 760: Copy { + 751: Copy { dest: StatePartIndex(294), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, src: StatePartIndex(297), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: reg_alloc.rs:76:9 - 761: Copy { - dest: StatePartIndex(273), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[0]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, - src: StatePartIndex(293), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 752: Copy { + dest: StatePartIndex(273), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[0]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + src: StatePartIndex(293), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_0_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, // at: reg_alloc.rs:59:30 - 762: AndBigWithSmallImmediate { - dest: StatePartIndex(16), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, - lhs: StatePartIndex(273), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[0]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 753: AndBigWithSmallImmediate { + dest: StatePartIndex(16), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + lhs: StatePartIndex(273), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[0]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 763: Copy { - dest: StatePartIndex(276), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, - src: StatePartIndex(273), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[0]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, + 754: Copy { + dest: StatePartIndex(276), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(273), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[0]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, - 764: SliceInt { + 755: SliceInt { dest: StatePartIndex(277), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, - src: StatePartIndex(276), // (0x1) SlotDebugData { name: "", ty: UInt<2> }, + src: StatePartIndex(276), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, start: 1, len: 1, }, - 765: SliceInt { + 756: SliceInt { dest: StatePartIndex(278), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(277), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, start: 0, len: 1, }, - 766: Copy { + 757: Copy { dest: StatePartIndex(275), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, src: StatePartIndex(278), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, - 767: CastBigToArrayIndex { + 758: CastBigToArrayIndex { dest: StatePartIndex(22), // (0x0 0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(275), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, }, // at: reg_alloc.rs:123:13 - 768: BranchIfSmallNeImmediate { - target: 770, - lhs: StatePartIndex(16), // (0x1 1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + 759: BranchIfSmallNeImmediate { + target: 761, + lhs: StatePartIndex(16), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, rhs: 0x1, }, // at: reg_alloc.rs:124:17 - 769: WriteIndexed { + 760: WriteIndexed { dest: StatePartIndex(272) /* (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[1][0]", ty: Bool } */ [StatePartIndex(22) /* (0x0 0) SlotDebugData { name: "", ty: UInt<1> } */ , len=1, stride=1],, src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, }, + // at: reg_alloc.rs:161:13 + 761: BranchIfSmallNeImmediate { + target: 763, + lhs: StatePartIndex(49), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + rhs: 0x0, + }, + // at: reg_alloc.rs:163:17 + 762: Copy { + dest: StatePartIndex(272), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[1][0]", ty: Bool }, + src: StatePartIndex(285), // (0x0) SlotDebugData { name: "", ty: Bool }, + }, // at: reg_alloc.rs:95:21 - 770: BranchIfZero { - target: 772, + 763: BranchIfZero { + target: 765, value: StatePartIndex(272), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::available_units[1][0]", ty: Bool }, }, // at: reg_alloc.rs:96:25 - 771: Copy { + 764: Copy { dest: StatePartIndex(311), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_1_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(322), // (0x1) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, // at: reg_alloc.rs:84:25 - 772: AndBigWithSmallImmediate { + 765: AndBigWithSmallImmediate { dest: StatePartIndex(21), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(311), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_1_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 773: Copy { + 766: Copy { dest: StatePartIndex(313), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(311), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_1_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, - 774: SliceInt { + 767: SliceInt { dest: StatePartIndex(314), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(313), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, start: 1, len: 1, }, - 775: SliceInt { + 768: SliceInt { dest: StatePartIndex(315), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(314), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, start: 0, len: 1, }, - 776: Copy { + 769: Copy { dest: StatePartIndex(312), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, src: StatePartIndex(315), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, // at: reg_alloc.rs:76:9 - 777: Copy { + 770: Copy { dest: StatePartIndex(274), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[1]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, src: StatePartIndex(311), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_leaf_1_0", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, // at: reg_alloc.rs:59:30 - 778: AndBigWithSmallImmediate { + 771: AndBigWithSmallImmediate { dest: StatePartIndex(17), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, lhs: StatePartIndex(274), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[1]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 779: Copy { + 772: Copy { dest: StatePartIndex(280), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, src: StatePartIndex(274), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::selected_unit_nums[1]", ty: Enum {HdlNone, HdlSome(Bundle {value: UInt<1>})} }, }, - 780: SliceInt { + 773: SliceInt { dest: StatePartIndex(281), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(280), // (0x0) SlotDebugData { name: "", ty: UInt<2> }, start: 1, len: 1, }, - 781: SliceInt { + 774: SliceInt { dest: StatePartIndex(282), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, src: StatePartIndex(281), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, start: 0, len: 1, }, - 782: Copy { + 775: Copy { dest: StatePartIndex(279), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, src: StatePartIndex(282), // (0x0) SlotDebugData { name: "", ty: UInt<1> }, }, + 776: CmpEq { + dest: StatePartIndex(684), // (0x1) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(279), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, + rhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, + }, + 777: CmpEq { + dest: StatePartIndex(683), // (0x1) SlotDebugData { name: "", ty: Bool }, + lhs: StatePartIndex(275), // (0x0) SlotDebugData { name: ".value", ty: UInt<1> }, + rhs: StatePartIndex(300), // (0x0) SlotDebugData { name: "", ty: UInt<64> }, + }, + // at: reg_alloc.rs:166:13 + 778: BranchIfSmallNeImmediate { + target: 781, + lhs: StatePartIndex(16), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + rhs: 0x1, + }, + // at: reg_alloc.rs:168:17 + 779: BranchIfZero { + target: 781, + value: StatePartIndex(683), // (0x1) SlotDebugData { name: "", ty: Bool }, + }, + // at: reg_alloc.rs:169:21 + 780: Copy { + dest: StatePartIndex(332), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].ready", ty: Bool }, + src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, + }, + // at: reg_alloc.rs:166:13 + 781: BranchIfSmallNeImmediate { + target: 784, + lhs: StatePartIndex(17), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + rhs: 0x1, + }, + // at: reg_alloc.rs:168:17 + 782: BranchIfZero { + target: 784, + value: StatePartIndex(684), // (0x1) SlotDebugData { name: "", ty: Bool }, + }, + // at: reg_alloc.rs:169:21 + 783: Copy { + dest: StatePartIndex(332), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].ready", ty: Bool }, + src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, + }, + // at: reg_alloc.rs:150:13 + 784: Copy { + dest: StatePartIndex(340), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].ready", ty: Bool }, + src: StatePartIndex(332), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc: reg_alloc).reg_alloc::unit_0_free_regs_tracker.alloc_out[0].ready", ty: Bool }, + }, + // at: ready_valid.rs:33:9 + 785: BranchIfZero { + target: 787, + value: StatePartIndex(340), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].ready", ty: Bool }, + }, + // at: ready_valid.rs:34:13 + 786: Copy { + dest: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + src: StatePartIndex(339), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::alloc_out[0].data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + }, + // at: ready_valid.rs:30:27 + 787: AndBigWithSmallImmediate { + dest: StatePartIndex(46), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + lhs: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + rhs: 0x1, + }, + // at: unit_free_regs_tracker.rs:7:1 + 788: Copy { + dest: StatePartIndex(669), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, + src: StatePartIndex(668), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::firing_data", ty: Enum {HdlNone, HdlSome(UInt<4>)} }, + }, + 789: SliceInt { + dest: StatePartIndex(670), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, + src: StatePartIndex(669), // (0x0) SlotDebugData { name: "", ty: UInt<5> }, + start: 1, + len: 4, + }, + 790: CastBigToArrayIndex { + dest: StatePartIndex(47), // (0x0 0) SlotDebugData { name: "", ty: UInt<4> }, + src: StatePartIndex(670), // (0x0) SlotDebugData { name: "", ty: UInt<4> }, + }, + // at: unit_free_regs_tracker.rs:102:9 + 791: BranchIfSmallNeImmediate { + target: 793, + lhs: StatePartIndex(46), // (0x0 0) SlotDebugData { name: "", ty: Enum {HdlNone, HdlSome} }, + rhs: 0x1, + }, + // at: unit_free_regs_tracker.rs:103:13 + 792: WriteIndexed { + dest: StatePartIndex(359) /* (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[0]", ty: Bool } */ [StatePartIndex(47) /* (0x0 0) SlotDebugData { name: "", ty: UInt<4> } */ , len=16, stride=1],, + src: StatePartIndex(283), // (0x1) SlotDebugData { name: "", ty: Bool }, + }, // at: unit_free_regs_tracker.rs:27:25 - 783: BranchIfSmallZero { - target: 818, + 793: BranchIfSmallZero { + target: 828, value: StatePartIndex(26), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, - 784: BranchIfSmallNonZero { - target: 802, + 794: BranchIfSmallNonZero { + target: 812, value: StatePartIndex(28), // (0x0 0) SlotDebugData { name: "", ty: Bool }, }, - 785: Copy { - dest: StatePartIndex(343), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[0]", ty: Bool }, - src: StatePartIndex(359), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[0]", ty: Bool }, - }, - 786: Copy { - dest: StatePartIndex(344), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[1]", ty: Bool }, - src: StatePartIndex(360), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[1]", ty: Bool }, - }, - 787: Copy { - dest: StatePartIndex(345), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[2]", ty: Bool }, - src: StatePartIndex(361), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[2]", ty: Bool }, - }, - 788: Copy { - dest: StatePartIndex(346), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[3]", ty: Bool }, - src: StatePartIndex(362), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[3]", ty: Bool }, - }, - 789: Copy { - dest: StatePartIndex(347), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[4]", ty: Bool }, - src: StatePartIndex(363), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[4]", ty: Bool }, - }, - 790: Copy { - dest: StatePartIndex(348), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[5]", ty: Bool }, - src: StatePartIndex(364), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[5]", ty: Bool }, - }, - 791: Copy { - dest: StatePartIndex(349), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[6]", ty: Bool }, - src: StatePartIndex(365), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[6]", ty: Bool }, - }, - 792: Copy { - dest: StatePartIndex(350), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[7]", ty: Bool }, - src: StatePartIndex(366), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[7]", ty: Bool }, - }, - 793: Copy { - dest: StatePartIndex(351), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[8]", ty: Bool }, - src: StatePartIndex(367), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[8]", ty: Bool }, - }, - 794: Copy { - dest: StatePartIndex(352), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[9]", ty: Bool }, - src: StatePartIndex(368), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[9]", ty: Bool }, - }, 795: Copy { - dest: StatePartIndex(353), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[10]", ty: Bool }, - src: StatePartIndex(369), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[10]", ty: Bool }, + dest: StatePartIndex(343), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[0]", ty: Bool }, + src: StatePartIndex(359), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[0]", ty: Bool }, }, 796: Copy { - dest: StatePartIndex(354), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[11]", ty: Bool }, - src: StatePartIndex(370), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[11]", ty: Bool }, + dest: StatePartIndex(344), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[1]", ty: Bool }, + src: StatePartIndex(360), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[1]", ty: Bool }, }, 797: Copy { - dest: StatePartIndex(355), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[12]", ty: Bool }, - src: StatePartIndex(371), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[12]", ty: Bool }, + dest: StatePartIndex(345), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[2]", ty: Bool }, + src: StatePartIndex(361), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[2]", ty: Bool }, }, 798: Copy { - dest: StatePartIndex(356), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[13]", ty: Bool }, - src: StatePartIndex(372), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[13]", ty: Bool }, + dest: StatePartIndex(346), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[3]", ty: Bool }, + src: StatePartIndex(362), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[3]", ty: Bool }, }, 799: Copy { - dest: StatePartIndex(357), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[14]", ty: Bool }, - src: StatePartIndex(373), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[14]", ty: Bool }, + dest: StatePartIndex(347), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[4]", ty: Bool }, + src: StatePartIndex(363), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[4]", ty: Bool }, }, 800: Copy { - dest: StatePartIndex(358), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[15]", ty: Bool }, - src: StatePartIndex(374), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[15]", ty: Bool }, + dest: StatePartIndex(348), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[5]", ty: Bool }, + src: StatePartIndex(364), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[5]", ty: Bool }, }, - 801: Branch { - target: 818, + 801: Copy { + dest: StatePartIndex(349), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[6]", ty: Bool }, + src: StatePartIndex(365), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[6]", ty: Bool }, }, 802: Copy { - dest: StatePartIndex(343), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[0]", ty: Bool }, - src: StatePartIndex(375), // (0x0) SlotDebugData { name: "[0]", ty: Bool }, + dest: StatePartIndex(350), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[7]", ty: Bool }, + src: StatePartIndex(366), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[7]", ty: Bool }, }, 803: Copy { - dest: StatePartIndex(344), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[1]", ty: Bool }, - src: StatePartIndex(376), // (0x0) SlotDebugData { name: "[1]", ty: Bool }, + dest: StatePartIndex(351), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[8]", ty: Bool }, + src: StatePartIndex(367), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[8]", ty: Bool }, }, 804: Copy { - dest: StatePartIndex(345), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[2]", ty: Bool }, - src: StatePartIndex(377), // (0x0) SlotDebugData { name: "[2]", ty: Bool }, + dest: StatePartIndex(352), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[9]", ty: Bool }, + src: StatePartIndex(368), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[9]", ty: Bool }, }, 805: Copy { - dest: StatePartIndex(346), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[3]", ty: Bool }, - src: StatePartIndex(378), // (0x0) SlotDebugData { name: "[3]", ty: Bool }, + dest: StatePartIndex(353), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[10]", ty: Bool }, + src: StatePartIndex(369), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[10]", ty: Bool }, }, 806: Copy { - dest: StatePartIndex(347), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[4]", ty: Bool }, - src: StatePartIndex(379), // (0x0) SlotDebugData { name: "[4]", ty: Bool }, + dest: StatePartIndex(354), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[11]", ty: Bool }, + src: StatePartIndex(370), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[11]", ty: Bool }, }, 807: Copy { - dest: StatePartIndex(348), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[5]", ty: Bool }, - src: StatePartIndex(380), // (0x0) SlotDebugData { name: "[5]", ty: Bool }, + dest: StatePartIndex(355), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[12]", ty: Bool }, + src: StatePartIndex(371), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[12]", ty: Bool }, }, 808: Copy { - dest: StatePartIndex(349), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[6]", ty: Bool }, - src: StatePartIndex(381), // (0x0) SlotDebugData { name: "[6]", ty: Bool }, + dest: StatePartIndex(356), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[13]", ty: Bool }, + src: StatePartIndex(372), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[13]", ty: Bool }, }, 809: Copy { - dest: StatePartIndex(350), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[7]", ty: Bool }, - src: StatePartIndex(382), // (0x0) SlotDebugData { name: "[7]", ty: Bool }, + dest: StatePartIndex(357), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[14]", ty: Bool }, + src: StatePartIndex(373), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[14]", ty: Bool }, }, 810: Copy { - dest: StatePartIndex(351), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[8]", ty: Bool }, - src: StatePartIndex(383), // (0x0) SlotDebugData { name: "[8]", ty: Bool }, + dest: StatePartIndex(358), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[15]", ty: Bool }, + src: StatePartIndex(374), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg$next[15]", ty: Bool }, }, - 811: Copy { - dest: StatePartIndex(352), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[9]", ty: Bool }, - src: StatePartIndex(384), // (0x0) SlotDebugData { name: "[9]", ty: Bool }, + 811: Branch { + target: 828, }, 812: Copy { - dest: StatePartIndex(353), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[10]", ty: Bool }, - src: StatePartIndex(385), // (0x0) SlotDebugData { name: "[10]", ty: Bool }, + dest: StatePartIndex(343), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[0]", ty: Bool }, + src: StatePartIndex(375), // (0x0) SlotDebugData { name: "[0]", ty: Bool }, }, 813: Copy { - dest: StatePartIndex(354), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[11]", ty: Bool }, - src: StatePartIndex(386), // (0x0) SlotDebugData { name: "[11]", ty: Bool }, + dest: StatePartIndex(344), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[1]", ty: Bool }, + src: StatePartIndex(376), // (0x0) SlotDebugData { name: "[1]", ty: Bool }, }, 814: Copy { - dest: StatePartIndex(355), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[12]", ty: Bool }, - src: StatePartIndex(387), // (0x0) SlotDebugData { name: "[12]", ty: Bool }, + dest: StatePartIndex(345), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[2]", ty: Bool }, + src: StatePartIndex(377), // (0x0) SlotDebugData { name: "[2]", ty: Bool }, }, 815: Copy { - dest: StatePartIndex(356), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[13]", ty: Bool }, - src: StatePartIndex(388), // (0x0) SlotDebugData { name: "[13]", ty: Bool }, + dest: StatePartIndex(346), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[3]", ty: Bool }, + src: StatePartIndex(378), // (0x0) SlotDebugData { name: "[3]", ty: Bool }, }, 816: Copy { - dest: StatePartIndex(357), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[14]", ty: Bool }, - src: StatePartIndex(389), // (0x0) SlotDebugData { name: "[14]", ty: Bool }, + dest: StatePartIndex(347), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[4]", ty: Bool }, + src: StatePartIndex(379), // (0x0) SlotDebugData { name: "[4]", ty: Bool }, }, 817: Copy { - dest: StatePartIndex(358), // (0x0) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[15]", ty: Bool }, + dest: StatePartIndex(348), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[5]", ty: Bool }, + src: StatePartIndex(380), // (0x0) SlotDebugData { name: "[5]", ty: Bool }, + }, + 818: Copy { + dest: StatePartIndex(349), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[6]", ty: Bool }, + src: StatePartIndex(381), // (0x0) SlotDebugData { name: "[6]", ty: Bool }, + }, + 819: Copy { + dest: StatePartIndex(350), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[7]", ty: Bool }, + src: StatePartIndex(382), // (0x0) SlotDebugData { name: "[7]", ty: Bool }, + }, + 820: Copy { + dest: StatePartIndex(351), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[8]", ty: Bool }, + src: StatePartIndex(383), // (0x0) SlotDebugData { name: "[8]", ty: Bool }, + }, + 821: Copy { + dest: StatePartIndex(352), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[9]", ty: Bool }, + src: StatePartIndex(384), // (0x0) SlotDebugData { name: "[9]", ty: Bool }, + }, + 822: Copy { + dest: StatePartIndex(353), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[10]", ty: Bool }, + src: StatePartIndex(385), // (0x0) SlotDebugData { name: "[10]", ty: Bool }, + }, + 823: Copy { + dest: StatePartIndex(354), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[11]", ty: Bool }, + src: StatePartIndex(386), // (0x0) SlotDebugData { name: "[11]", ty: Bool }, + }, + 824: Copy { + dest: StatePartIndex(355), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[12]", ty: Bool }, + src: StatePartIndex(387), // (0x0) SlotDebugData { name: "[12]", ty: Bool }, + }, + 825: Copy { + dest: StatePartIndex(356), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[13]", ty: Bool }, + src: StatePartIndex(388), // (0x0) SlotDebugData { name: "[13]", ty: Bool }, + }, + 826: Copy { + dest: StatePartIndex(357), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[14]", ty: Bool }, + src: StatePartIndex(389), // (0x0) SlotDebugData { name: "[14]", ty: Bool }, + }, + 827: Copy { + dest: StatePartIndex(358), // (0x1) SlotDebugData { name: "InstantiatedModule(reg_alloc.unit_0_free_regs_tracker: unit_free_regs_tracker).unit_free_regs_tracker::allocated_reg[15]", ty: Bool }, src: StatePartIndex(390), // (0x0) SlotDebugData { name: "[15]", ty: Bool }, }, - 818: XorSmallImmediate { + 828: XorSmallImmediate { dest: StatePartIndex(25), // (0x0 0) SlotDebugData { name: "", ty: Bool }, lhs: StatePartIndex(27), // (0x1 1) SlotDebugData { name: "", ty: Bool }, rhs: 0x1, }, // at: reg_alloc.rs:41:1 - 819: Return, + 829: Return, ], .. }, - pc: 819, + pc: 829, memory_write_log: [], memories: StatePart { value: [], @@ -7282,7 +7339,15 @@ Simulation { 0, 0, 0, - 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 1, @@ -7290,32 +7355,24 @@ Simulation { 0, 0, 0, - 1, - 0, - 0, - 1, - 0, - 0, - 0, - 18446744073709551615, - 18446744073709551615, - 0, - 18446744073709551615, - 18446744073709551615, - 0, - 0, - 18446744073709551615, - 18446744073709551615, - 0, - 18446744073709551615, - 18446744073709551615, 0, 0, 0, 0, 0, 0, - 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, ], }, big_slots: StatePart { @@ -7591,12 +7648,12 @@ Simulation { 0, 0, 0, - 1, - 0, - 1, 0, 0, - 1, + 0, + 0, + 0, + 0, 0, 0, 0, @@ -7613,9 +7670,9 @@ Simulation { 2, 2, 1, - 1, 0, - 1, + 0, + 0, 0, 0, 0, @@ -7651,9 +7708,6 @@ Simulation { 0, 0, 1, - 1, - 0, - 1, 0, 0, 1, @@ -7661,28 +7715,43 @@ Simulation { 0, 1, 0, + 0, + 0, + 0, + 0, + 0, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, + 1, 1, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 0, 0, 0, 0, @@ -7718,293 +7787,281 @@ Simulation { 0, 0, 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 1, 1, 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 1, + 0, + 0, + 0, + 0, + 1, + 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 3, + 0, + 0, + 1, + 0, 1, 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, + 3, + 3, + 0, + 0, + 0, + 0, 0, 0, 0, - 36893488147419103231, - 0, - 1, - 1, - 1, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, - 0, - 1, - 1, 0, 0, 0, - 1, 0, - 1, - 1, 0, 0, 1, 0, 0, 0, - 2, - 2, - 2, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, - 0, - 1, - 1, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, 0, 1, 1, 0, 0, 0, - 1, 0, - 1, - 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 1, 0, 0, 0, - 2, - 2, - 0, - 0, - 0, - 1, 0, 1, 1, 0, 0, + 0, + 0, + 0, + 0, + 0, + 3, + 0, + 0, 1, 0, + 1, + 3, + 3, 0, 0, + 0, + 0, + 0, + 0, + 0, + 7, + 0, + 0, + 3, + 0, + 3, 4, - 4, - 4, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, - 0, - 1, - 1, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, - 0, - 1, - 1, + 7, + 7, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 0, - 1, 0, - 1, - 1, 0, 0, 1, 0, 0, 0, - 2, - 2, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, - 0, - 1, - 1, - 0, - 1, - 1, - 1, - 1, - 1, - 1, - 2, - 0, - 1, - 1, - 1, - 1, - 0, - 1, - 1, - 36893488147419103231, 0, 1, 1, 0, 0, 0, - 1, 0, - 1, - 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 1, 0, 0, 0, - 2, - 2, 0, + 1, + 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 3, 0, 0, 1, 0, 1, - 1, + 3, + 3, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 0, 0, 1, 0, 0, 0, - 4, - 4, - 0, - 0, - 0, - 1, 0, 1, 1, 0, 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 0, 1, 0, 0, 0, + 0, + 1, + 1, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 3, + 0, + 0, + 1, + 0, + 1, + 3, + 3, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 7, + 0, + 0, + 3, + 0, + 3, + 7, + 7, + 0, + 0, + 0, + 0, + 0, + 0, + 0, + 15, + 0, + 0, + 7, + 0, + 7, 8, - 8, - 8, + 15, + 15, + 0, + 0, + 0, + 0, + 0, + 1, + 15, + 30, + 31, + 31, + 31, 0, 0, 0, 0, 1, 1, - 0, - 0, - 1, - 1, - 1, - 0, - 0, - 1, - 0, - 0, - 0, ], }, }, @@ -14226,8 +14283,8 @@ Simulation { kind: BigBool { index: StatePartIndex(271), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(144), @@ -14246,8 +14303,8 @@ Simulation { HdlSome(Bundle {value: UInt<1>}), }, }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(146), @@ -14309,8 +14366,8 @@ Simulation { HdlSome(Bundle {value: UInt<1>}), }, }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(152), @@ -14467,8 +14524,8 @@ Simulation { HdlSome(UInt<4>), }, }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(169), @@ -14492,128 +14549,128 @@ Simulation { kind: BigBool { index: StatePartIndex(343), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(172), kind: BigBool { index: StatePartIndex(344), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(173), kind: BigBool { index: StatePartIndex(345), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(174), kind: BigBool { index: StatePartIndex(346), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(175), kind: BigBool { index: StatePartIndex(347), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(176), kind: BigBool { index: StatePartIndex(348), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(177), kind: BigBool { index: StatePartIndex(349), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(178), kind: BigBool { index: StatePartIndex(350), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(179), kind: BigBool { index: StatePartIndex(351), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(180), kind: BigBool { index: StatePartIndex(352), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(181), kind: BigBool { index: StatePartIndex(353), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(182), kind: BigBool { index: StatePartIndex(354), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(183), kind: BigBool { index: StatePartIndex(355), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(184), kind: BigBool { index: StatePartIndex(356), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(185), kind: BigBool { index: StatePartIndex(357), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(186), kind: BigBool { index: StatePartIndex(358), }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(187), @@ -14650,8 +14707,8 @@ Simulation { kind: BigBool { index: StatePartIndex(405), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(191), @@ -14659,8 +14716,8 @@ Simulation { index: StatePartIndex(409), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(192), @@ -14676,8 +14733,8 @@ Simulation { kind: BigBool { index: StatePartIndex(429), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(194), @@ -14685,8 +14742,8 @@ Simulation { index: StatePartIndex(433), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(195), @@ -14702,8 +14759,8 @@ Simulation { kind: BigBool { index: StatePartIndex(443), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(197), @@ -14711,8 +14768,8 @@ Simulation { index: StatePartIndex(447), ty: UInt<2>, }, - state: 0x0, - last_state: 0x0, + state: 0x3, + last_state: 0x3, }, SimTrace { id: TraceScalarId(198), @@ -14728,8 +14785,8 @@ Simulation { kind: BigBool { index: StatePartIndex(465), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(200), @@ -14737,8 +14794,8 @@ Simulation { index: StatePartIndex(469), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(201), @@ -14754,8 +14811,8 @@ Simulation { kind: BigBool { index: StatePartIndex(485), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(203), @@ -14763,8 +14820,8 @@ Simulation { index: StatePartIndex(489), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(204), @@ -14780,8 +14837,8 @@ Simulation { kind: BigBool { index: StatePartIndex(499), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(206), @@ -14789,8 +14846,8 @@ Simulation { index: StatePartIndex(503), ty: UInt<2>, }, - state: 0x0, - last_state: 0x0, + state: 0x3, + last_state: 0x3, }, SimTrace { id: TraceScalarId(207), @@ -14806,8 +14863,8 @@ Simulation { kind: BigBool { index: StatePartIndex(514), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(209), @@ -14815,8 +14872,8 @@ Simulation { index: StatePartIndex(518), ty: UInt<3>, }, - state: 0x0, - last_state: 0x0, + state: 0x7, + last_state: 0x7, }, SimTrace { id: TraceScalarId(210), @@ -14832,8 +14889,8 @@ Simulation { kind: BigBool { index: StatePartIndex(536), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(212), @@ -14841,8 +14898,8 @@ Simulation { index: StatePartIndex(540), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(213), @@ -14858,8 +14915,8 @@ Simulation { kind: BigBool { index: StatePartIndex(556), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(215), @@ -14867,8 +14924,8 @@ Simulation { index: StatePartIndex(560), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(216), @@ -14884,8 +14941,8 @@ Simulation { kind: BigBool { index: StatePartIndex(570), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(218), @@ -14893,8 +14950,8 @@ Simulation { index: StatePartIndex(574), ty: UInt<2>, }, - state: 0x0, - last_state: 0x0, + state: 0x3, + last_state: 0x3, }, SimTrace { id: TraceScalarId(219), @@ -14910,8 +14967,8 @@ Simulation { kind: BigBool { index: StatePartIndex(591), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(221), @@ -14919,8 +14976,8 @@ Simulation { index: StatePartIndex(595), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(222), @@ -14936,8 +14993,8 @@ Simulation { kind: BigBool { index: StatePartIndex(611), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(224), @@ -14945,8 +15002,8 @@ Simulation { index: StatePartIndex(615), ty: UInt<1>, }, - state: 0x0, - last_state: 0x0, + state: 0x1, + last_state: 0x1, }, SimTrace { id: TraceScalarId(225), @@ -14962,8 +15019,8 @@ Simulation { kind: BigBool { index: StatePartIndex(625), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(227), @@ -14971,8 +15028,8 @@ Simulation { index: StatePartIndex(629), ty: UInt<2>, }, - state: 0x0, - last_state: 0x0, + state: 0x3, + last_state: 0x3, }, SimTrace { id: TraceScalarId(228), @@ -14988,8 +15045,8 @@ Simulation { kind: BigBool { index: StatePartIndex(640), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(230), @@ -14997,8 +15054,8 @@ Simulation { index: StatePartIndex(644), ty: UInt<3>, }, - state: 0x0, - last_state: 0x0, + state: 0x7, + last_state: 0x7, }, SimTrace { id: TraceScalarId(231), @@ -15014,8 +15071,8 @@ Simulation { kind: BigBool { index: StatePartIndex(655), }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(233), @@ -15023,8 +15080,8 @@ Simulation { index: StatePartIndex(659), ty: UInt<4>, }, - state: 0x0, - last_state: 0x0, + state: 0xf, + last_state: 0xf, }, SimTrace { id: TraceScalarId(234), @@ -15101,8 +15158,8 @@ Simulation { HdlSome(UInt<4>), }, }, - state: 0x1, - last_state: 0x1, + state: 0x0, + last_state: 0x0, }, SimTrace { id: TraceScalarId(242), @@ -15132,7 +15189,7 @@ Simulation { }, ), ], - instant: 10 μs, + instant: 20 μs, clocks_triggered: [ StatePartIndex(26), ], diff --git a/crates/cpu/tests/expected/reg_alloc.vcd b/crates/cpu/tests/expected/reg_alloc.vcd index 7642a58..ba1dbe8 100644 --- a/crates/cpu/tests/expected/reg_alloc.vcd +++ b/crates/cpu/tests/expected/reg_alloc.vcd @@ -683,7 +683,7 @@ b0 i" 1j" sHdlSome\x20(1) k" b0 l" -0m" +1m" 0n" 0o" 0p" @@ -747,7 +747,7 @@ b0 K# 0L# 1M# b0 N# -sHdlNone\x20(0) O# +sHdlSome\x20(1) O# b0 P# 0Q# 1R# @@ -756,7 +756,7 @@ b0 T# 1U# sHdlSome\x20(1) V# b0 W# -0X# +1X# $end #500000 1! @@ -780,7 +780,20 @@ $end 1b" 1d" 1f" +1n" 1Q# +b1 l" +1"# +0## +1$# +1(# +b1 *# +14# +b1 6# +1L# +b1 N# +b1 P# +b1 W# #2000000 0! 0b" @@ -792,7 +805,18 @@ $end 1b" 1d" 1f" +1o" 1Q# +b10 l" +0"# +0(# +b10 *# +04# +b10 6# +0L# +b10 N# +b10 P# +b10 W# #3000000 0! 0b" @@ -804,7 +828,21 @@ $end 1b" 1d" 1f" +1p" 1Q# +b11 l" +1%# +0&# +1'# +1(# +0)# +b11 *# +14# +b11 6# +1L# +b11 N# +b11 P# +b11 W# #4000000 0! 0b" @@ -816,7 +854,17 @@ $end 1b" 1d" 1f" +1q" 1Q# +b100 l" +0%# +0(# +04# +b100 6# +0L# +b100 N# +b100 P# +b100 W# #5000000 0! 0b" @@ -828,7 +876,20 @@ $end 1b" 1d" 1f" +1r" 1Q# +b101 l" +1+# +0,# +1-# +11# +b1 3# +14# +b101 6# +1L# +b101 N# +b101 P# +b101 W# #6000000 0! 0b" @@ -840,7 +901,18 @@ $end 1b" 1d" 1f" +1s" 1Q# +b110 l" +0+# +01# +b10 3# +04# +b110 6# +0L# +b110 N# +b110 P# +b110 W# #7000000 0! 0b" @@ -852,7 +924,22 @@ $end 1b" 1d" 1f" +1t" 1Q# +b111 l" +1.# +0/# +10# +11# +02# +b11 3# +14# +05# +b111 6# +1L# +b111 N# +b111 P# +b111 W# #8000000 0! 0b" @@ -864,7 +951,16 @@ $end 1b" 1d" 1f" +1u" 1Q# +b1000 l" +0.# +01# +04# +0L# +b1000 N# +b1000 P# +b1000 W# #9000000 0! 0b" @@ -876,5 +972,229 @@ $end 1b" 1d" 1f" +1v" 1Q# +b1001 l" +17# +08# +19# +1=# +b1 ?# +1I# +b1 K# +1L# +b1001 N# +b1001 P# +b1001 W# #10000000 +0! +0b" +0d" +0f" +0Q# +#10500000 +1! +1b" +1d" +1f" +1w" +1Q# +b1010 l" +07# +0=# +b10 ?# +0I# +b10 K# +0L# +b1010 N# +b1010 P# +b1010 W# +#11000000 +0! +0b" +0d" +0f" +0Q# +#11500000 +1! +1b" +1d" +1f" +1x" +1Q# +b1011 l" +1:# +0;# +1<# +1=# +0># +b11 ?# +1I# +b11 K# +1L# +b1011 N# +b1011 P# +b1011 W# +#12000000 +0! +0b" +0d" +0f" +0Q# +#12500000 +1! +1b" +1d" +1f" +1y" +1Q# +b1100 l" +0:# +0=# +0I# +b100 K# +0L# +b1100 N# +b1100 P# +b1100 W# +#13000000 +0! +0b" +0d" +0f" +0Q# +#13500000 +1! +1b" +1d" +1f" +1z" +1Q# +b1101 l" +1@# +0A# +1B# +1F# +b1 H# +1I# +b101 K# +1L# +b1101 N# +b1101 P# +b1101 W# +#14000000 +0! +0b" +0d" +0f" +0Q# +#14500000 +1! +1b" +1d" +1f" +1{" +1Q# +b1110 l" +0@# +0F# +b10 H# +0I# +b110 K# +0L# +b1110 N# +b1110 P# +b1110 W# +#15000000 +0! +0b" +0d" +0f" +0Q# +#15500000 +1! +1b" +1d" +1f" +1|" +1Q# +b1111 l" +1C# +0D# +1E# +1F# +0G# +b11 H# +1I# +0J# +b111 K# +1L# +0M# +b1111 N# +b1111 P# +b1111 W# +#16000000 +0! +0b" +0d" +0f" +0Q# +#16500000 +1! +1b" +1d" +1f" +1}" +1Q# +0R" +sHdlNone\x20(0) T" +sHdlNone\x20(0) Z" +sHdlNone\x20(0) k" +b0 l" +0m" +0C# +0F# +0I# +0L# +sHdlNone\x20(0) O# +b0 P# +sHdlNone\x20(0) V# +b0 W# +0X# +#17000000 +0! +0b" +0d" +0f" +0Q# +#17500000 +1! +1b" +1d" +1f" +1Q# +#18000000 +0! +0b" +0d" +0f" +0Q# +#18500000 +1! +1b" +1d" +1f" +1Q# +#19000000 +0! +0b" +0d" +0f" +0Q# +#19500000 +1! +1b" +1d" +1f" +1Q# +#20000000 diff --git a/crates/cpu/tests/reg_alloc.rs b/crates/cpu/tests/reg_alloc.rs index f38081b..a09bb5d 100644 --- a/crates/cpu/tests/reg_alloc.rs +++ b/crates/cpu/tests/reg_alloc.rs @@ -88,7 +88,7 @@ fn test_reg_alloc() { }, ), ); - for cycle in 0..10 { + for cycle in 0..20 { sim.advance_time(SimDuration::from_nanos(500)); sim.write_clock(sim.io().cd.clk, true); sim.advance_time(SimDuration::from_nanos(500)); @@ -225,9 +225,29 @@ circuit reg_alloc: wire _uninit_expr: Ty24 invalidate _uninit_expr connect unit_0_free_regs_tracker.free_in[0].data, _uninit_expr @[reg_alloc.rs 154:9] - wire _uninit_expr_1: UInt<1> - invalidate _uninit_expr_1 - connect unit_0_free_regs_tracker.alloc_out[0].ready, _uninit_expr_1 @[reg_alloc.rs 158:9] + connect unit_0_free_regs_tracker.alloc_out[0].ready, UInt<1>(0h0) @[reg_alloc.rs 158:9] + match unit_0_free_regs_tracker.alloc_out[0].data: @[reg_alloc.rs 161:13] + HdlNone: + connect available_units[0][0], UInt<1>(0h0) @[reg_alloc.rs 163:17] + HdlSome(_match_arm_value_9): + skip + match selected_unit_nums[0]: @[reg_alloc.rs 166:13] + HdlNone: + skip + HdlSome(_match_arm_value_10): + when eq(_match_arm_value_10.value, UInt<64>(0h0)): @[reg_alloc.rs 168:17] + connect unit_0_free_regs_tracker.alloc_out[0].ready, UInt<1>(0h1) @[reg_alloc.rs 169:21] + match unit_0_free_regs_tracker.alloc_out[0].data: @[reg_alloc.rs 161:13] + HdlNone: + connect available_units[1][0], UInt<1>(0h0) @[reg_alloc.rs 163:17] + HdlSome(_match_arm_value_11): + skip + match selected_unit_nums[1]: @[reg_alloc.rs 166:13] + HdlNone: + skip + HdlSome(_match_arm_value_12): + when eq(_match_arm_value_12.value, UInt<64>(0h0)): @[reg_alloc.rs 168:17] + connect unit_0_free_regs_tracker.alloc_out[0].ready, UInt<1>(0h1) @[reg_alloc.rs 169:21] module alu_branch: @[alu_branch.rs 15:1] input cd: Ty0 @[alu_branch.rs 18:29] module unit_free_regs_tracker: @[unit_free_regs_tracker.rs 7:1]