diff --git a/crates/cpu/src/instruction/power_isa.rs b/crates/cpu/src/instruction/power_isa.rs
index 373fccc..11973b0 100644
--- a/crates/cpu/src/instruction/power_isa.rs
+++ b/crates/cpu/src/instruction/power_isa.rs
@@ -27,9 +27,10 @@ impl MOpRegNum {
     pub const POWER_ISA_LR_REG_NUM: u32 = 1;
     pub const POWER_ISA_CTR_REG_NUM: u32 = 2;
     pub const POWER_ISA_TAR_REG_NUM: u32 = 3;
-    /// XER bits are stored in [`PRegValue.flags`][PRegValue], other bits are stored
+    /// XER bits are stored in [`PRegValue.flags`], bits that don't exist in [`PRegValue.flags`] are stored in [`PRegValue.int_fp`]
     ///
-    /// [PRegValue]: struct@crate::register::PRegValue
+    /// [`PRegValue.flags`]: struct@crate::register::PRegValue
+    /// [`PRegValue.int_fp`]: struct@crate::register::PRegValue
     pub const POWER_ISA_XER_REG_NUM: u32 = 4;
 
     pub const POWER_ISA_CR_REG_NUMS: Range<u32> = 8..16;
diff --git a/crates/cpu/src/register.rs b/crates/cpu/src/register.rs
index d8dc6d1..7dcd449 100644
--- a/crates/cpu/src/register.rs
+++ b/crates/cpu/src/register.rs
@@ -143,6 +143,6 @@ impl PRegFlags {
 /// Register Renaming will independently rename the ISA-level integer/fp
 /// register, flags, and CR field portions.
 pub struct PRegValue {
-    pub integer: UInt<64>,
+    pub int_fp: UInt<64>,
     pub flags: PRegFlags,
 }