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improve debug formatting of PRegValue and PRegFlags

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This commit is contained in:
Jacob Lifshay 2026-05-07 21:36:47 -07:00
parent 559e2967a2
commit 33b5d59507
Signed by: programmerjake
SSH key fingerprint: SHA256:HnFTLGpSm4Q4Fj502oCFisjZSoakwEuTsJJMSke63RQ
2 changed files with 49 additions and 21 deletions
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58
crates/cpu/src/register.rs
View file

@ -6,7 +6,7 @@ use fayalite::{
expr::CastToImpl, expr::CastToImpl,
int::{BoolOrIntType, UIntInRange}, int::{BoolOrIntType, UIntInRange},
prelude::*, prelude::*,
ty::StaticType, ty::{SimValueDebug, StaticType},
}; };
use std::{any::Any, fmt}; use std::{any::Any, fmt};
@ -49,6 +49,7 @@ pub trait PRegFlagsViewTrait: Type + PRegFlagsViewTraitSealed {
fn view_into_view_unused<T>(view: Self::View<T>) -> ViewUnused<T, PRegFlagsAllUnused>; fn view_into_view_unused<T>(view: Self::View<T>) -> ViewUnused<T, PRegFlagsAllUnused>;
fn debug_fmt<'a, T: 'a, F: FnMut(&'a T, bool) -> Option<D>, D: fmt::Debug>( fn debug_fmt<'a, T: 'a, F: FnMut(&'a T, bool) -> Option<D>, D: fmt::Debug>(
view: &'a Self::View<T>, view: &'a Self::View<T>,
type_name: Option<&str>,
field: F, field: F,
f: &mut fmt::Formatter<'_>, f: &mut fmt::Formatter<'_>,
) -> fmt::Result; ) -> fmt::Result;
@ -475,6 +476,7 @@ macro_rules! impl_view_trait {
fn debug_fmt<'a, T: 'a, F: FnMut(&'a T, bool) -> Option<D>, D: fmt::Debug>( fn debug_fmt<'a, T: 'a, F: FnMut(&'a T, bool) -> Option<D>, D: fmt::Debug>(
view: &'a Self::View<T>, view: &'a Self::View<T>,
type_name: Option<&str>,
mut field: F, mut field: F,
f: &mut fmt::Formatter<'_>, f: &mut fmt::Formatter<'_>,
) -> fmt::Result { ) -> fmt::Result {
@ -482,7 +484,7 @@ macro_rules! impl_view_trait {
$unused: ViewUnused([$($unused_field,)*]), $unused: ViewUnused([$($unused_field,)*]),
$($view_field: $flags_field,)* $($view_field: $flags_field,)*
} = view; } = view;
let mut debug_struct = f.debug_struct(stringify!($FlagsMode)); let mut debug_struct = f.debug_struct(type_name.unwrap_or(stringify!($FlagsMode)));
#[allow(unused_mut)] #[allow(unused_mut)]
let mut any_skipped = false; let mut any_skipped = false;
$(if let Some(v) = field($flags_field, true) { $(if let Some(v) = field($flags_field, true) {
@ -774,25 +776,40 @@ impl<T: Type> PRegFlags<T> {
#[hdl] #[hdl]
pub fn debug_fmt<V: PRegFlagsViewTrait>( pub fn debug_fmt<V: PRegFlagsViewTrait>(
this: &SimValue<Self>, this: &SimValue<Self>,
type_name: Option<&str>,
f: &mut fmt::Formatter<'_>, f: &mut fmt::Formatter<'_>,
) -> fmt::Result { ) -> fmt::Result {
if let Some(this) = <dyn Any>::downcast_ref::<SimValue<PRegFlags>>(this) { if let Some(this) = <dyn Any>::downcast_ref::<SimValue<PRegFlags>>(this) {
V::debug_fmt( V::debug_fmt(
&PRegFlags::view_sim_ref::<V>(this), &PRegFlags::view_sim_ref::<V>(this),
type_name,
|v, _| v.then_some(*v), |v, _| v.then_some(*v),
f, f,
) )
} else { } else {
V::debug_fmt(&PRegFlags::view_sim_ref::<V>(this), |v, _| Some(*v), f) V::debug_fmt(
&PRegFlags::view_sim_ref::<V>(this),
type_name,
|v, _| Some(*v),
f,
)
} }
} }
#[hdl] #[hdl]
pub fn debug_fmt_mode(this: &SimValue<Self>, mode: &SimValue<FlagsMode>) -> impl fmt::Debug { pub fn debug_fmt_mode(
this: &SimValue<Self>,
short_name: bool,
mode: &SimValue<FlagsMode>,
) -> impl fmt::Debug {
fmt::from_fn(move |f| { fmt::from_fn(move |f| {
#[hdl(sim)] #[hdl(sim)]
match mode { match mode {
FlagsMode::PowerISA(_) => Self::debug_fmt::<PRegFlagsPowerISA>(this, f), FlagsMode::PowerISA(_) => {
FlagsMode::X86(_) => Self::debug_fmt::<PRegFlagsX86>(this, f), Self::debug_fmt::<PRegFlagsPowerISA>(this, short_name.then_some("Pwr"), f)
}
FlagsMode::X86(_) => {
Self::debug_fmt::<PRegFlagsX86>(this, short_name.then_some("X86"), f)
}
} }
}) })
} }
@ -819,7 +836,7 @@ impl PRegFlags {
pub const FLAG_COUNT: usize = PRegFlagsAllUnused::UNUSED_INNER_LEN; pub const FLAG_COUNT: usize = PRegFlagsAllUnused::UNUSED_INNER_LEN;
} }
#[hdl(cmp_eq)] #[hdl(cmp_eq, custom_debug(sim))]
/// Unit output register's value -- a combination of an integer/fp register /// Unit output register's value -- a combination of an integer/fp register
/// and flags register and CR field. /// and flags register and CR field.
/// ///
@ -830,6 +847,15 @@ pub struct PRegValue {
pub flags: PRegFlags, pub flags: PRegFlags,
} }
impl SimValueDebug for PRegValue {
fn sim_value_debug(
value: &<Self as Type>::SimValue,
f: &mut fmt::Formatter<'_>,
) -> fmt::Result {
fmt::Debug::fmt(&Self::debug_fmt::<PRegFlagsPowerISA>(value, Some("Pwr")), f)
}
}
impl PRegValue { impl PRegValue {
#[hdl] #[hdl]
pub fn zeroed() -> Expr<Self> { pub fn zeroed() -> Expr<Self> {
@ -848,7 +874,10 @@ impl PRegValue {
} }
} }
#[hdl] #[hdl]
pub fn debug_fmt<V: PRegFlagsViewTrait>(this: &SimValue<Self>) -> impl fmt::Debug { pub fn debug_fmt<V: PRegFlagsViewTrait>(
this: &<Self as Type>::SimValue,
flags_type_name: Option<&str>,
) -> impl fmt::Debug {
fmt::from_fn(move |f| { fmt::from_fn(move |f| {
#[hdl(sim)] #[hdl(sim)]
let Self { int_fp, flags } = this; let Self { int_fp, flags } = this;
@ -856,19 +885,26 @@ impl PRegValue {
.field("int_fp", int_fp) .field("int_fp", int_fp)
.field( .field(
"flags", "flags",
&fmt::from_fn(|f| PRegFlags::debug_fmt::<V>(flags, f)), &fmt::from_fn(|f| PRegFlags::debug_fmt::<V>(flags, flags_type_name, f)),
) )
.finish() .finish()
}) })
} }
#[hdl] #[hdl]
pub fn debug_fmt_mode(this: &SimValue<Self>, mode: &SimValue<FlagsMode>) -> impl fmt::Debug { pub fn debug_fmt_mode(
this: &SimValue<Self>,
flags_short_name: bool,
mode: &SimValue<FlagsMode>,
) -> impl fmt::Debug {
fmt::from_fn(move |f| { fmt::from_fn(move |f| {
#[hdl(sim)] #[hdl(sim)]
let Self { int_fp, flags } = this; let Self { int_fp, flags } = this;
f.debug_struct("PRegValue") f.debug_struct("PRegValue")
.field("int_fp", int_fp) .field("int_fp", int_fp)
.field("flags", &PRegFlags::debug_fmt_mode(flags, mode)) .field(
"flags",
&PRegFlags::debug_fmt_mode(flags, flags_short_name, mode),
)
.finish() .finish()
}) })
} }

12
crates/cpu/tests/rename_execute_retire.rs
View file

@ -1835,17 +1835,9 @@ impl<C: PhantomConstCpuConfig> MockUnitOp<C> {
execution_state.run_mop(&self.mop, &self.src_values, self.config); execution_state.run_mop(&self.mop, &self.src_values, self.config);
assert!(output.is_some() || caused_cancel.is_some()); assert!(output.is_some() || caused_cancel.is_some());
println!("try_run: {:#x}: {:?}", self.mop.pc.as_int(), self.mop.mop); println!("try_run: {:#x}: {:?}", self.mop.pc.as_int(), self.mop.mop);
println!( println!("<- {:?}", self.src_values);
"<- {:?}",
self.src_values
.each_ref()
.map(PRegValue::debug_fmt::<PRegFlagsPowerISA>),
);
self.output_ready = output.map(|(dest_value, predictor_op)| { self.output_ready = output.map(|(dest_value, predictor_op)| {
println!( println!("-> {dest_value:?}");
"-> {:?}",
PRegValue::debug_fmt::<PRegFlagsPowerISA>(&dest_value),
);
#[hdl(sim)] #[hdl(sim)]
let NextPcPredictorOp::<_> { let NextPcPredictorOp::<_> {
call_stack_op, call_stack_op,