Actions - libre-chip/cpu - Libre-Chip.org

WIP adding new test for L2 reg file store

#99 -Commit 3300e7ca01 pushed by programmerjake

#12

2026-05-08 04:50:35 +00:00

5m45s

WIP adding new test for L2 reg file store

#98 -Commit fca2ff8c91 pushed by programmerjake

#12

2026-05-07 03:17:52 +00:00

5m23s

update decode_one_insn.vcd for modified instruction data structures

#97 -Commit 409ca7bf97 pushed by programmerjake

#12

2026-05-06 04:57:57 +00:00

5m14s

update fayalite to fix bug in VCD generation

#96 -Commit 9308e5d195 pushed by programmerjake

#12

2026-05-06 04:34:28 +00:00

5m18s

update next_pc.vcd

#95 -Commit 4d4f8aadd7 pushed by programmerjake

#12

2026-05-06 03:01:04 +00:00

5m10s

group micro ops by the instruction they come from when retiring

#94 -Commit 09c8c194e0 pushed by programmerjake

#12

2026-05-06 02:47:49 +00:00

4m6s

use custom debug

#93 -Commit 83b3f7bac9 pushed by programmerjake

#12

2026-05-04 06:42:18 +00:00

4m1s

update fayalite to include simulator optimizations and custom debug

#92 -Commit ac99caa3b6 pushed by programmerjake

#12

2026-05-01 06:25:24 +00:00

1m54s

update fayalite to include simulator optimizations

#91 -Commit c3679f2718 pushed by programmerjake

#12

2026-05-01 02:27:57 +00:00

4m24s

add support for speculative loads

#90 -Commit 283117d8df pushed by programmerjake

#12

2026-05-01 01:01:08 +00:00

9m21s

add support for speculative loads

#89 -Commit 7ea22dafe2 pushed by programmerjake

#12

2026-05-01 00:51:43 +00:00

26s

add support for speculative loads

#88 -Commit 52b1b625d1 pushed by programmerjake

#12

2026-04-30 08:50:23 +00:00

9m53s

WIP adding support for speculative loads/stores

#87 -Commit 9fbb517cf4 pushed by programmerjake

#12

2026-04-28 07:59:31 +00:00

6m27s

add initial impl of rename_execute_retire; running a recursive fibonacci gives the correct output

#86 -Commit 4d21ca622b pushed by programmerjake

#12

2026-04-25 01:41:12 +00:00

12m16s

update fayalite for libre-chip/fayalite#68 change vcd output to have module contents under instance's name

#85 -Commit 6ed04c809e pushed by programmerjake

master

2026-03-27 03:08:42 +00:00

22m6s

update fayalite for libre-chip/fayalite#68 change vcd output to have module contents under instance's name

#84 -Commit 6ed04c809e pushed by programmerjake

#11

2026-03-27 02:46:30 +00:00

21m54s

add sram and main_memory_and_io modules

#83 -Commit a1147f0f05 pushed by programmerjake

master

2026-03-26 09:50:13 +00:00

23m28s

add sram and main_memory_and_io modules

#82 -Commit a1147f0f05 pushed by programmerjake

#10

2026-03-26 09:26:26 +00:00

22m26s

add sram and main_memory_and_io modules

#81 -Commit 5c4ec8127f pushed by programmerjake

#10

2026-03-26 09:02:03 +00:00

22m3s

add fetch::fetch and fetch::l1_i_cache with some testing

#80 -Commit e69c92c8da pushed by programmerjake

master

2026-02-22 03:21:03 +00:00

22m40s

add fetch::fetch and fetch::l1_i_cache with some testing

#79 -Commit e69c92c8da pushed by programmerjake

#9

2026-02-22 02:55:15 +00:00

22m37s

add fetch::fetch and fetch::l1_i_cache with some testing

#78 -Commit 198fa64899 pushed by programmerjake

#9

2026-02-22 02:32:21 +00:00

18m42s

add fetch::fetch and fetch::l1_i_cache with some testing

#77 -Commit fff8cf32c1 pushed by programmerjake

#9

2026-02-21 01:46:58 +00:00

25m39s

update fayalite to include 1bc835803b for a major speedup of the decoder tests

#76 -Commit 596440755c pushed by programmerjake

master

2026-02-04 03:27:34 +00:00

24m49s

update fayalite to include 1bc835803b for a major speedup of the decoder tests

#75 -Commit 596440755c pushed by programmerjake

#8

2026-02-04 03:00:20 +00:00

23m44s

implement decoding mtspr/mfspr/mftb

#74 -Commit f88346ea37 pushed by programmerjake

master

2026-01-29 02:54:31 +00:00

32m15s

implement decoding mtspr/mfspr/mftb

#73 -Commit f88346ea37 pushed by programmerjake

#7

2026-01-29 02:07:18 +00:00

31m51s

implement decoding all rotate instructions

#72 -Commit a42b76b468 pushed by programmerjake

#7

2026-01-28 03:47:43 +00:00

27m13s

reduce the number of wires to have one per form/field pair instead of one per insn/field pair

#71 -Commit faa8dde774 pushed by programmerjake

#7

2026-01-27 00:43:57 +00:00

30m10s

add shift/rotate MOp definition

#70 -Commit 59874b9b29 pushed by programmerjake

#7

2026-01-26 05:04:43 +00:00

29m25s