fayalite/crates/fayalite/tests/sim/expected/sim_resettable_counter_async.vcd

68 lines
548 B
Text

$timescale 1 ps $end
$scope module sim_resettable_counter $end
$scope struct cd $end
$var wire 1 ! clk $end
$var wire 1 " rst $end
$upscope $end
$var wire 8 # out $end
$upscope $end
$enddefinitions $end
$dumpvars
0!
0"
b0 #
$end
#1000000
1!
b1 #
#2000000
0!
1"
b0 #
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1!
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b1 #
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0!
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1!
b10 #
#8000000
0!
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1!
b11 #
#10000000
0!
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1!
b100 #
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0!
1"
b0 #
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b1 #
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b10 #
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b11 #
#20000000
0!