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fayalite/crates/fayalite/tests/sim/expected/memories3.txt

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Simulation {
state: State {
insns: Insns {
state_layout: StateLayout {
ty: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 14,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: UInt<3>,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: UInt<3>,
},
SlotDebugData {
name: "",
ty: UInt<3>,
},
SlotDebugData {
name: "",
ty: UInt<3>,
},
SlotDebugData {
name: "",
ty: Bool,
},
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 108,
debug_data: [
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.addr",
ty: UInt<3>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.en",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.clk",
ty: Clock,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.addr",
ty: UInt<3>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.en",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.clk",
ty: Clock,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[0]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[1]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[2]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[3]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[4]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[5]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[6]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[7]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.addr",
ty: UInt<3>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.en",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.clk",
ty: Clock,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.addr",
ty: UInt<3>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.en",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.clk",
ty: Clock,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[0]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[1]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[2]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[3]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[4]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[5]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[6]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[7]",
ty: Bool,
},
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "[0]",
ty: Bool,
},
SlotDebugData {
name: "[1]",
ty: Bool,
},
SlotDebugData {
name: "[2]",
ty: Bool,
},
SlotDebugData {
name: "[3]",
ty: Bool,
},
SlotDebugData {
name: "[4]",
ty: Bool,
},
SlotDebugData {
name: "[5]",
ty: Bool,
},
SlotDebugData {
name: "[6]",
ty: Bool,
},
SlotDebugData {
name: "[7]",
ty: Bool,
},
SlotDebugData {
name: "[0]",
ty: Bool,
},
SlotDebugData {
name: "[1]",
ty: Bool,
},
SlotDebugData {
name: "[2]",
ty: Bool,
},
SlotDebugData {
name: "[3]",
ty: Bool,
},
SlotDebugData {
name: "[4]",
ty: Bool,
},
SlotDebugData {
name: "[5]",
ty: Bool,
},
SlotDebugData {
name: "[6]",
ty: Bool,
},
SlotDebugData {
name: "[7]",
ty: Bool,
},
],
..
},
},
memories: StatePartLayout<Memories> {
len: 1,
debug_data: [
(),
],
layout_data: [
MemoryData {
array_type: Array<Array<UInt<8>, 8>, 8>,
data: [
// len = 0x8
[0x0]: 0x0000000000000000,
[0x1]: 0x0000000000000000,
[0x2]: 0x0000000000000000,
[0x3]: 0x0000000000000000,
[0x4]: 0x0000000000000000,
[0x5]: 0x0000000000000000,
[0x6]: 0x0000000000000000,
[0x7]: 0x0000000000000000,
],
},
],
..
},
},
insns: [
// at: module-XXXXXXXXXX.rs:8:1
0: Copy {
dest: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.addr", ty: UInt<3> },
src: StatePartIndex<BigSlots>(11), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.addr", ty: UInt<3> },
},
1: Copy {
dest: StatePartIndex<BigSlots>(58), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.en", ty: Bool },
src: StatePartIndex<BigSlots>(12), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.en", ty: Bool },
},
2: Copy {
dest: StatePartIndex<BigSlots>(59), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.clk", ty: Clock },
src: StatePartIndex<BigSlots>(13), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.clk", ty: Clock },
},
3: Copy {
dest: StatePartIndex<BigSlots>(60), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[0]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(14), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[0]", ty: UInt<8> },
},
4: Copy {
dest: StatePartIndex<BigSlots>(61), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[1]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(15), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[1]", ty: UInt<8> },
},
5: Copy {
dest: StatePartIndex<BigSlots>(62), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[2]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(16), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[2]", ty: UInt<8> },
},
6: Copy {
dest: StatePartIndex<BigSlots>(63), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[3]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(17), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[3]", ty: UInt<8> },
},
7: Copy {
dest: StatePartIndex<BigSlots>(64), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[4]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(18), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[4]", ty: UInt<8> },
},
8: Copy {
dest: StatePartIndex<BigSlots>(65), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[5]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(19), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[5]", ty: UInt<8> },
},
9: Copy {
dest: StatePartIndex<BigSlots>(66), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[6]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(20), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[6]", ty: UInt<8> },
},
10: Copy {
dest: StatePartIndex<BigSlots>(67), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[7]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(21), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.data[7]", ty: UInt<8> },
},
11: Copy {
dest: StatePartIndex<BigSlots>(68), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[0]", ty: Bool },
src: StatePartIndex<BigSlots>(22), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[0]", ty: Bool },
},
12: Copy {
dest: StatePartIndex<BigSlots>(69), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[1]", ty: Bool },
src: StatePartIndex<BigSlots>(23), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[1]", ty: Bool },
},
13: Copy {
dest: StatePartIndex<BigSlots>(70), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[2]", ty: Bool },
src: StatePartIndex<BigSlots>(24), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[2]", ty: Bool },
},
14: Copy {
dest: StatePartIndex<BigSlots>(71), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[3]", ty: Bool },
src: StatePartIndex<BigSlots>(25), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[3]", ty: Bool },
},
15: Copy {
dest: StatePartIndex<BigSlots>(72), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[4]", ty: Bool },
src: StatePartIndex<BigSlots>(26), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[4]", ty: Bool },
},
16: Copy {
dest: StatePartIndex<BigSlots>(73), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[5]", ty: Bool },
src: StatePartIndex<BigSlots>(27), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[5]", ty: Bool },
},
17: Copy {
dest: StatePartIndex<BigSlots>(74), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[6]", ty: Bool },
src: StatePartIndex<BigSlots>(28), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[6]", ty: Bool },
},
18: Copy {
dest: StatePartIndex<BigSlots>(75), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[7]", ty: Bool },
src: StatePartIndex<BigSlots>(29), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::w.mask[7]", ty: Bool },
},
// at: module-XXXXXXXXXX.rs:6:1
19: Copy {
dest: StatePartIndex<BigSlots>(3), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[0]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(33), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[0]", ty: UInt<8> },
},
20: Copy {
dest: StatePartIndex<BigSlots>(4), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[1]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[1]", ty: UInt<8> },
},
21: Copy {
dest: StatePartIndex<BigSlots>(5), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[2]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(35), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[2]", ty: UInt<8> },
},
22: Copy {
dest: StatePartIndex<BigSlots>(6), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[3]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[3]", ty: UInt<8> },
},
23: Copy {
dest: StatePartIndex<BigSlots>(7), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[4]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(37), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[4]", ty: UInt<8> },
},
24: Copy {
dest: StatePartIndex<BigSlots>(8), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[5]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(38), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[5]", ty: UInt<8> },
},
25: Copy {
dest: StatePartIndex<BigSlots>(9), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[6]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(39), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[6]", ty: UInt<8> },
},
26: Copy {
dest: StatePartIndex<BigSlots>(10), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.data[7]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(40), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[7]", ty: UInt<8> },
},
27: Copy {
dest: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.clk", ty: Clock },
src: StatePartIndex<BigSlots>(2), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.clk", ty: Clock },
},
28: Copy {
dest: StatePartIndex<BigSlots>(31), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.en", ty: Bool },
src: StatePartIndex<BigSlots>(1), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.en", ty: Bool },
},
29: Copy {
dest: StatePartIndex<BigSlots>(30), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.addr", ty: UInt<3> },
src: StatePartIndex<BigSlots>(0), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::r.addr", ty: UInt<3> },
},
// at: module-XXXXXXXXXX.rs:4:1
30: CastBigToArrayIndex {
dest: StatePartIndex<SmallSlots>(9), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
src: StatePartIndex<BigSlots>(57), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.addr", ty: UInt<3> },
},
31: IsNonZeroDestIsSmall {
dest: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<BigSlots>(58), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.en", ty: Bool },
},
32: IsNonZeroDestIsSmall {
dest: StatePartIndex<SmallSlots>(7), // (0x0 0) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<BigSlots>(59), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.clk", ty: Clock },
},
33: AndSmall {
dest: StatePartIndex<SmallSlots>(6), // (0x0 0) SlotDebugData { name: "", ty: Bool },
lhs: StatePartIndex<SmallSlots>(7), // (0x0 0) SlotDebugData { name: "", ty: Bool },
rhs: StatePartIndex<SmallSlots>(5), // (0x1 1) SlotDebugData { name: "", ty: Bool },
},
34: CastBigToArrayIndex {
dest: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
src: StatePartIndex<BigSlots>(30), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.addr", ty: UInt<3> },
},
35: IsNonZeroDestIsSmall {
dest: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<BigSlots>(31), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.en", ty: Bool },
},
36: BranchIfSmallZero {
target: 46,
value: StatePartIndex<SmallSlots>(3), // (0x0 0) SlotDebugData { name: "", ty: Bool },
},
37: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(41), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 0,
width: 8,
},
38: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(42), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 8,
width: 8,
},
39: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 16,
width: 8,
},
40: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(44), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 24,
width: 8,
},
41: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(45), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 32,
width: 8,
},
42: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(46), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 40,
width: 8,
},
43: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 48,
width: 8,
},
44: MemoryReadUInt {
dest: StatePartIndex<BigSlots>(48), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(4), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 56,
width: 8,
},
45: Branch {
target: 54,
},
46: Const {
dest: StatePartIndex<BigSlots>(41), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
value: 0x0,
},
47: Const {
dest: StatePartIndex<BigSlots>(42), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
value: 0x0,
},
48: Const {
dest: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
value: 0x0,
},
49: Const {
dest: StatePartIndex<BigSlots>(44), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
value: 0x0,
},
50: Const {
dest: StatePartIndex<BigSlots>(45), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
value: 0x0,
},
51: Const {
dest: StatePartIndex<BigSlots>(46), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
value: 0x0,
},
52: Const {
dest: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
value: 0x0,
},
53: Const {
dest: StatePartIndex<BigSlots>(48), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
value: 0x0,
},
54: IsNonZeroDestIsSmall {
dest: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<BigSlots>(32), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.clk", ty: Clock },
},
55: AndSmall {
dest: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
lhs: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
rhs: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Bool },
},
56: BranchIfSmallZero {
target: 73,
value: StatePartIndex<SmallSlots>(1), // (0x0 0) SlotDebugData { name: "", ty: Bool },
},
57: Copy {
dest: StatePartIndex<BigSlots>(33), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[0]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(49), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
},
58: Copy {
dest: StatePartIndex<BigSlots>(34), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[1]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(50), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
},
59: Copy {
dest: StatePartIndex<BigSlots>(35), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[2]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(51), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
},
60: Copy {
dest: StatePartIndex<BigSlots>(36), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[3]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(52), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
},
61: Copy {
dest: StatePartIndex<BigSlots>(37), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[4]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(53), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
},
62: Copy {
dest: StatePartIndex<BigSlots>(38), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[5]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(54), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
},
63: Copy {
dest: StatePartIndex<BigSlots>(39), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[6]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(55), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
},
64: Copy {
dest: StatePartIndex<BigSlots>(40), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::r0.data[7]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(56), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
},
65: Copy {
dest: StatePartIndex<BigSlots>(49), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(41), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
},
66: Copy {
dest: StatePartIndex<BigSlots>(50), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(42), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
},
67: Copy {
dest: StatePartIndex<BigSlots>(51), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(43), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
},
68: Copy {
dest: StatePartIndex<BigSlots>(52), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(44), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
},
69: Copy {
dest: StatePartIndex<BigSlots>(53), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(45), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
},
70: Copy {
dest: StatePartIndex<BigSlots>(54), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(46), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
},
71: Copy {
dest: StatePartIndex<BigSlots>(55), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(47), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
},
72: Copy {
dest: StatePartIndex<BigSlots>(56), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(48), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
},
73: BranchIfSmallZero {
target: 127,
value: StatePartIndex<SmallSlots>(6), // (0x0 0) SlotDebugData { name: "", ty: Bool },
},
74: CopySmall {
dest: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
src: StatePartIndex<SmallSlots>(10), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
},
75: CopySmall {
dest: StatePartIndex<SmallSlots>(10), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
src: StatePartIndex<SmallSlots>(9), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
},
76: CopySmall {
dest: StatePartIndex<SmallSlots>(13), // (0x0 0) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<SmallSlots>(12), // (0x0 0) SlotDebugData { name: "", ty: Bool },
},
77: CopySmall {
dest: StatePartIndex<SmallSlots>(12), // (0x0 0) SlotDebugData { name: "", ty: Bool },
src: StatePartIndex<SmallSlots>(8), // (0x0 0) SlotDebugData { name: "", ty: Bool },
},
78: Copy {
dest: StatePartIndex<BigSlots>(84), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(76), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
},
79: Copy {
dest: StatePartIndex<BigSlots>(85), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(77), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
},
80: Copy {
dest: StatePartIndex<BigSlots>(86), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(78), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
},
81: Copy {
dest: StatePartIndex<BigSlots>(87), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(79), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
},
82: Copy {
dest: StatePartIndex<BigSlots>(88), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(80), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
},
83: Copy {
dest: StatePartIndex<BigSlots>(89), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(81), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
},
84: Copy {
dest: StatePartIndex<BigSlots>(90), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(82), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
},
85: Copy {
dest: StatePartIndex<BigSlots>(91), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(83), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
},
86: Copy {
dest: StatePartIndex<BigSlots>(76), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(60), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[0]", ty: UInt<8> },
},
87: Copy {
dest: StatePartIndex<BigSlots>(77), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(61), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[1]", ty: UInt<8> },
},
88: Copy {
dest: StatePartIndex<BigSlots>(78), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(62), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[2]", ty: UInt<8> },
},
89: Copy {
dest: StatePartIndex<BigSlots>(79), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(63), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[3]", ty: UInt<8> },
},
90: Copy {
dest: StatePartIndex<BigSlots>(80), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(64), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[4]", ty: UInt<8> },
},
91: Copy {
dest: StatePartIndex<BigSlots>(81), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(65), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[5]", ty: UInt<8> },
},
92: Copy {
dest: StatePartIndex<BigSlots>(82), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(66), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[6]", ty: UInt<8> },
},
93: Copy {
dest: StatePartIndex<BigSlots>(83), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
src: StatePartIndex<BigSlots>(67), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.data[7]", ty: UInt<8> },
},
94: Copy {
dest: StatePartIndex<BigSlots>(100), // (0x0) SlotDebugData { name: "[0]", ty: Bool },
src: StatePartIndex<BigSlots>(92), // (0x0) SlotDebugData { name: "[0]", ty: Bool },
},
95: Copy {
dest: StatePartIndex<BigSlots>(101), // (0x0) SlotDebugData { name: "[1]", ty: Bool },
src: StatePartIndex<BigSlots>(93), // (0x0) SlotDebugData { name: "[1]", ty: Bool },
},
96: Copy {
dest: StatePartIndex<BigSlots>(102), // (0x0) SlotDebugData { name: "[2]", ty: Bool },
src: StatePartIndex<BigSlots>(94), // (0x0) SlotDebugData { name: "[2]", ty: Bool },
},
97: Copy {
dest: StatePartIndex<BigSlots>(103), // (0x0) SlotDebugData { name: "[3]", ty: Bool },
src: StatePartIndex<BigSlots>(95), // (0x0) SlotDebugData { name: "[3]", ty: Bool },
},
98: Copy {
dest: StatePartIndex<BigSlots>(104), // (0x0) SlotDebugData { name: "[4]", ty: Bool },
src: StatePartIndex<BigSlots>(96), // (0x0) SlotDebugData { name: "[4]", ty: Bool },
},
99: Copy {
dest: StatePartIndex<BigSlots>(105), // (0x0) SlotDebugData { name: "[5]", ty: Bool },
src: StatePartIndex<BigSlots>(97), // (0x0) SlotDebugData { name: "[5]", ty: Bool },
},
100: Copy {
dest: StatePartIndex<BigSlots>(106), // (0x0) SlotDebugData { name: "[6]", ty: Bool },
src: StatePartIndex<BigSlots>(98), // (0x0) SlotDebugData { name: "[6]", ty: Bool },
},
101: Copy {
dest: StatePartIndex<BigSlots>(107), // (0x0) SlotDebugData { name: "[7]", ty: Bool },
src: StatePartIndex<BigSlots>(99), // (0x0) SlotDebugData { name: "[7]", ty: Bool },
},
102: Copy {
dest: StatePartIndex<BigSlots>(92), // (0x0) SlotDebugData { name: "[0]", ty: Bool },
src: StatePartIndex<BigSlots>(68), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[0]", ty: Bool },
},
103: Copy {
dest: StatePartIndex<BigSlots>(93), // (0x0) SlotDebugData { name: "[1]", ty: Bool },
src: StatePartIndex<BigSlots>(69), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[1]", ty: Bool },
},
104: Copy {
dest: StatePartIndex<BigSlots>(94), // (0x0) SlotDebugData { name: "[2]", ty: Bool },
src: StatePartIndex<BigSlots>(70), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[2]", ty: Bool },
},
105: Copy {
dest: StatePartIndex<BigSlots>(95), // (0x0) SlotDebugData { name: "[3]", ty: Bool },
src: StatePartIndex<BigSlots>(71), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[3]", ty: Bool },
},
106: Copy {
dest: StatePartIndex<BigSlots>(96), // (0x0) SlotDebugData { name: "[4]", ty: Bool },
src: StatePartIndex<BigSlots>(72), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[4]", ty: Bool },
},
107: Copy {
dest: StatePartIndex<BigSlots>(97), // (0x0) SlotDebugData { name: "[5]", ty: Bool },
src: StatePartIndex<BigSlots>(73), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[5]", ty: Bool },
},
108: Copy {
dest: StatePartIndex<BigSlots>(98), // (0x0) SlotDebugData { name: "[6]", ty: Bool },
src: StatePartIndex<BigSlots>(74), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[6]", ty: Bool },
},
109: Copy {
dest: StatePartIndex<BigSlots>(99), // (0x0) SlotDebugData { name: "[7]", ty: Bool },
src: StatePartIndex<BigSlots>(75), // (0x0) SlotDebugData { name: "InstantiatedModule(memories3: memories3).memories3::mem::w1.mask[7]", ty: Bool },
},
110: BranchIfSmallZero {
target: 127,
value: StatePartIndex<SmallSlots>(13), // (0x0 0) SlotDebugData { name: "", ty: Bool },
},
111: BranchIfZero {
target: 113,
value: StatePartIndex<BigSlots>(100), // (0x0) SlotDebugData { name: "[0]", ty: Bool },
},
112: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(84), // (0x0) SlotDebugData { name: "[0]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 0,
width: 8,
},
113: BranchIfZero {
target: 115,
value: StatePartIndex<BigSlots>(101), // (0x0) SlotDebugData { name: "[1]", ty: Bool },
},
114: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(85), // (0x0) SlotDebugData { name: "[1]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 8,
width: 8,
},
115: BranchIfZero {
target: 117,
value: StatePartIndex<BigSlots>(102), // (0x0) SlotDebugData { name: "[2]", ty: Bool },
},
116: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(86), // (0x0) SlotDebugData { name: "[2]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 16,
width: 8,
},
117: BranchIfZero {
target: 119,
value: StatePartIndex<BigSlots>(103), // (0x0) SlotDebugData { name: "[3]", ty: Bool },
},
118: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(87), // (0x0) SlotDebugData { name: "[3]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 24,
width: 8,
},
119: BranchIfZero {
target: 121,
value: StatePartIndex<BigSlots>(104), // (0x0) SlotDebugData { name: "[4]", ty: Bool },
},
120: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(88), // (0x0) SlotDebugData { name: "[4]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 32,
width: 8,
},
121: BranchIfZero {
target: 123,
value: StatePartIndex<BigSlots>(105), // (0x0) SlotDebugData { name: "[5]", ty: Bool },
},
122: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(89), // (0x0) SlotDebugData { name: "[5]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 40,
width: 8,
},
123: BranchIfZero {
target: 125,
value: StatePartIndex<BigSlots>(106), // (0x0) SlotDebugData { name: "[6]", ty: Bool },
},
124: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(90), // (0x0) SlotDebugData { name: "[6]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 48,
width: 8,
},
125: BranchIfZero {
target: 127,
value: StatePartIndex<BigSlots>(107), // (0x0) SlotDebugData { name: "[7]", ty: Bool },
},
126: MemoryWriteUInt {
value: StatePartIndex<BigSlots>(91), // (0x0) SlotDebugData { name: "[7]", ty: UInt<8> },
memory: StatePartIndex<Memories>(0), // (MemoryData {
// array_type: Array<Array<UInt<8>, 8>, 8>,
// data: [
// // len = 0x8
// [0x0]: 0x1032547698badcfe,
// [0x1]: 0xce8a4602df9b5713,
// [0x2]: 0x21676e6974736574,
// [0x3]: 0x7473742065726f6d,
// [0x4]: 0x0000000000000000,
// [0x5]: 0x0000000000000000,
// [0x6]: 0x0000000000000000,
// [0x7]: 0x0000000000000000,
// ],
// }) (),
addr: StatePartIndex<SmallSlots>(11), // (0x0 0) SlotDebugData { name: "", ty: UInt<3> },
stride: 64,
start: 56,
width: 8,
},
127: XorSmallImmediate {
dest: StatePartIndex<SmallSlots>(0), // (0x1 1) SlotDebugData { name: "", ty: Bool },
lhs: StatePartIndex<SmallSlots>(2), // (0x0 0) SlotDebugData { name: "", ty: Bool },
rhs: 0x1,
},
128: XorSmallImmediate {
dest: StatePartIndex<SmallSlots>(5), // (0x1 1) SlotDebugData { name: "", ty: Bool },
lhs: StatePartIndex<SmallSlots>(7), // (0x0 0) SlotDebugData { name: "", ty: Bool },
rhs: 0x1,
},
// at: module-XXXXXXXXXX.rs:1:1
129: Return,
],
..
},
pc: 129,
memory_write_log: [],
memories: StatePart {
value: [
MemoryData {
array_type: Array<Array<UInt<8>, 8>, 8>,
data: [
// len = 0x8
[0x0]: 0x1032547698badcfe,
[0x1]: 0xce8a4602df9b5713,
[0x2]: 0x21676e6974736574,
[0x3]: 0x7473742065726f6d,
[0x4]: 0x0000000000000000,
[0x5]: 0x0000000000000000,
[0x6]: 0x0000000000000000,
[0x7]: 0x0000000000000000,
],
},
],
},
small_slots: StatePart {
value: [
1,
0,
0,
0,
0,
1,
0,
0,
0,
0,
0,
0,
0,
0,
],
},
big_slots: StatePart {
value: [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
0,
],
},
},
io: Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
},
uninitialized_inputs: {},
io_targets: {
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r: CompiledValue {
layout: CompiledTypeLayout {
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 11,
debug_data: [
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.addr",
ty: UInt<3>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.en",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.clk",
ty: Clock,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::r.data[7]",
ty: UInt<8>,
},
],
..
},
},
body: Bundle {
fields: [
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(0),
},
ty: CompiledTypeLayout {
ty: UInt<3>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<3>,
},
],
..
},
},
body: Scalar,
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(1),
},
ty: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(2),
},
ty: CompiledTypeLayout {
ty: Clock,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Clock,
},
],
..
},
},
body: Scalar,
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(3),
},
ty: CompiledTypeLayout {
ty: Array<UInt<8>, 8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 8,
debug_data: [
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
],
..
},
},
body: Array {
element: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
},
},
},
],
},
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 11 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.addr: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<3>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<3>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.clk: CompiledValue {
layout: CompiledTypeLayout {
ty: Clock,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Clock,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data: CompiledValue {
layout: CompiledTypeLayout {
ty: Array<UInt<8>, 8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 8,
debug_data: [
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
],
..
},
},
body: Array {
element: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
},
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 8 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[0]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[1]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 4, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[2]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 5, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[3]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 6, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[4]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 7, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[5]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 8, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[6]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 9, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.data[7]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 10, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.r.en: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w: CompiledValue {
layout: CompiledTypeLayout {
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 19,
debug_data: [
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.addr",
ty: UInt<3>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.en",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.clk",
ty: Clock,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.data[7]",
ty: UInt<8>,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[0]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[1]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[2]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[3]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[4]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[5]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[6]",
ty: Bool,
},
SlotDebugData {
name: "InstantiatedModule(memories3: memories3).memories3::w.mask[7]",
ty: Bool,
},
],
..
},
},
body: Bundle {
fields: [
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(0),
},
ty: CompiledTypeLayout {
ty: UInt<3>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<3>,
},
],
..
},
},
body: Scalar,
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(1),
},
ty: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(2),
},
ty: CompiledTypeLayout {
ty: Clock,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Clock,
},
],
..
},
},
body: Scalar,
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(3),
},
ty: CompiledTypeLayout {
ty: Array<UInt<8>, 8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 8,
debug_data: [
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
],
..
},
},
body: Array {
element: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
},
},
},
CompiledBundleField {
offset: TypeIndex {
small_slots: StatePartIndex<SmallSlots>(0),
big_slots: StatePartIndex<BigSlots>(11),
},
ty: CompiledTypeLayout {
ty: Array<Bool, 8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 8,
debug_data: [
SlotDebugData {
name: "[0]",
ty: Bool,
},
SlotDebugData {
name: "[1]",
ty: Bool,
},
SlotDebugData {
name: "[2]",
ty: Bool,
},
SlotDebugData {
name: "[3]",
ty: Bool,
},
SlotDebugData {
name: "[4]",
ty: Bool,
},
SlotDebugData {
name: "[5]",
ty: Bool,
},
SlotDebugData {
name: "[6]",
ty: Bool,
},
SlotDebugData {
name: "[7]",
ty: Bool,
},
],
..
},
},
body: Array {
element: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
},
},
},
],
},
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 11, len: 19 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.addr: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<3>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<3>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 11, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.clk: CompiledValue {
layout: CompiledTypeLayout {
ty: Clock,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Clock,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 13, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data: CompiledValue {
layout: CompiledTypeLayout {
ty: Array<UInt<8>, 8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 8,
debug_data: [
SlotDebugData {
name: "[0]",
ty: UInt<8>,
},
SlotDebugData {
name: "[1]",
ty: UInt<8>,
},
SlotDebugData {
name: "[2]",
ty: UInt<8>,
},
SlotDebugData {
name: "[3]",
ty: UInt<8>,
},
SlotDebugData {
name: "[4]",
ty: UInt<8>,
},
SlotDebugData {
name: "[5]",
ty: UInt<8>,
},
SlotDebugData {
name: "[6]",
ty: UInt<8>,
},
SlotDebugData {
name: "[7]",
ty: UInt<8>,
},
],
..
},
},
body: Array {
element: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
},
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 14, len: 8 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[0]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 14, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[1]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 15, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[2]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 16, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[3]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 17, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[4]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 18, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[5]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 19, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[6]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 20, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.data[7]: CompiledValue {
layout: CompiledTypeLayout {
ty: UInt<8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: UInt<8>,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 21, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.en: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 12, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask: CompiledValue {
layout: CompiledTypeLayout {
ty: Array<Bool, 8>,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 8,
debug_data: [
SlotDebugData {
name: "[0]",
ty: Bool,
},
SlotDebugData {
name: "[1]",
ty: Bool,
},
SlotDebugData {
name: "[2]",
ty: Bool,
},
SlotDebugData {
name: "[3]",
ty: Bool,
},
SlotDebugData {
name: "[4]",
ty: Bool,
},
SlotDebugData {
name: "[5]",
ty: Bool,
},
SlotDebugData {
name: "[6]",
ty: Bool,
},
SlotDebugData {
name: "[7]",
ty: Bool,
},
],
..
},
},
body: Array {
element: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
},
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 22, len: 8 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[0]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 22, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[1]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 23, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[2]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 24, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[3]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 25, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[4]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 26, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[5]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 27, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[6]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 28, len: 1 },
},
write: None,
},
Instance {
name: <simulator>::memories3,
instantiated: Module {
name: memories3,
..
},
}.w.mask[7]: CompiledValue {
layout: CompiledTypeLayout {
ty: Bool,
layout: TypeLayout {
small_slots: StatePartLayout<SmallSlots> {
len: 0,
debug_data: [],
..
},
big_slots: StatePartLayout<BigSlots> {
len: 1,
debug_data: [
SlotDebugData {
name: "",
ty: Bool,
},
],
..
},
},
body: Scalar,
},
range: TypeIndexRange {
small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
big_slots: StatePartIndexRange<BigSlots> { start: 29, len: 1 },
},
write: None,
},
},
made_initial_step: true,
needs_settle: false,
trace_decls: TraceModule {
name: "memories3",
children: [
TraceModuleIO {
name: "r",
child: TraceBundle {
name: "r",
fields: [
TraceUInt {
location: TraceScalarId(0),
name: "addr",
ty: UInt<3>,
flow: Source,
},
TraceBool {
location: TraceScalarId(1),
name: "en",
flow: Source,
},
TraceClock {
location: TraceScalarId(2),
name: "clk",
flow: Source,
},
TraceArray {
name: "data",
elements: [
TraceUInt {
location: TraceScalarId(3),
name: "[0]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(4),
name: "[1]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(5),
name: "[2]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(6),
name: "[3]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(7),
name: "[4]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(8),
name: "[5]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(9),
name: "[6]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(10),
name: "[7]",
ty: UInt<8>,
flow: Sink,
},
],
ty: Array<UInt<8>, 8>,
flow: Sink,
},
],
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
flow: Source,
},
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
flow: Source,
},
TraceModuleIO {
name: "w",
child: TraceBundle {
name: "w",
fields: [
TraceUInt {
location: TraceScalarId(11),
name: "addr",
ty: UInt<3>,
flow: Source,
},
TraceBool {
location: TraceScalarId(12),
name: "en",
flow: Source,
},
TraceClock {
location: TraceScalarId(13),
name: "clk",
flow: Source,
},
TraceArray {
name: "data",
elements: [
TraceUInt {
location: TraceScalarId(14),
name: "[0]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(15),
name: "[1]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(16),
name: "[2]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(17),
name: "[3]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(18),
name: "[4]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(19),
name: "[5]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(20),
name: "[6]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(21),
name: "[7]",
ty: UInt<8>,
flow: Source,
},
],
ty: Array<UInt<8>, 8>,
flow: Source,
},
TraceArray {
name: "mask",
elements: [
TraceBool {
location: TraceScalarId(22),
name: "[0]",
flow: Source,
},
TraceBool {
location: TraceScalarId(23),
name: "[1]",
flow: Source,
},
TraceBool {
location: TraceScalarId(24),
name: "[2]",
flow: Source,
},
TraceBool {
location: TraceScalarId(25),
name: "[3]",
flow: Source,
},
TraceBool {
location: TraceScalarId(26),
name: "[4]",
flow: Source,
},
TraceBool {
location: TraceScalarId(27),
name: "[5]",
flow: Source,
},
TraceBool {
location: TraceScalarId(28),
name: "[6]",
flow: Source,
},
TraceBool {
location: TraceScalarId(29),
name: "[7]",
flow: Source,
},
],
ty: Array<Bool, 8>,
flow: Source,
},
],
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
flow: Source,
},
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
flow: Source,
},
TraceMem {
id: TraceMemoryId(0),
name: "mem",
stride: 64,
element_type: TraceArray {
name: "mem",
elements: [
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 0,
len: 8,
},
name: "[0]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 8,
len: 8,
},
name: "[1]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 16,
len: 8,
},
name: "[2]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 24,
len: 8,
},
name: "[3]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 32,
len: 8,
},
name: "[4]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 40,
len: 8,
},
name: "[5]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 48,
len: 8,
},
name: "[6]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 56,
len: 8,
},
name: "[7]",
ty: UInt<8>,
flow: Duplex,
},
],
ty: Array<UInt<8>, 8>,
flow: Duplex,
},
ports: [
TraceMemPort {
name: "r0",
bundle: TraceBundle {
name: "r0",
fields: [
TraceUInt {
location: TraceScalarId(30),
name: "addr",
ty: UInt<3>,
flow: Sink,
},
TraceBool {
location: TraceScalarId(31),
name: "en",
flow: Sink,
},
TraceClock {
location: TraceScalarId(32),
name: "clk",
flow: Sink,
},
TraceArray {
name: "data",
elements: [
TraceUInt {
location: TraceScalarId(33),
name: "[0]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(34),
name: "[1]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(35),
name: "[2]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(36),
name: "[3]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(37),
name: "[4]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(38),
name: "[5]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(39),
name: "[6]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(40),
name: "[7]",
ty: UInt<8>,
flow: Source,
},
],
ty: Array<UInt<8>, 8>,
flow: Source,
},
],
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
flow: Sink,
},
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
},
TraceMemPort {
name: "w1",
bundle: TraceBundle {
name: "w1",
fields: [
TraceUInt {
location: TraceScalarId(41),
name: "addr",
ty: UInt<3>,
flow: Sink,
},
TraceBool {
location: TraceScalarId(42),
name: "en",
flow: Sink,
},
TraceClock {
location: TraceScalarId(43),
name: "clk",
flow: Sink,
},
TraceArray {
name: "data",
elements: [
TraceUInt {
location: TraceScalarId(44),
name: "[0]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(45),
name: "[1]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(46),
name: "[2]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(47),
name: "[3]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(48),
name: "[4]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(49),
name: "[5]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(50),
name: "[6]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(51),
name: "[7]",
ty: UInt<8>,
flow: Sink,
},
],
ty: Array<UInt<8>, 8>,
flow: Sink,
},
TraceArray {
name: "mask",
elements: [
TraceBool {
location: TraceScalarId(52),
name: "[0]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(53),
name: "[1]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(54),
name: "[2]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(55),
name: "[3]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(56),
name: "[4]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(57),
name: "[5]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(58),
name: "[6]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(59),
name: "[7]",
flow: Sink,
},
],
ty: Array<Bool, 8>,
flow: Sink,
},
],
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
flow: Sink,
},
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
},
],
array_type: Array<Array<UInt<8>, 8>, 8>,
},
],
},
traces: [
SimTrace {
id: TraceScalarId(0),
kind: BigUInt {
index: StatePartIndex<BigSlots>(0),
ty: UInt<3>,
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(1),
kind: BigBool {
index: StatePartIndex<BigSlots>(1),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(2),
kind: BigClock {
index: StatePartIndex<BigSlots>(2),
},
state: 0x0,
last_state: 0x1,
},
SimTrace {
id: TraceScalarId(3),
kind: BigUInt {
index: StatePartIndex<BigSlots>(3),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(4),
kind: BigUInt {
index: StatePartIndex<BigSlots>(4),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(5),
kind: BigUInt {
index: StatePartIndex<BigSlots>(5),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(6),
kind: BigUInt {
index: StatePartIndex<BigSlots>(6),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(7),
kind: BigUInt {
index: StatePartIndex<BigSlots>(7),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(8),
kind: BigUInt {
index: StatePartIndex<BigSlots>(8),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(9),
kind: BigUInt {
index: StatePartIndex<BigSlots>(9),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(10),
kind: BigUInt {
index: StatePartIndex<BigSlots>(10),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(11),
kind: BigUInt {
index: StatePartIndex<BigSlots>(11),
ty: UInt<3>,
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(12),
kind: BigBool {
index: StatePartIndex<BigSlots>(12),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(13),
kind: BigClock {
index: StatePartIndex<BigSlots>(13),
},
state: 0x0,
last_state: 0x1,
},
SimTrace {
id: TraceScalarId(14),
kind: BigUInt {
index: StatePartIndex<BigSlots>(14),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(15),
kind: BigUInt {
index: StatePartIndex<BigSlots>(15),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(16),
kind: BigUInt {
index: StatePartIndex<BigSlots>(16),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(17),
kind: BigUInt {
index: StatePartIndex<BigSlots>(17),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(18),
kind: BigUInt {
index: StatePartIndex<BigSlots>(18),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(19),
kind: BigUInt {
index: StatePartIndex<BigSlots>(19),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(20),
kind: BigUInt {
index: StatePartIndex<BigSlots>(20),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(21),
kind: BigUInt {
index: StatePartIndex<BigSlots>(21),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(22),
kind: BigBool {
index: StatePartIndex<BigSlots>(22),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(23),
kind: BigBool {
index: StatePartIndex<BigSlots>(23),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(24),
kind: BigBool {
index: StatePartIndex<BigSlots>(24),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(25),
kind: BigBool {
index: StatePartIndex<BigSlots>(25),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(26),
kind: BigBool {
index: StatePartIndex<BigSlots>(26),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(27),
kind: BigBool {
index: StatePartIndex<BigSlots>(27),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(28),
kind: BigBool {
index: StatePartIndex<BigSlots>(28),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(29),
kind: BigBool {
index: StatePartIndex<BigSlots>(29),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(30),
kind: BigUInt {
index: StatePartIndex<BigSlots>(30),
ty: UInt<3>,
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(31),
kind: BigBool {
index: StatePartIndex<BigSlots>(31),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(32),
kind: BigClock {
index: StatePartIndex<BigSlots>(32),
},
state: 0x0,
last_state: 0x1,
},
SimTrace {
id: TraceScalarId(33),
kind: BigUInt {
index: StatePartIndex<BigSlots>(33),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(34),
kind: BigUInt {
index: StatePartIndex<BigSlots>(34),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(35),
kind: BigUInt {
index: StatePartIndex<BigSlots>(35),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(36),
kind: BigUInt {
index: StatePartIndex<BigSlots>(36),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(37),
kind: BigUInt {
index: StatePartIndex<BigSlots>(37),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(38),
kind: BigUInt {
index: StatePartIndex<BigSlots>(38),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(39),
kind: BigUInt {
index: StatePartIndex<BigSlots>(39),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(40),
kind: BigUInt {
index: StatePartIndex<BigSlots>(40),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(41),
kind: BigUInt {
index: StatePartIndex<BigSlots>(57),
ty: UInt<3>,
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(42),
kind: BigBool {
index: StatePartIndex<BigSlots>(58),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(43),
kind: BigClock {
index: StatePartIndex<BigSlots>(59),
},
state: 0x0,
last_state: 0x1,
},
SimTrace {
id: TraceScalarId(44),
kind: BigUInt {
index: StatePartIndex<BigSlots>(60),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(45),
kind: BigUInt {
index: StatePartIndex<BigSlots>(61),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(46),
kind: BigUInt {
index: StatePartIndex<BigSlots>(62),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(47),
kind: BigUInt {
index: StatePartIndex<BigSlots>(63),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(48),
kind: BigUInt {
index: StatePartIndex<BigSlots>(64),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(49),
kind: BigUInt {
index: StatePartIndex<BigSlots>(65),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(50),
kind: BigUInt {
index: StatePartIndex<BigSlots>(66),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(51),
kind: BigUInt {
index: StatePartIndex<BigSlots>(67),
ty: UInt<8>,
},
state: 0x00,
last_state: 0x00,
},
SimTrace {
id: TraceScalarId(52),
kind: BigBool {
index: StatePartIndex<BigSlots>(68),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(53),
kind: BigBool {
index: StatePartIndex<BigSlots>(69),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(54),
kind: BigBool {
index: StatePartIndex<BigSlots>(70),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(55),
kind: BigBool {
index: StatePartIndex<BigSlots>(71),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(56),
kind: BigBool {
index: StatePartIndex<BigSlots>(72),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(57),
kind: BigBool {
index: StatePartIndex<BigSlots>(73),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(58),
kind: BigBool {
index: StatePartIndex<BigSlots>(74),
},
state: 0x0,
last_state: 0x0,
},
SimTrace {
id: TraceScalarId(59),
kind: BigBool {
index: StatePartIndex<BigSlots>(75),
},
state: 0x0,
last_state: 0x0,
},
],
trace_memories: {
StatePartIndex<Memories>(0): TraceMem {
id: TraceMemoryId(0),
name: "mem",
stride: 64,
element_type: TraceArray {
name: "mem",
elements: [
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 0,
len: 8,
},
name: "[0]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 8,
len: 8,
},
name: "[1]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 16,
len: 8,
},
name: "[2]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 24,
len: 8,
},
name: "[3]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 32,
len: 8,
},
name: "[4]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 40,
len: 8,
},
name: "[5]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 48,
len: 8,
},
name: "[6]",
ty: UInt<8>,
flow: Duplex,
},
TraceUInt {
location: TraceMemoryLocation {
id: TraceMemoryId(0),
depth: 8,
stride: 64,
start: 56,
len: 8,
},
name: "[7]",
ty: UInt<8>,
flow: Duplex,
},
],
ty: Array<UInt<8>, 8>,
flow: Duplex,
},
ports: [
TraceMemPort {
name: "r0",
bundle: TraceBundle {
name: "r0",
fields: [
TraceUInt {
location: TraceScalarId(30),
name: "addr",
ty: UInt<3>,
flow: Sink,
},
TraceBool {
location: TraceScalarId(31),
name: "en",
flow: Sink,
},
TraceClock {
location: TraceScalarId(32),
name: "clk",
flow: Sink,
},
TraceArray {
name: "data",
elements: [
TraceUInt {
location: TraceScalarId(33),
name: "[0]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(34),
name: "[1]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(35),
name: "[2]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(36),
name: "[3]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(37),
name: "[4]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(38),
name: "[5]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(39),
name: "[6]",
ty: UInt<8>,
flow: Source,
},
TraceUInt {
location: TraceScalarId(40),
name: "[7]",
ty: UInt<8>,
flow: Source,
},
],
ty: Array<UInt<8>, 8>,
flow: Source,
},
],
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
flow: Sink,
},
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
#[hdl(flip)] /* offset = 5 */
data: Array<UInt<8>, 8>,
},
},
TraceMemPort {
name: "w1",
bundle: TraceBundle {
name: "w1",
fields: [
TraceUInt {
location: TraceScalarId(41),
name: "addr",
ty: UInt<3>,
flow: Sink,
},
TraceBool {
location: TraceScalarId(42),
name: "en",
flow: Sink,
},
TraceClock {
location: TraceScalarId(43),
name: "clk",
flow: Sink,
},
TraceArray {
name: "data",
elements: [
TraceUInt {
location: TraceScalarId(44),
name: "[0]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(45),
name: "[1]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(46),
name: "[2]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(47),
name: "[3]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(48),
name: "[4]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(49),
name: "[5]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(50),
name: "[6]",
ty: UInt<8>,
flow: Sink,
},
TraceUInt {
location: TraceScalarId(51),
name: "[7]",
ty: UInt<8>,
flow: Sink,
},
],
ty: Array<UInt<8>, 8>,
flow: Sink,
},
TraceArray {
name: "mask",
elements: [
TraceBool {
location: TraceScalarId(52),
name: "[0]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(53),
name: "[1]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(54),
name: "[2]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(55),
name: "[3]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(56),
name: "[4]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(57),
name: "[5]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(58),
name: "[6]",
flow: Sink,
},
TraceBool {
location: TraceScalarId(59),
name: "[7]",
flow: Sink,
},
],
ty: Array<Bool, 8>,
flow: Sink,
},
],
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
flow: Sink,
},
ty: Bundle {
/* offset = 0 */
addr: UInt<3>,
/* offset = 3 */
en: Bool,
/* offset = 4 */
clk: Clock,
/* offset = 5 */
data: Array<UInt<8>, 8>,
/* offset = 69 */
mask: Array<Bool, 8>,
},
},
],
array_type: Array<Array<UInt<8>, 8>, 8>,
},
},
trace_writers: [
Running(
VcdWriter {
finished_init: true,
timescale: 1 ps,
..
},
),
],
instant: 15 μs,
clocks_triggered: [
StatePartIndex<SmallSlots>(1),
StatePartIndex<SmallSlots>(6),
],
..
}
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