Simulation {
    state: State {
        insns: Insns {
            state_layout: StateLayout {
                ty: TypeLayout {
                    small_slots: StatePartLayout<SmallSlots> {
                        len: 0,
                        debug_data: [],
                        ..
                    },
                    big_slots: StatePartLayout<BigSlots> {
                        len: 17,
                        debug_data: [
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.i",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.o",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.i2",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.o2",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::child.i",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::child.o",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::child.i2",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::child.o2",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i2",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o2",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "",
                                ty: Bool,
                            },
                            SlotDebugData {
                                name: "",
                                ty: UInt<4>,
                            },
                        ],
                        ..
                    },
                },
                memories: StatePartLayout<Memories> {
                    len: 0,
                    debug_data: [],
                    layout_data: [],
                    ..
                },
            },
            insns: [
                // at: module-XXXXXXXXXX.rs:4:1
                0: Copy {
                    dest: StatePartIndex<BigSlots>(6), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.i2", ty: SInt<2> },
                    src: StatePartIndex<BigSlots>(2), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::o.i2", ty: SInt<2> },
                },
                1: Copy {
                    dest: StatePartIndex<BigSlots>(4), // (0xa) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.i", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(0), // (0xa) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::o.i", ty: UInt<4> },
                },
                // at: module-XXXXXXXXXX.rs:2:1
                2: Copy {
                    dest: StatePartIndex<BigSlots>(10), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i2", ty: SInt<2> },
                    src: StatePartIndex<BigSlots>(6), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.i2", ty: SInt<2> },
                },
                3: Copy {
                    dest: StatePartIndex<BigSlots>(8), // (0xa) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(4), // (0xa) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.i", ty: UInt<4> },
                },
                // at: module-XXXXXXXXXX-2.rs:1:1
                4: Const {
                    dest: StatePartIndex<BigSlots>(16), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
                    value: 0xf,
                },
                5: Const {
                    dest: StatePartIndex<BigSlots>(14), // (0x5) SlotDebugData { name: "", ty: UInt<4> },
                    value: 0x5,
                },
                6: CmpLt {
                    dest: StatePartIndex<BigSlots>(15), // (0x1) SlotDebugData { name: "", ty: Bool },
                    lhs: StatePartIndex<BigSlots>(14), // (0x5) SlotDebugData { name: "", ty: UInt<4> },
                    rhs: StatePartIndex<BigSlots>(8), // (0xa) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i", ty: UInt<4> },
                },
                7: CastToUInt {
                    dest: StatePartIndex<BigSlots>(13), // (0xe) SlotDebugData { name: "", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(10), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i2", ty: SInt<2> },
                    dest_width: 4,
                },
                // at: module-XXXXXXXXXX-2.rs:7:1
                8: Copy {
                    dest: StatePartIndex<BigSlots>(11), // (0xf) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o2", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(13), // (0xe) SlotDebugData { name: "", ty: UInt<4> },
                },
                // at: module-XXXXXXXXXX-2.rs:8:1
                9: BranchIfZero {
                    target: 11,
                    value: StatePartIndex<BigSlots>(15), // (0x1) SlotDebugData { name: "", ty: Bool },
                },
                // at: module-XXXXXXXXXX-2.rs:9:1
                10: Copy {
                    dest: StatePartIndex<BigSlots>(11), // (0xf) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o2", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(16), // (0xf) SlotDebugData { name: "", ty: UInt<4> },
                },
                // at: module-XXXXXXXXXX.rs:2:1
                11: Copy {
                    dest: StatePartIndex<BigSlots>(7), // (0xf) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.o2", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(11), // (0xf) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o2", ty: UInt<4> },
                },
                // at: module-XXXXXXXXXX.rs:4:1
                12: Copy {
                    dest: StatePartIndex<BigSlots>(3), // (0xf) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::o.o2", ty: UInt<4> },
                    src: StatePartIndex<BigSlots>(7), // (0xf) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.o2", ty: UInt<4> },
                },
                // at: module-XXXXXXXXXX-2.rs:1:1
                13: CastToSInt {
                    dest: StatePartIndex<BigSlots>(12), // (-0x2) SlotDebugData { name: "", ty: SInt<2> },
                    src: StatePartIndex<BigSlots>(8), // (0xa) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::i", ty: UInt<4> },
                    dest_width: 2,
                },
                // at: module-XXXXXXXXXX-2.rs:6:1
                14: Copy {
                    dest: StatePartIndex<BigSlots>(9), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o", ty: SInt<2> },
                    src: StatePartIndex<BigSlots>(12), // (-0x2) SlotDebugData { name: "", ty: SInt<2> },
                },
                // at: module-XXXXXXXXXX.rs:2:1
                15: Copy {
                    dest: StatePartIndex<BigSlots>(5), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.o", ty: SInt<2> },
                    src: StatePartIndex<BigSlots>(9), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1.child: mod1_child).mod1_child::o", ty: SInt<2> },
                },
                // at: module-XXXXXXXXXX.rs:4:1
                16: Copy {
                    dest: StatePartIndex<BigSlots>(1), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::o.o", ty: SInt<2> },
                    src: StatePartIndex<BigSlots>(5), // (-0x2) SlotDebugData { name: "InstantiatedModule(mod1: mod1).mod1::child.o", ty: SInt<2> },
                },
                // at: module-XXXXXXXXXX.rs:1:1
                17: Return,
            ],
            ..
        },
        pc: 17,
        memory_write_log: [],
        memories: StatePart {
            value: [],
        },
        small_slots: StatePart {
            value: [],
        },
        big_slots: StatePart {
            value: [
                10,
                -2,
                -2,
                15,
                10,
                -2,
                -2,
                15,
                10,
                -2,
                -2,
                15,
                -2,
                14,
                5,
                1,
                15,
            ],
        },
    },
    io: Instance {
        name: <simulator>::mod1,
        instantiated: Module {
            name: mod1,
            ..
        },
    },
    uninitialized_inputs: {},
    io_targets: {
        Instance {
            name: <simulator>::mod1,
            instantiated: Module {
                name: mod1,
                ..
            },
        }.o: CompiledValue {
            layout: CompiledTypeLayout {
                ty: Bundle {
                    #[hdl(flip)] /* offset = 0 */
                    i: UInt<4>,
                    /* offset = 4 */
                    o: SInt<2>,
                    #[hdl(flip)] /* offset = 6 */
                    i2: SInt<2>,
                    /* offset = 8 */
                    o2: UInt<4>,
                },
                layout: TypeLayout {
                    small_slots: StatePartLayout<SmallSlots> {
                        len: 0,
                        debug_data: [],
                        ..
                    },
                    big_slots: StatePartLayout<BigSlots> {
                        len: 4,
                        debug_data: [
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.i",
                                ty: UInt<4>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.o",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.i2",
                                ty: SInt<2>,
                            },
                            SlotDebugData {
                                name: "InstantiatedModule(mod1: mod1).mod1::o.o2",
                                ty: UInt<4>,
                            },
                        ],
                        ..
                    },
                },
                body: Bundle {
                    fields: [
                        CompiledBundleField {
                            offset: TypeIndex {
                                small_slots: StatePartIndex<SmallSlots>(0),
                                big_slots: StatePartIndex<BigSlots>(0),
                            },
                            ty: CompiledTypeLayout {
                                ty: UInt<4>,
                                layout: TypeLayout {
                                    small_slots: StatePartLayout<SmallSlots> {
                                        len: 0,
                                        debug_data: [],
                                        ..
                                    },
                                    big_slots: StatePartLayout<BigSlots> {
                                        len: 1,
                                        debug_data: [
                                            SlotDebugData {
                                                name: "",
                                                ty: UInt<4>,
                                            },
                                        ],
                                        ..
                                    },
                                },
                                body: Scalar,
                            },
                        },
                        CompiledBundleField {
                            offset: TypeIndex {
                                small_slots: StatePartIndex<SmallSlots>(0),
                                big_slots: StatePartIndex<BigSlots>(1),
                            },
                            ty: CompiledTypeLayout {
                                ty: SInt<2>,
                                layout: TypeLayout {
                                    small_slots: StatePartLayout<SmallSlots> {
                                        len: 0,
                                        debug_data: [],
                                        ..
                                    },
                                    big_slots: StatePartLayout<BigSlots> {
                                        len: 1,
                                        debug_data: [
                                            SlotDebugData {
                                                name: "",
                                                ty: SInt<2>,
                                            },
                                        ],
                                        ..
                                    },
                                },
                                body: Scalar,
                            },
                        },
                        CompiledBundleField {
                            offset: TypeIndex {
                                small_slots: StatePartIndex<SmallSlots>(0),
                                big_slots: StatePartIndex<BigSlots>(2),
                            },
                            ty: CompiledTypeLayout {
                                ty: SInt<2>,
                                layout: TypeLayout {
                                    small_slots: StatePartLayout<SmallSlots> {
                                        len: 0,
                                        debug_data: [],
                                        ..
                                    },
                                    big_slots: StatePartLayout<BigSlots> {
                                        len: 1,
                                        debug_data: [
                                            SlotDebugData {
                                                name: "",
                                                ty: SInt<2>,
                                            },
                                        ],
                                        ..
                                    },
                                },
                                body: Scalar,
                            },
                        },
                        CompiledBundleField {
                            offset: TypeIndex {
                                small_slots: StatePartIndex<SmallSlots>(0),
                                big_slots: StatePartIndex<BigSlots>(3),
                            },
                            ty: CompiledTypeLayout {
                                ty: UInt<4>,
                                layout: TypeLayout {
                                    small_slots: StatePartLayout<SmallSlots> {
                                        len: 0,
                                        debug_data: [],
                                        ..
                                    },
                                    big_slots: StatePartLayout<BigSlots> {
                                        len: 1,
                                        debug_data: [
                                            SlotDebugData {
                                                name: "",
                                                ty: UInt<4>,
                                            },
                                        ],
                                        ..
                                    },
                                },
                                body: Scalar,
                            },
                        },
                    ],
                },
            },
            range: TypeIndexRange {
                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 4 },
            },
            write: None,
        },
        Instance {
            name: <simulator>::mod1,
            instantiated: Module {
                name: mod1,
                ..
            },
        }.o.i: CompiledValue {
            layout: CompiledTypeLayout {
                ty: UInt<4>,
                layout: TypeLayout {
                    small_slots: StatePartLayout<SmallSlots> {
                        len: 0,
                        debug_data: [],
                        ..
                    },
                    big_slots: StatePartLayout<BigSlots> {
                        len: 1,
                        debug_data: [
                            SlotDebugData {
                                name: "",
                                ty: UInt<4>,
                            },
                        ],
                        ..
                    },
                },
                body: Scalar,
            },
            range: TypeIndexRange {
                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
                big_slots: StatePartIndexRange<BigSlots> { start: 0, len: 1 },
            },
            write: None,
        },
        Instance {
            name: <simulator>::mod1,
            instantiated: Module {
                name: mod1,
                ..
            },
        }.o.i2: CompiledValue {
            layout: CompiledTypeLayout {
                ty: SInt<2>,
                layout: TypeLayout {
                    small_slots: StatePartLayout<SmallSlots> {
                        len: 0,
                        debug_data: [],
                        ..
                    },
                    big_slots: StatePartLayout<BigSlots> {
                        len: 1,
                        debug_data: [
                            SlotDebugData {
                                name: "",
                                ty: SInt<2>,
                            },
                        ],
                        ..
                    },
                },
                body: Scalar,
            },
            range: TypeIndexRange {
                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
                big_slots: StatePartIndexRange<BigSlots> { start: 2, len: 1 },
            },
            write: None,
        },
        Instance {
            name: <simulator>::mod1,
            instantiated: Module {
                name: mod1,
                ..
            },
        }.o.o: CompiledValue {
            layout: CompiledTypeLayout {
                ty: SInt<2>,
                layout: TypeLayout {
                    small_slots: StatePartLayout<SmallSlots> {
                        len: 0,
                        debug_data: [],
                        ..
                    },
                    big_slots: StatePartLayout<BigSlots> {
                        len: 1,
                        debug_data: [
                            SlotDebugData {
                                name: "",
                                ty: SInt<2>,
                            },
                        ],
                        ..
                    },
                },
                body: Scalar,
            },
            range: TypeIndexRange {
                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
                big_slots: StatePartIndexRange<BigSlots> { start: 1, len: 1 },
            },
            write: None,
        },
        Instance {
            name: <simulator>::mod1,
            instantiated: Module {
                name: mod1,
                ..
            },
        }.o.o2: CompiledValue {
            layout: CompiledTypeLayout {
                ty: UInt<4>,
                layout: TypeLayout {
                    small_slots: StatePartLayout<SmallSlots> {
                        len: 0,
                        debug_data: [],
                        ..
                    },
                    big_slots: StatePartLayout<BigSlots> {
                        len: 1,
                        debug_data: [
                            SlotDebugData {
                                name: "",
                                ty: UInt<4>,
                            },
                        ],
                        ..
                    },
                },
                body: Scalar,
            },
            range: TypeIndexRange {
                small_slots: StatePartIndexRange<SmallSlots> { start: 0, len: 0 },
                big_slots: StatePartIndexRange<BigSlots> { start: 3, len: 1 },
            },
            write: None,
        },
    },
    made_initial_step: true,
    needs_settle: false,
    trace_decls: TraceModule {
        name: "mod1",
        children: [
            TraceModuleIO {
                name: "o",
                child: TraceBundle {
                    name: "o",
                    fields: [
                        TraceUInt {
                            location: TraceScalarId(0),
                            name: "i",
                            ty: UInt<4>,
                            flow: Source,
                        },
                        TraceSInt {
                            location: TraceScalarId(1),
                            name: "o",
                            ty: SInt<2>,
                            flow: Sink,
                        },
                        TraceSInt {
                            location: TraceScalarId(2),
                            name: "i2",
                            ty: SInt<2>,
                            flow: Source,
                        },
                        TraceUInt {
                            location: TraceScalarId(3),
                            name: "o2",
                            ty: UInt<4>,
                            flow: Sink,
                        },
                    ],
                    ty: Bundle {
                        #[hdl(flip)] /* offset = 0 */
                        i: UInt<4>,
                        /* offset = 4 */
                        o: SInt<2>,
                        #[hdl(flip)] /* offset = 6 */
                        i2: SInt<2>,
                        /* offset = 8 */
                        o2: UInt<4>,
                    },
                    flow: Sink,
                },
                ty: Bundle {
                    #[hdl(flip)] /* offset = 0 */
                    i: UInt<4>,
                    /* offset = 4 */
                    o: SInt<2>,
                    #[hdl(flip)] /* offset = 6 */
                    i2: SInt<2>,
                    /* offset = 8 */
                    o2: UInt<4>,
                },
                flow: Sink,
            },
            TraceInstance {
                name: "child",
                instance_io: TraceBundle {
                    name: "child",
                    fields: [
                        TraceUInt {
                            location: TraceScalarId(8),
                            name: "i",
                            ty: UInt<4>,
                            flow: Sink,
                        },
                        TraceSInt {
                            location: TraceScalarId(9),
                            name: "o",
                            ty: SInt<2>,
                            flow: Source,
                        },
                        TraceSInt {
                            location: TraceScalarId(10),
                            name: "i2",
                            ty: SInt<2>,
                            flow: Sink,
                        },
                        TraceUInt {
                            location: TraceScalarId(11),
                            name: "o2",
                            ty: UInt<4>,
                            flow: Source,
                        },
                    ],
                    ty: Bundle {
                        #[hdl(flip)] /* offset = 0 */
                        i: UInt<4>,
                        /* offset = 4 */
                        o: SInt<2>,
                        #[hdl(flip)] /* offset = 6 */
                        i2: SInt<2>,
                        /* offset = 8 */
                        o2: UInt<4>,
                    },
                    flow: Source,
                },
                module: TraceModule {
                    name: "mod1_child",
                    children: [
                        TraceModuleIO {
                            name: "i",
                            child: TraceUInt {
                                location: TraceScalarId(4),
                                name: "i",
                                ty: UInt<4>,
                                flow: Source,
                            },
                            ty: UInt<4>,
                            flow: Source,
                        },
                        TraceModuleIO {
                            name: "o",
                            child: TraceSInt {
                                location: TraceScalarId(5),
                                name: "o",
                                ty: SInt<2>,
                                flow: Sink,
                            },
                            ty: SInt<2>,
                            flow: Sink,
                        },
                        TraceModuleIO {
                            name: "i2",
                            child: TraceSInt {
                                location: TraceScalarId(6),
                                name: "i2",
                                ty: SInt<2>,
                                flow: Source,
                            },
                            ty: SInt<2>,
                            flow: Source,
                        },
                        TraceModuleIO {
                            name: "o2",
                            child: TraceUInt {
                                location: TraceScalarId(7),
                                name: "o2",
                                ty: UInt<4>,
                                flow: Sink,
                            },
                            ty: UInt<4>,
                            flow: Sink,
                        },
                    ],
                },
                ty: Bundle {
                    #[hdl(flip)] /* offset = 0 */
                    i: UInt<4>,
                    /* offset = 4 */
                    o: SInt<2>,
                    #[hdl(flip)] /* offset = 6 */
                    i2: SInt<2>,
                    /* offset = 8 */
                    o2: UInt<4>,
                },
            },
        ],
    },
    traces: [
        SimTrace {
            id: TraceScalarId(0),
            kind: BigUInt {
                index: StatePartIndex<BigSlots>(0),
                ty: UInt<4>,
            },
            state: 0xa,
            last_state: 0x3,
        },
        SimTrace {
            id: TraceScalarId(1),
            kind: BigSInt {
                index: StatePartIndex<BigSlots>(1),
                ty: SInt<2>,
            },
            state: 0x2,
            last_state: 0x3,
        },
        SimTrace {
            id: TraceScalarId(2),
            kind: BigSInt {
                index: StatePartIndex<BigSlots>(2),
                ty: SInt<2>,
            },
            state: 0x2,
            last_state: 0x2,
        },
        SimTrace {
            id: TraceScalarId(3),
            kind: BigUInt {
                index: StatePartIndex<BigSlots>(3),
                ty: UInt<4>,
            },
            state: 0xf,
            last_state: 0xe,
        },
        SimTrace {
            id: TraceScalarId(4),
            kind: BigUInt {
                index: StatePartIndex<BigSlots>(8),
                ty: UInt<4>,
            },
            state: 0xa,
            last_state: 0x3,
        },
        SimTrace {
            id: TraceScalarId(5),
            kind: BigSInt {
                index: StatePartIndex<BigSlots>(9),
                ty: SInt<2>,
            },
            state: 0x2,
            last_state: 0x3,
        },
        SimTrace {
            id: TraceScalarId(6),
            kind: BigSInt {
                index: StatePartIndex<BigSlots>(10),
                ty: SInt<2>,
            },
            state: 0x2,
            last_state: 0x2,
        },
        SimTrace {
            id: TraceScalarId(7),
            kind: BigUInt {
                index: StatePartIndex<BigSlots>(11),
                ty: UInt<4>,
            },
            state: 0xf,
            last_state: 0xe,
        },
        SimTrace {
            id: TraceScalarId(8),
            kind: BigUInt {
                index: StatePartIndex<BigSlots>(4),
                ty: UInt<4>,
            },
            state: 0xa,
            last_state: 0x3,
        },
        SimTrace {
            id: TraceScalarId(9),
            kind: BigSInt {
                index: StatePartIndex<BigSlots>(5),
                ty: SInt<2>,
            },
            state: 0x2,
            last_state: 0x3,
        },
        SimTrace {
            id: TraceScalarId(10),
            kind: BigSInt {
                index: StatePartIndex<BigSlots>(6),
                ty: SInt<2>,
            },
            state: 0x2,
            last_state: 0x2,
        },
        SimTrace {
            id: TraceScalarId(11),
            kind: BigUInt {
                index: StatePartIndex<BigSlots>(7),
                ty: UInt<4>,
            },
            state: 0xf,
            last_state: 0xe,
        },
    ],
    trace_memories: {},
    trace_writers: [
        Running(
            VcdWriter {
                finished_init: true,
                timescale: 1 ps,
                ..
            },
        ),
    ],
    instant: 2 μs,
    clocks_triggered: [],
    ..
}