re-export bitvec and add types useful for simulation to the prelude

crates/fayalite/tests/sim.rs

@@ -2,12 +2,11 @@
 // See Notices.txt for copyright information
 
 use fayalite::{
-    int::UIntValue,
     memory::{ReadStruct, ReadWriteStruct, WriteStruct},
     module::{instance_with_loc, reg_builder_with_loc},
     prelude::*,
     reset::ResetType,
-    sim::{time::SimDuration, vcd::VcdWriterDecls, Simulation},
+    sim::vcd::VcdWriterDecls,
     util::RcWriter,
 };
 use std::num::NonZeroUsize;